/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:35:58,343 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:35:58,344 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:35:58,377 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 22:35:58,377 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 22:35:58,378 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 22:35:58,380 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 22:35:58,382 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 22:35:58,384 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 22:35:58,387 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 22:35:58,387 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 22:35:58,388 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 22:35:58,389 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 22:35:58,390 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 22:35:58,391 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 22:35:58,393 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 22:35:58,393 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 22:35:58,394 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 22:35:58,395 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 22:35:58,399 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 22:35:58,400 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 22:35:58,401 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 22:35:58,402 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 22:35:58,402 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 22:35:58,403 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 22:35:58,412 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 22:35:58,417 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 22:35:58,418 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 22:35:58,419 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 22:35:58,420 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:35:58,439 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:35:58,440 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:35:58,440 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:35:58,440 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:35:58,441 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:35:58,441 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:35:58,441 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:35:58,441 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:35:58,441 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:35:58,442 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:35:58,443 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:35:58,443 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:35:58,443 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:35:58,444 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:35:58,444 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:35:58,444 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:35:58,444 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:35:58,444 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:35:58,445 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:35:58,445 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:35:58,637 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:35:58,657 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:35:58,658 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:35:58,660 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:35:58,660 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:35:58,661 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-07 22:35:58,702 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0374603e8/2ad6f9067e784c059f22cd1d9b15b21f/FLAG92fd3a88d [2022-04-07 22:35:59,072 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:35:59,072 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-07 22:35:59,076 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0374603e8/2ad6f9067e784c059f22cd1d9b15b21f/FLAG92fd3a88d [2022-04-07 22:35:59,090 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0374603e8/2ad6f9067e784c059f22cd1d9b15b21f [2022-04-07 22:35:59,095 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:35:59,097 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:35:59,099 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:35:59,099 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:35:59,102 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:35:59,102 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,103 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6145fcc6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59, skipping insertion in model container [2022-04-07 22:35:59,103 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,107 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:35:59,117 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:35:59,270 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-07 22:35:59,293 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:35:59,299 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:35:59,309 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-07 22:35:59,316 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:35:59,325 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:35:59,326 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59 WrapperNode [2022-04-07 22:35:59,327 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:35:59,328 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:35:59,328 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:35:59,328 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:35:59,335 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,335 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,340 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,340 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,353 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,357 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,361 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,363 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:35:59,364 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:35:59,364 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:35:59,364 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:35:59,364 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:35:59,377 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:35:59,392 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:35:59,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:35:59,422 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:35:59,422 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:35:59,423 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:35:59,423 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 22:35:59,423 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:35:59,423 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:35:59,423 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:35:59,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:35:59,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:35:59,471 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:35:59,472 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:35:59,595 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:35:59,599 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:35:59,600 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-07 22:35:59,601 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:35:59 BoogieIcfgContainer [2022-04-07 22:35:59,601 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:35:59,601 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:35:59,601 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:35:59,615 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:35:59,617 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:35:59" (1/1) ... [2022-04-07 22:35:59,618 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:35:59,650 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:35:59 BasicIcfg [2022-04-07 22:35:59,650 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:35:59,651 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:35:59,651 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:35:59,653 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:35:59,654 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:35:59" (1/4) ... [2022-04-07 22:35:59,661 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3dfa389a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:35:59, skipping insertion in model container [2022-04-07 22:35:59,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:35:59" (2/4) ... [2022-04-07 22:35:59,662 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3dfa389a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:35:59, skipping insertion in model container [2022-04-07 22:35:59,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:35:59" (3/4) ... [2022-04-07 22:35:59,662 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3dfa389a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:35:59, skipping insertion in model container [2022-04-07 22:35:59,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:35:59" (4/4) ... [2022-04-07 22:35:59,663 INFO L111 eAbstractionObserver]: Analyzing ICFG mcmillan2006.iqvasr [2022-04-07 22:35:59,666 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:35:59,666 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:35:59,713 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:35:59,719 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:35:59,719 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:35:59,733 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:35:59,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 22:35:59,736 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:35:59,736 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:35:59,736 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:35:59,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:35:59,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1476197606, now seen corresponding path program 1 times [2022-04-07 22:35:59,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:35:59,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716110556] [2022-04-07 22:35:59,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:35:59,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:35:59,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:35:59,870 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:35:59,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:35:59,892 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 22:35:59,892 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 22:35:59,892 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 22:35:59,894 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:35:59,894 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 22:35:59,894 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 22:35:59,894 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 22:35:59,895 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 22:35:59,895 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {28#true} is VALID [2022-04-07 22:35:59,895 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {28#true} is VALID [2022-04-07 22:35:59,896 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#true} [82] L30-3-->L30-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 22:35:59,896 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {29#false} is VALID [2022-04-07 22:35:59,896 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {29#false} is VALID [2022-04-07 22:35:59,896 INFO L272 TraceCheckUtils]: 10: Hoare triple {29#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {29#false} is VALID [2022-04-07 22:35:59,897 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-07 22:35:59,897 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 22:35:59,897 INFO L290 TraceCheckUtils]: 13: Hoare triple {29#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 22:35:59,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:35:59,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:35:59,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716110556] [2022-04-07 22:35:59,899 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716110556] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:35:59,899 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:35:59,899 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:35:59,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401996764] [2022-04-07 22:35:59,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:35:59,903 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:35:59,904 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:35:59,906 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:35:59,919 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:35:59,920 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:35:59,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:35:59,932 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:35:59,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:35:59,934 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,020 INFO L93 Difference]: Finished difference Result 41 states and 49 transitions. [2022-04-07 22:36:00,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:36:00,020 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:36:00,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:00,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-07 22:36:00,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-07 22:36:00,030 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 49 transitions. [2022-04-07 22:36:00,088 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:00,095 INFO L225 Difference]: With dead ends: 41 [2022-04-07 22:36:00,095 INFO L226 Difference]: Without dead ends: 20 [2022-04-07 22:36:00,097 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:36:00,099 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 18 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:00,100 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 29 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:36:00,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-07 22:36:00,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-07 22:36:00,121 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:00,121 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,122 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,122 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,133 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-07 22:36:00,133 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 22:36:00,133 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:00,133 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:00,134 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-07 22:36:00,134 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-07 22:36:00,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,135 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-07 22:36:00,136 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 22:36:00,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:00,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:00,136 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:00,136 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:00,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2022-04-07 22:36:00,138 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2022-04-07 22:36:00,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:00,139 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-04-07 22:36:00,139 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,139 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 22:36:00,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 22:36:00,139 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:00,140 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:00,140 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:36:00,140 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:00,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:00,140 INFO L85 PathProgramCache]: Analyzing trace with hash -1931266009, now seen corresponding path program 1 times [2022-04-07 22:36:00,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:00,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528889910] [2022-04-07 22:36:00,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:00,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:00,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:00,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-07 22:36:00,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-07 22:36:00,254 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-07 22:36:00,254 INFO L272 TraceCheckUtils]: 0: Hoare triple {156#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:00,254 INFO L290 TraceCheckUtils]: 1: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-07 22:36:00,255 INFO L290 TraceCheckUtils]: 2: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-07 22:36:00,255 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-07 22:36:00,255 INFO L272 TraceCheckUtils]: 4: Hoare triple {156#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-07 22:36:00,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {156#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {156#true} is VALID [2022-04-07 22:36:00,256 INFO L290 TraceCheckUtils]: 6: Hoare triple {156#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {161#(= main_~i~0 0)} is VALID [2022-04-07 22:36:00,256 INFO L290 TraceCheckUtils]: 7: Hoare triple {161#(= main_~i~0 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {162#(<= main_~n~0 0)} is VALID [2022-04-07 22:36:00,258 INFO L290 TraceCheckUtils]: 8: Hoare triple {162#(<= main_~n~0 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {163#(and (<= main_~n~0 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:00,259 INFO L290 TraceCheckUtils]: 9: Hoare triple {163#(and (<= main_~n~0 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {157#false} is VALID [2022-04-07 22:36:00,259 INFO L272 TraceCheckUtils]: 10: Hoare triple {157#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {157#false} is VALID [2022-04-07 22:36:00,259 INFO L290 TraceCheckUtils]: 11: Hoare triple {157#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {157#false} is VALID [2022-04-07 22:36:00,259 INFO L290 TraceCheckUtils]: 12: Hoare triple {157#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-07 22:36:00,260 INFO L290 TraceCheckUtils]: 13: Hoare triple {157#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-07 22:36:00,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:00,260 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:00,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528889910] [2022-04-07 22:36:00,260 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [528889910] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:36:00,260 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:36:00,261 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 22:36:00,261 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692039158] [2022-04-07 22:36:00,261 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:36:00,262 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:36:00,262 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:00,262 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,282 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:00,283 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 22:36:00,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:00,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 22:36:00,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-07 22:36:00,284 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,387 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2022-04-07 22:36:00,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 22:36:00,387 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:36:00,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:00,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-07 22:36:00,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-07 22:36:00,396 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 36 transitions. [2022-04-07 22:36:00,420 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:00,422 INFO L225 Difference]: With dead ends: 34 [2022-04-07 22:36:00,422 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 22:36:00,424 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:36:00,427 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:00,427 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 29 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:36:00,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 22:36:00,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 22:36:00,431 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:00,432 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,432 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,432 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,434 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-07 22:36:00,434 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-07 22:36:00,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:00,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:00,435 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 22:36:00,435 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 22:36:00,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:00,436 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-07 22:36:00,437 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-07 22:36:00,437 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:00,437 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:00,437 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:00,437 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:00,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 22:36:00,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2022-04-07 22:36:00,439 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 14 [2022-04-07 22:36:00,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:00,440 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-04-07 22:36:00,440 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:00,441 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2022-04-07 22:36:00,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:36:00,441 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:00,442 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:00,442 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:36:00,442 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:00,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:00,443 INFO L85 PathProgramCache]: Analyzing trace with hash -1791050651, now seen corresponding path program 1 times [2022-04-07 22:36:00,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:00,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072266987] [2022-04-07 22:36:00,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:00,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:00,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:00,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,648 INFO L290 TraceCheckUtils]: 0: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-07 22:36:00,648 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,648 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,649 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:00,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-07 22:36:00,649 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,650 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-07 22:36:00,651 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 22:36:00,653 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 22:36:00,653 INFO L290 TraceCheckUtils]: 8: Hoare triple {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 22:36:00,656 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 22:36:00,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:00,661 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:00,663 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {304#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:00,666 INFO L290 TraceCheckUtils]: 13: Hoare triple {304#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {305#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:00,667 INFO L290 TraceCheckUtils]: 14: Hoare triple {305#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:00,667 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:00,667 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:00,667 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:00,667 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072266987] [2022-04-07 22:36:00,667 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2072266987] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:00,668 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [204390257] [2022-04-07 22:36:00,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:00,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:00,676 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:00,678 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:00,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:36:00,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,738 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-07 22:36:00,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:00,748 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:00,818 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-04-07 22:36:00,876 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-04-07 22:36:00,919 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,920 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-07 22:36:00,921 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,922 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,922 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:00,922 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-07 22:36:00,923 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 22:36:00,923 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 22:36:00,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 22:36:00,924 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 22:36:00,925 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:00,926 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:00,927 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:00,927 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:00,928 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:00,928 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:00,928 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:00,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:01,032 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-07 22:36:01,036 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-04-07 22:36:01,070 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:01,070 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-07 22:36:01,071 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:01,071 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:01,072 INFO L290 TraceCheckUtils]: 11: Hoare triple {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:01,072 INFO L290 TraceCheckUtils]: 10: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:01,073 INFO L290 TraceCheckUtils]: 9: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 22:36:01,073 INFO L290 TraceCheckUtils]: 8: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 22:36:01,074 INFO L290 TraceCheckUtils]: 7: Hoare triple {383#(= 0 (* main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 22:36:01,074 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {383#(= 0 (* main_~i~0 4))} is VALID [2022-04-07 22:36:01,074 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-07 22:36:01,074 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:01,075 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:01,075 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:01,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-07 22:36:01,075 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-07 22:36:01,075 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:01,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [204390257] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:01,075 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:01,075 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 15 [2022-04-07 22:36:01,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801276586] [2022-04-07 22:36:01,076 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:01,077 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:36:01,077 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:01,077 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:01,095 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:01,096 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 22:36:01,096 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:01,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 22:36:01,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-07 22:36:01,098 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:01,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:01,453 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2022-04-07 22:36:01,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 22:36:01,453 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:36:01,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:01,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:01,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-07 22:36:01,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:01,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-07 22:36:01,462 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 33 transitions. [2022-04-07 22:36:01,485 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:01,486 INFO L225 Difference]: With dead ends: 32 [2022-04-07 22:36:01,486 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 22:36:01,487 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2022-04-07 22:36:01,489 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 41 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:01,490 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [41 Valid, 54 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:36:01,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 22:36:01,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-07 22:36:01,494 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:01,495 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:01,495 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:01,496 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:01,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:01,498 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 22:36:01,498 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 22:36:01,498 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:01,498 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:01,499 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 22:36:01,499 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 22:36:01,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:01,503 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 22:36:01,503 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 22:36:01,503 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:01,503 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:01,503 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:01,503 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:01,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:01,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-04-07 22:36:01,507 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2022-04-07 22:36:01,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:01,508 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-04-07 22:36:01,508 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:36:01,508 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2022-04-07 22:36:01,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 22:36:01,509 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:01,509 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:01,526 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-07 22:36:01,719 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:01,720 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:01,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:01,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1619165115, now seen corresponding path program 1 times [2022-04-07 22:36:01,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:01,720 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688569609] [2022-04-07 22:36:01,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:01,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:01,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:01,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:01,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:01,784 INFO L290 TraceCheckUtils]: 0: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-07 22:36:01,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,785 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-04-07 22:36:01,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:01,789 INFO L290 TraceCheckUtils]: 0: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-07 22:36:01,789 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,789 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,789 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 22:36:01,790 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:01,790 INFO L290 TraceCheckUtils]: 1: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-07 22:36:01,790 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,790 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,791 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,791 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-07 22:36:01,807 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {571#(= main_~i~0 0)} is VALID [2022-04-07 22:36:01,808 INFO L290 TraceCheckUtils]: 7: Hoare triple {571#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {571#(= main_~i~0 0)} is VALID [2022-04-07 22:36:01,808 INFO L290 TraceCheckUtils]: 8: Hoare triple {571#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:01,809 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-07 22:36:01,809 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 22:36:01,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 22:36:01,810 INFO L272 TraceCheckUtils]: 12: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-07 22:36:01,810 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-07 22:36:01,810 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,810 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:01,811 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 22:36:01,811 INFO L290 TraceCheckUtils]: 17: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 22:36:01,811 INFO L290 TraceCheckUtils]: 18: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:36:01,812 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:01,812 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:01,812 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-07 22:36:01,812 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:01,812 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:01,813 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:01,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:01,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688569609] [2022-04-07 22:36:01,813 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [688569609] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:01,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1691224946] [2022-04-07 22:36:01,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:01,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:01,813 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:01,817 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:01,818 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:36:01,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:01,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 22:36:01,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:01,864 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:02,012 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-07 22:36:02,013 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,013 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,013 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,013 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-07 22:36:02,019 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:02,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:02,020 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:02,020 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-07 22:36:02,020 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 22:36:02,021 INFO L290 TraceCheckUtils]: 11: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 22:36:02,021 INFO L272 TraceCheckUtils]: 12: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-07 22:36:02,021 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-07 22:36:02,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,022 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 22:36:02,022 INFO L290 TraceCheckUtils]: 17: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 22:36:02,023 INFO L290 TraceCheckUtils]: 18: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 22:36:02,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:02,024 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:02,024 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-07 22:36:02,024 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:02,024 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:02,024 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:02,024 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:02,137 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:02,137 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-07 22:36:02,137 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-07 22:36:02,138 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:02,138 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-07 22:36:02,139 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:36:02,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:02,140 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {671#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:02,140 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,140 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,140 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-07 22:36:02,140 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-07 22:36:02,141 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:02,141 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:02,142 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-07 22:36:02,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:02,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:02,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:02,143 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-07 22:36:02,143 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,143 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-07 22:36:02,144 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-07 22:36:02,144 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:02,144 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1691224946] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:02,144 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:02,144 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-07 22:36:02,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755803659] [2022-04-07 22:36:02,144 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:02,145 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-07 22:36:02,145 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:02,145 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:02,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:02,175 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 22:36:02,175 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:02,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 22:36:02,176 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-07 22:36:02,176 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:02,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:02,415 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2022-04-07 22:36:02,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 22:36:02,415 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-07 22:36:02,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:02,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:02,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-07 22:36:02,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:02,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-07 22:36:02,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 43 transitions. [2022-04-07 22:36:02,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:02,476 INFO L225 Difference]: With dead ends: 46 [2022-04-07 22:36:02,476 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 22:36:02,476 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2022-04-07 22:36:02,477 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 29 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:02,477 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 42 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:36:02,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 22:36:02,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2022-04-07 22:36:02,481 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:02,481 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:02,481 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:02,482 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:02,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:02,483 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 22:36:02,483 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 22:36:02,483 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:02,483 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:02,483 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 22:36:02,483 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 22:36:02,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:02,484 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 22:36:02,484 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 22:36:02,485 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:02,485 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:02,485 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:02,485 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:02,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:36:02,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2022-04-07 22:36:02,486 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2022-04-07 22:36:02,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:02,486 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2022-04-07 22:36:02,486 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:02,486 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2022-04-07 22:36:02,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 22:36:02,486 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:02,487 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:02,521 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 22:36:02,702 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 22:36:02,703 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:02,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:02,703 INFO L85 PathProgramCache]: Analyzing trace with hash -290697607, now seen corresponding path program 2 times [2022-04-07 22:36:02,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:02,703 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193722163] [2022-04-07 22:36:02,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:02,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:02,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:02,805 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:02,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:02,816 INFO L290 TraceCheckUtils]: 0: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-07 22:36:02,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,816 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,816 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-07 22:36:02,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:02,827 INFO L290 TraceCheckUtils]: 0: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-07 22:36:02,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:02,830 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:02,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-07 22:36:02,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,830 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,830 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,830 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-07 22:36:02,831 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:02,832 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:02,833 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:02,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:02,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:02,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:02,835 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:02,836 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:02,838 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-07 22:36:02,838 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-07 22:36:02,838 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,838 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:02,839 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:02,839 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:02,840 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:02,840 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:02,840 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {921#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:02,841 INFO L290 TraceCheckUtils]: 23: Hoare triple {921#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:02,841 INFO L290 TraceCheckUtils]: 24: Hoare triple {922#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:02,841 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:02,841 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:02,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:02,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193722163] [2022-04-07 22:36:02,842 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193722163] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:02,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2094436516] [2022-04-07 22:36:02,842 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:36:02,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:02,842 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:02,843 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:02,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:36:02,900 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:36:02,900 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:36:02,901 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-07 22:36:02,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:02,909 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:02,998 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:36:05,311 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:36:05,344 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:05,344 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-07 22:36:05,344 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:05,344 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:05,344 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:05,345 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-07 22:36:05,351 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:05,351 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:05,352 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:05,352 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:05,353 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:05,353 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:05,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:05,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:05,355 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 22:36:05,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 22:36:05,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 22:36:05,356 INFO L290 TraceCheckUtils]: 17: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 22:36:05,356 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:05,356 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:05,357 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:36:05,358 INFO L290 TraceCheckUtils]: 21: Hoare triple {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:05,358 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:05,359 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:05,359 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:05,359 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:05,360 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:05,360 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:07,495 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:36:07,500 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:36:07,539 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:07,540 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-07 22:36:07,540 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:07,541 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:07,541 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:07,542 INFO L290 TraceCheckUtils]: 20: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:07,542 INFO L290 TraceCheckUtils]: 19: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:07,543 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:07,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,543 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,543 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-07 22:36:07,544 INFO L272 TraceCheckUtils]: 14: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-07 22:36:07,544 INFO L290 TraceCheckUtils]: 13: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:07,544 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:07,545 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:07,545 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:07,545 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 22:36:07,546 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:07,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:07,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-07 22:36:07,551 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-07 22:36:07,551 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,554 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,556 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-07 22:36:07,556 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-07 22:36:07,556 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:36:07,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2094436516] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:07,556 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:07,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 17 [2022-04-07 22:36:07,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631413807] [2022-04-07 22:36:07,556 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:07,557 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-07 22:36:07,557 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:07,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 22:36:07,589 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:07,589 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 22:36:07,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:07,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 22:36:07,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=227, Unknown=2, NotChecked=0, Total=272 [2022-04-07 22:36:07,591 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 22:36:08,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:08,098 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-07 22:36:08,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 22:36:08,099 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-07 22:36:08,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:08,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 22:36:08,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-07 22:36:08,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 22:36:08,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-07 22:36:08,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 43 transitions. [2022-04-07 22:36:08,138 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:08,138 INFO L225 Difference]: With dead ends: 42 [2022-04-07 22:36:08,138 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 22:36:08,139 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=118, Invalid=636, Unknown=2, NotChecked=0, Total=756 [2022-04-07 22:36:08,139 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 42 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:08,140 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 80 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 230 Invalid, 0 Unknown, 46 Unchecked, 0.2s Time] [2022-04-07 22:36:08,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 22:36:08,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 37. [2022-04-07 22:36:08,148 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:08,148 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:08,148 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:08,149 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:08,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:08,152 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 22:36:08,152 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 22:36:08,153 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:08,153 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:08,153 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 22:36:08,153 INFO L87 Difference]: Start difference. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 22:36:08,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:08,155 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 22:36:08,155 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 22:36:08,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:08,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:08,158 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:08,158 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:08,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:08,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2022-04-07 22:36:08,160 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2022-04-07 22:36:08,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:08,161 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2022-04-07 22:36:08,161 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 22:36:08,161 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2022-04-07 22:36:08,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 22:36:08,162 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:08,162 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:08,177 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 22:36:08,363 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:08,363 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:08,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:08,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1718174257, now seen corresponding path program 3 times [2022-04-07 22:36:08,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:08,364 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899316945] [2022-04-07 22:36:08,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:08,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:08,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:08,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:08,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:08,450 INFO L290 TraceCheckUtils]: 0: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-07 22:36:08,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,450 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,450 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-07 22:36:08,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:08,458 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 22:36:08,460 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 22:36:08,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:08,463 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,464 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,464 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:08,464 INFO L290 TraceCheckUtils]: 1: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-07 22:36:08,464 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,465 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,465 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,465 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-07 22:36:08,465 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1303#(= main_~i~0 0)} is VALID [2022-04-07 22:36:08,465 INFO L290 TraceCheckUtils]: 7: Hoare triple {1303#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1303#(= main_~i~0 0)} is VALID [2022-04-07 22:36:08,466 INFO L290 TraceCheckUtils]: 8: Hoare triple {1303#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,466 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,467 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-07 22:36:08,467 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-07 22:36:08,467 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 22:36:08,468 INFO L290 TraceCheckUtils]: 13: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 22:36:08,468 INFO L272 TraceCheckUtils]: 14: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,468 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,468 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,468 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,469 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 22:36:08,469 INFO L290 TraceCheckUtils]: 19: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 22:36:08,470 INFO L290 TraceCheckUtils]: 20: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,470 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,470 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,470 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,470 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,471 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,471 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,472 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:36:08,472 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,472 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,472 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-07 22:36:08,472 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,472 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,473 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:08,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:08,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899316945] [2022-04-07 22:36:08,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [899316945] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:08,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [84366684] [2022-04-07 22:36:08,473 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:36:08,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:08,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:08,474 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:08,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:36:08,514 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 22:36:08,515 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:36:08,516 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:36:08,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:08,526 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:08,757 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-07 22:36:08,757 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,757 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,757 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-07 22:36:08,758 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:08,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:08,759 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,760 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-07 22:36:08,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-07 22:36:08,761 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 22:36:08,761 INFO L290 TraceCheckUtils]: 13: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 22:36:08,762 INFO L272 TraceCheckUtils]: 14: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,762 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,762 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 22:36:08,763 INFO L290 TraceCheckUtils]: 19: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 22:36:08,763 INFO L290 TraceCheckUtils]: 20: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 22:36:08,764 INFO L290 TraceCheckUtils]: 21: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 22:36:08,764 INFO L272 TraceCheckUtils]: 22: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,764 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,764 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,764 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,765 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 22:36:08,765 INFO L290 TraceCheckUtils]: 27: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 22:36:08,766 INFO L290 TraceCheckUtils]: 28: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} is VALID [2022-04-07 22:36:08,766 INFO L290 TraceCheckUtils]: 29: Hoare triple {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,766 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,766 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-07 22:36:08,766 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,767 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,767 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:08,767 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:08,927 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,927 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-07 22:36:08,927 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-07 22:36:08,927 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,930 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-07 22:36:08,930 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:36:08,930 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,931 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,931 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,931 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,931 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,931 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,932 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,932 INFO L290 TraceCheckUtils]: 20: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:36:08,932 INFO L290 TraceCheckUtils]: 19: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:36:08,933 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1464#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:36:08,933 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,933 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,933 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-07 22:36:08,933 INFO L272 TraceCheckUtils]: 14: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-07 22:36:08,935 INFO L290 TraceCheckUtils]: 13: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:36:08,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:36:08,936 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-07 22:36:08,936 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-07 22:36:08,937 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,937 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:08,937 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:08,938 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:08,938 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-07 22:36:08,938 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:08,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [84366684] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:08,939 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:08,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 15 [2022-04-07 22:36:08,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1595458847] [2022-04-07 22:36:08,939 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:08,939 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-07 22:36:08,940 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:08,940 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:36:08,972 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:08,972 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 22:36:08,972 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:08,973 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 22:36:08,973 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-04-07 22:36:08,973 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:36:09,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:09,305 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2022-04-07 22:36:09,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 22:36:09,306 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-07 22:36:09,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:09,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:36:09,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 22:36:09,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:36:09,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 22:36:09,309 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-07 22:36:09,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:09,345 INFO L225 Difference]: With dead ends: 60 [2022-04-07 22:36:09,345 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 22:36:09,346 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2022-04-07 22:36:09,346 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:09,346 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:36:09,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 22:36:09,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2022-04-07 22:36:09,359 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:09,360 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:09,360 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:09,360 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:09,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:09,361 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 22:36:09,361 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 22:36:09,362 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:09,362 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:09,362 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 22:36:09,362 INFO L87 Difference]: Start difference. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 22:36:09,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:09,365 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 22:36:09,365 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 22:36:09,366 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:09,366 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:09,366 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:09,366 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:09,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:09,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2022-04-07 22:36:09,367 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2022-04-07 22:36:09,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:09,367 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2022-04-07 22:36:09,367 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:36:09,368 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2022-04-07 22:36:09,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-07 22:36:09,369 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:09,369 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:09,385 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:36:09,575 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:09,575 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:09,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:09,576 INFO L85 PathProgramCache]: Analyzing trace with hash -770459891, now seen corresponding path program 4 times [2022-04-07 22:36:09,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:09,576 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814490075] [2022-04-07 22:36:09,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:09,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:09,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:09,703 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:09,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:09,712 INFO L290 TraceCheckUtils]: 0: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-07 22:36:09,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,713 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,713 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-07 22:36:09,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:09,716 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-07 22:36:09,716 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,717 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,717 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:09,717 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 22:36:09,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:09,720 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-07 22:36:09,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,720 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:09,721 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:09,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-07 22:36:09,722 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,722 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,722 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,722 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-07 22:36:09,722 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1767#(= main_~i~0 0)} is VALID [2022-04-07 22:36:09,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {1767#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1767#(= main_~i~0 0)} is VALID [2022-04-07 22:36:09,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {1767#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:09,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:09,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:09,724 INFO L290 TraceCheckUtils]: 11: Hoare triple {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:09,725 INFO L290 TraceCheckUtils]: 12: Hoare triple {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:09,725 INFO L290 TraceCheckUtils]: 13: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:09,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:09,726 INFO L290 TraceCheckUtils]: 15: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:09,726 INFO L272 TraceCheckUtils]: 16: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-07 22:36:09,726 INFO L290 TraceCheckUtils]: 17: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-07 22:36:09,726 INFO L290 TraceCheckUtils]: 18: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,726 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,727 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:09,727 INFO L290 TraceCheckUtils]: 21: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:09,727 INFO L290 TraceCheckUtils]: 22: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:09,728 INFO L290 TraceCheckUtils]: 23: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:09,728 INFO L272 TraceCheckUtils]: 24: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-07 22:36:09,728 INFO L290 TraceCheckUtils]: 25: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-07 22:36:09,728 INFO L290 TraceCheckUtils]: 26: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,728 INFO L290 TraceCheckUtils]: 27: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:09,729 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:09,729 INFO L290 TraceCheckUtils]: 29: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:09,729 INFO L290 TraceCheckUtils]: 30: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:09,730 INFO L290 TraceCheckUtils]: 31: Hoare triple {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:09,730 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:09,730 INFO L290 TraceCheckUtils]: 33: Hoare triple {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1785#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:09,731 INFO L290 TraceCheckUtils]: 34: Hoare triple {1785#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-07 22:36:09,731 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-07 22:36:09,731 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:09,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:09,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814490075] [2022-04-07 22:36:09,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814490075] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:09,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1441611934] [2022-04-07 22:36:09,731 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:36:09,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:09,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:09,732 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:09,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:36:09,771 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:36:09,771 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:36:09,772 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 22:36:09,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:09,783 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:09,866 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:36:11,924 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-07 22:36:11,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-07 22:36:11,993 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:11,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-07 22:36:11,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:11,993 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:11,993 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-07 22:36:11,993 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-07 22:36:11,994 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1808#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:11,994 INFO L290 TraceCheckUtils]: 7: Hoare triple {1808#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1808#(<= main_~i~0 0)} is VALID [2022-04-07 22:36:12,001 INFO L290 TraceCheckUtils]: 8: Hoare triple {1808#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1815#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:12,001 INFO L290 TraceCheckUtils]: 9: Hoare triple {1815#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1815#(<= main_~i~0 1)} is VALID [2022-04-07 22:36:12,002 INFO L290 TraceCheckUtils]: 10: Hoare triple {1815#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1822#(<= main_~i~0 2)} is VALID [2022-04-07 22:36:12,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {1822#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:12,004 INFO L290 TraceCheckUtils]: 12: Hoare triple {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-07 22:36:12,004 INFO L290 TraceCheckUtils]: 13: Hoare triple {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-07 22:36:12,005 INFO L290 TraceCheckUtils]: 14: Hoare triple {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,005 INFO L290 TraceCheckUtils]: 15: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,009 INFO L272 TraceCheckUtils]: 16: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,010 INFO L290 TraceCheckUtils]: 17: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,010 INFO L290 TraceCheckUtils]: 18: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,010 INFO L290 TraceCheckUtils]: 19: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,011 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,011 INFO L290 TraceCheckUtils]: 21: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,012 INFO L290 TraceCheckUtils]: 22: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,013 INFO L290 TraceCheckUtils]: 23: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,017 INFO L272 TraceCheckUtils]: 24: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,017 INFO L290 TraceCheckUtils]: 25: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,019 INFO L290 TraceCheckUtils]: 26: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,019 INFO L290 TraceCheckUtils]: 27: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 22:36:12,020 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,020 INFO L290 TraceCheckUtils]: 29: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 22:36:12,021 INFO L290 TraceCheckUtils]: 30: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} is VALID [2022-04-07 22:36:12,022 INFO L290 TraceCheckUtils]: 31: Hoare triple {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:12,022 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:12,022 INFO L290 TraceCheckUtils]: 33: Hoare triple {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1900#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:12,023 INFO L290 TraceCheckUtils]: 34: Hoare triple {1900#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-07 22:36:12,023 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-07 22:36:12,023 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:12,023 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:12,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1441611934] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:12,329 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 22:36:12,329 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2022-04-07 22:36:12,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172618774] [2022-04-07 22:36:12,329 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:12,329 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-07 22:36:12,330 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:12,330 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:12,404 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:12,404 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 22:36:12,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:12,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 22:36:12,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2022-04-07 22:36:12,405 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:14,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:14,969 INFO L93 Difference]: Finished difference Result 70 states and 72 transitions. [2022-04-07 22:36:14,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-07 22:36:14,969 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-07 22:36:14,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:14,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:14,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-07 22:36:14,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:14,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-07 22:36:14,973 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2022-04-07 22:36:17,059 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 58 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:17,061 INFO L225 Difference]: With dead ends: 70 [2022-04-07 22:36:17,061 INFO L226 Difference]: Without dead ends: 42 [2022-04-07 22:36:17,061 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 409 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=216, Invalid=1675, Unknown=1, NotChecked=0, Total=1892 [2022-04-07 22:36:17,062 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 24 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 294 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 140 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:17,062 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 152 Invalid, 294 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 144 Invalid, 0 Unknown, 140 Unchecked, 0.1s Time] [2022-04-07 22:36:17,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-07 22:36:17,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-04-07 22:36:17,069 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:17,070 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:17,070 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:17,070 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:17,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:17,071 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-07 22:36:17,071 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-07 22:36:17,071 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:17,071 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:17,071 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-07 22:36:17,071 INFO L87 Difference]: Start difference. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-07 22:36:17,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:17,072 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-07 22:36:17,072 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-07 22:36:17,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:17,073 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:17,073 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:17,073 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:17,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:36:17,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 42 transitions. [2022-04-07 22:36:17,074 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 42 transitions. Word has length 36 [2022-04-07 22:36:17,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:17,074 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 42 transitions. [2022-04-07 22:36:17,074 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:17,074 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 42 transitions. [2022-04-07 22:36:17,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-07 22:36:17,074 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:17,074 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:17,091 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:36:17,275 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:17,275 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:17,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:17,275 INFO L85 PathProgramCache]: Analyzing trace with hash -550020917, now seen corresponding path program 5 times [2022-04-07 22:36:17,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:17,276 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917732920] [2022-04-07 22:36:17,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:17,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:17,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:17,445 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:17,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:17,453 INFO L290 TraceCheckUtils]: 0: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-07 22:36:17,453 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,453 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 22:36:17,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:17,468 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:17,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,469 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:17,469 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:36:17,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:17,472 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:17,472 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,473 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,473 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:17,474 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:17,474 INFO L290 TraceCheckUtils]: 1: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-07 22:36:17,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,474 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,474 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,474 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-07 22:36:17,475 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:17,475 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:17,475 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:17,477 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:17,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:17,478 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:17,479 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:17,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:17,480 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:17,480 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:17,481 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:17,481 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:17,481 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-07 22:36:17,481 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:17,481 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,482 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,482 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:17,482 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:17,483 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:17,484 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:17,484 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-07 22:36:17,484 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:17,484 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,484 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:17,485 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:17,485 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:17,486 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:17,486 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:17,486 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:17,487 INFO L290 TraceCheckUtils]: 35: Hoare triple {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2232#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:17,487 INFO L290 TraceCheckUtils]: 36: Hoare triple {2232#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:17,488 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:17,488 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:17,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:17,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917732920] [2022-04-07 22:36:17,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [917732920] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:17,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1398648132] [2022-04-07 22:36:17,488 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:36:17,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:17,488 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:17,489 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:17,490 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:36:17,533 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-07 22:36:17,533 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:36:17,534 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-07 22:36:17,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:17,546 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:17,598 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:36:17,830 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 22:36:17,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 22:36:26,220 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:36:26,271 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:26,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-07 22:36:26,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:26,271 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:26,271 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:26,271 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-07 22:36:26,272 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:26,272 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:26,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:26,273 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:26,273 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:26,274 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:26,275 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} is VALID [2022-04-07 22:36:26,276 INFO L290 TraceCheckUtils]: 13: Hoare triple {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:26,276 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:26,295 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:26,300 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:26,302 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:26,304 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,304 INFO L290 TraceCheckUtils]: 19: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,304 INFO L290 TraceCheckUtils]: 20: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,305 INFO L290 TraceCheckUtils]: 21: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,305 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:26,306 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:26,306 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:36:26,307 INFO L290 TraceCheckUtils]: 25: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:36:26,307 INFO L272 TraceCheckUtils]: 26: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,308 INFO L290 TraceCheckUtils]: 27: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,308 INFO L290 TraceCheckUtils]: 28: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,308 INFO L290 TraceCheckUtils]: 29: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 22:36:26,309 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:36:26,309 INFO L290 TraceCheckUtils]: 31: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:36:26,309 INFO L290 TraceCheckUtils]: 32: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:36:26,310 INFO L290 TraceCheckUtils]: 33: Hoare triple {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:26,310 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:26,311 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:26,311 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:26,311 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:26,311 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:26,311 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:28,525 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:36:28,530 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:36:28,591 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:28,592 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-07 22:36:28,592 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:28,593 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:28,593 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:28,594 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:28,594 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:28,595 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:28,595 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,595 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,595 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:28,595 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-07 22:36:28,595 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:28,596 INFO L290 TraceCheckUtils]: 24: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:28,596 INFO L290 TraceCheckUtils]: 23: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:28,597 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:28,597 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,597 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,597 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-07 22:36:28,597 INFO L272 TraceCheckUtils]: 18: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-07 22:36:28,598 INFO L290 TraceCheckUtils]: 17: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:28,598 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:28,598 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:28,598 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:28,599 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:28,599 INFO L290 TraceCheckUtils]: 12: Hoare triple {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:28,600 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:28,600 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:28,601 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:28,601 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:28,601 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:28,602 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-07 22:36:28,602 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-07 22:36:28,602 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:28,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1398648132] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:28,603 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:28,603 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 23 [2022-04-07 22:36:28,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1006210867] [2022-04-07 22:36:28,603 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:28,605 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-07 22:36:28,607 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:28,607 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:28,648 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:28,648 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 22:36:28,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:28,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 22:36:28,649 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=436, Unknown=3, NotChecked=0, Total=506 [2022-04-07 22:36:28,649 INFO L87 Difference]: Start difference. First operand 41 states and 42 transitions. Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:29,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:29,667 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-07 22:36:29,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-07 22:36:29,667 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-07 22:36:29,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:29,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:29,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-07 22:36:29,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:29,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-07 22:36:29,670 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 56 transitions. [2022-04-07 22:36:29,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:29,726 INFO L225 Difference]: With dead ends: 71 [2022-04-07 22:36:29,726 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 22:36:29,726 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 67 SyntacticMatches, 9 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=161, Invalid=1096, Unknown=3, NotChecked=0, Total=1260 [2022-04-07 22:36:29,727 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 47 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 377 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 75 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:29,727 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 109 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 377 Invalid, 0 Unknown, 75 Unchecked, 0.3s Time] [2022-04-07 22:36:29,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 22:36:29,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 52. [2022-04-07 22:36:29,737 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:29,738 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:29,738 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:29,738 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:29,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:29,739 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-07 22:36:29,739 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-07 22:36:29,740 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:29,740 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:29,740 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 22:36:29,740 INFO L87 Difference]: Start difference. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 22:36:29,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:29,741 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-07 22:36:29,741 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-07 22:36:29,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:29,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:29,742 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:29,742 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:29,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:36:29,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-07 22:36:29,743 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 38 [2022-04-07 22:36:29,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:29,743 INFO L478 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-07 22:36:29,743 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:29,743 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-07 22:36:29,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-07 22:36:29,744 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:29,744 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:29,761 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-07 22:36:29,955 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:29,955 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:29,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:29,956 INFO L85 PathProgramCache]: Analyzing trace with hash 838435593, now seen corresponding path program 6 times [2022-04-07 22:36:29,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:29,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783766974] [2022-04-07 22:36:29,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:29,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:29,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:30,159 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:30,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:30,176 INFO L290 TraceCheckUtils]: 0: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-07 22:36:30,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,176 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,176 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 22:36:30,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:30,185 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:30,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,185 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,185 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:30,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:36:30,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:30,189 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:30,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:30,190 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:30,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-07 22:36:30,191 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-07 22:36:30,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:30,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:30,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:30,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:30,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:30,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:30,194 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 22:36:30,195 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 22:36:30,195 INFO L290 TraceCheckUtils]: 14: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:30,196 INFO L290 TraceCheckUtils]: 15: Hoare triple {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:30,196 INFO L290 TraceCheckUtils]: 16: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:30,196 INFO L290 TraceCheckUtils]: 17: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:30,197 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:30,197 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:30,197 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-07 22:36:30,197 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:30,197 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,197 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,198 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:30,198 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:30,199 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:30,199 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:30,199 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-07 22:36:30,199 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:30,199 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,199 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:30,200 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:30,200 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:30,201 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:30,201 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:30,202 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:30,202 INFO L290 TraceCheckUtils]: 37: Hoare triple {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2833#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:30,203 INFO L290 TraceCheckUtils]: 38: Hoare triple {2833#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:30,203 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:30,203 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:30,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:30,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783766974] [2022-04-07 22:36:30,203 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [783766974] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:30,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [899243949] [2022-04-07 22:36:30,203 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:36:30,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:30,204 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:30,204 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:30,205 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:36:30,249 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-07 22:36:30,249 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:36:30,250 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-07 22:36:30,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:30,264 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:30,309 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:36:30,457 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:36:30,457 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:36:30,513 INFO L356 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2022-04-07 22:36:30,513 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-04-07 22:36:38,935 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:36:38,975 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:38,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-07 22:36:38,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:38,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:38,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:38,976 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-07 22:36:38,976 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:38,976 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:38,977 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:38,977 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:38,977 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:38,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:38,978 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 22:36:38,979 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-07 22:36:38,979 INFO L290 TraceCheckUtils]: 14: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-07 22:36:38,980 INFO L290 TraceCheckUtils]: 15: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} is VALID [2022-04-07 22:36:38,981 INFO L290 TraceCheckUtils]: 16: Hoare triple {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} is VALID [2022-04-07 22:36:38,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:38,982 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:38,982 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:38,983 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,983 INFO L290 TraceCheckUtils]: 21: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,984 INFO L290 TraceCheckUtils]: 22: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,984 INFO L290 TraceCheckUtils]: 23: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,985 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:38,985 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:38,986 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:36:38,986 INFO L290 TraceCheckUtils]: 27: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:36:38,987 INFO L272 TraceCheckUtils]: 28: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,987 INFO L290 TraceCheckUtils]: 29: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,987 INFO L290 TraceCheckUtils]: 30: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,988 INFO L290 TraceCheckUtils]: 31: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 22:36:38,988 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:36:38,989 INFO L290 TraceCheckUtils]: 33: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:36:38,989 INFO L290 TraceCheckUtils]: 34: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:36:38,989 INFO L290 TraceCheckUtils]: 35: Hoare triple {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:38,990 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:38,990 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:38,990 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:38,991 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:38,991 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:36:38,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:36:41,503 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) is different from false [2022-04-07 22:36:41,743 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:36:41,749 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:36:41,797 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:41,798 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-07 22:36:41,798 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:36:41,800 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:36:41,801 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:41,801 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:41,801 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:41,802 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:41,802 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,802 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,802 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:41,802 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-07 22:36:41,803 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:41,803 INFO L290 TraceCheckUtils]: 26: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:41,804 INFO L290 TraceCheckUtils]: 25: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:41,804 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:41,804 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,804 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,804 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-07 22:36:41,805 INFO L272 TraceCheckUtils]: 20: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-07 22:36:41,807 INFO L290 TraceCheckUtils]: 19: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:41,808 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:41,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 22:36:41,809 INFO L290 TraceCheckUtils]: 16: Hoare triple {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:41,809 INFO L290 TraceCheckUtils]: 15: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} is VALID [2022-04-07 22:36:41,810 INFO L290 TraceCheckUtils]: 14: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-07 22:36:41,811 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-07 22:36:41,811 INFO L290 TraceCheckUtils]: 12: Hoare triple {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 22:36:41,812 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 22:36:41,812 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:41,812 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:41,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:41,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:41,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-07 22:36:41,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-07 22:36:41,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,814 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-07 22:36:41,814 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-07 22:36:41,814 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 9 not checked. [2022-04-07 22:36:41,814 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [899243949] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:36:41,814 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:36:41,814 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 17] total 29 [2022-04-07 22:36:41,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [904032290] [2022-04-07 22:36:41,814 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:36:41,815 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-07 22:36:41,816 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:36:41,816 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:41,862 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:41,862 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 22:36:41,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:36:41,863 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 22:36:41,863 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=650, Unknown=4, NotChecked=52, Total=812 [2022-04-07 22:36:41,863 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:44,189 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-07 22:36:46,195 WARN L833 $PredicateComparison]: unable to prove that (and (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0)) is different from false [2022-04-07 22:36:48,222 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 8))) (and (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0))) is different from false [2022-04-07 22:36:49,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:49,237 INFO L93 Difference]: Finished difference Result 80 states and 85 transitions. [2022-04-07 22:36:49,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-07 22:36:49,237 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-07 22:36:49,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:36:49,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:49,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-07 22:36:49,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:49,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-07 22:36:49,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 62 transitions. [2022-04-07 22:36:49,304 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:36:49,305 INFO L225 Difference]: With dead ends: 80 [2022-04-07 22:36:49,305 INFO L226 Difference]: Without dead ends: 78 [2022-04-07 22:36:49,306 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 66 SyntacticMatches, 10 SemanticMatches, 48 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 446 ImplicationChecksByTransitivity, 17.1s TimeCoverageRelationStatistics Valid=281, Invalid=1797, Unknown=8, NotChecked=364, Total=2450 [2022-04-07 22:36:49,306 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 80 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 468 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 624 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 468 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 100 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:36:49,306 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [80 Valid, 142 Invalid, 624 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 468 Invalid, 0 Unknown, 100 Unchecked, 0.4s Time] [2022-04-07 22:36:49,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-07 22:36:49,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 62. [2022-04-07 22:36:49,322 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:36:49,322 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:36:49,323 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:36:49,323 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:36:49,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:49,324 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-07 22:36:49,324 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-07 22:36:49,325 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:49,325 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:49,325 INFO L74 IsIncluded]: Start isIncluded. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-07 22:36:49,325 INFO L87 Difference]: Start difference. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-07 22:36:49,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:36:49,327 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-07 22:36:49,327 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-07 22:36:49,327 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:36:49,327 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:36:49,327 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:36:49,327 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:36:49,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:36:49,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 65 transitions. [2022-04-07 22:36:49,328 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 65 transitions. Word has length 40 [2022-04-07 22:36:49,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:36:49,329 INFO L478 AbstractCegarLoop]: Abstraction has 62 states and 65 transitions. [2022-04-07 22:36:49,329 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 22:36:49,329 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 65 transitions. [2022-04-07 22:36:49,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-07 22:36:49,329 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:36:49,329 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:36:49,352 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-07 22:36:49,546 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:49,546 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:36:49,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:36:49,546 INFO L85 PathProgramCache]: Analyzing trace with hash -110930399, now seen corresponding path program 7 times [2022-04-07 22:36:49,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:36:49,547 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057321090] [2022-04-07 22:36:49,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:36:49,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:36:49,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,689 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:36:49,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-07 22:36:49,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,694 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,694 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 22:36:49,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,697 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:49,697 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:36:49,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,701 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,701 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:49,702 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 22:36:49,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,705 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:49,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:36:49,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-07 22:36:49,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-07 22:36:49,706 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:36:49,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:36:49,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:49,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:36:49,708 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:49,708 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:36:49,709 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:36:49,709 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:36:49,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:36:49,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:36:49,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:49,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:49,711 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:36:49,711 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,711 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,712 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:49,712 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:36:49,712 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:49,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:49,713 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:36:49,713 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,713 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,713 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,714 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:49,714 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:36:49,714 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:49,715 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:49,715 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:36:49,715 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:36:49,715 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,715 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:36:49,716 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:49,716 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:36:49,717 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:36:49,717 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:36:49,717 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:36:49,718 INFO L290 TraceCheckUtils]: 43: Hoare triple {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3518#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:36:49,718 INFO L290 TraceCheckUtils]: 44: Hoare triple {3518#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:36:49,718 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:36:49,718 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:36:49,719 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:36:49,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057321090] [2022-04-07 22:36:49,719 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057321090] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:36:49,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844600759] [2022-04-07 22:36:49,719 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:36:49,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:36:49,719 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:36:49,724 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:36:49,724 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:36:49,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,770 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 22:36:49,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:36:49,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:36:49,860 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:37:03,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:37:03,090 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:03,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-07 22:37:03,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:03,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:03,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:03,090 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-07 22:37:03,091 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:37:03,091 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:37:03,091 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:03,092 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:03,092 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:03,093 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:03,093 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:03,094 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:03,094 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:03,094 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:03,095 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:03,095 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:03,096 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,096 INFO L290 TraceCheckUtils]: 19: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,097 INFO L290 TraceCheckUtils]: 20: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,097 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:03,098 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:03,098 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:37:03,098 INFO L290 TraceCheckUtils]: 25: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:37:03,099 INFO L272 TraceCheckUtils]: 26: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,099 INFO L290 TraceCheckUtils]: 27: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,100 INFO L290 TraceCheckUtils]: 28: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,100 INFO L290 TraceCheckUtils]: 29: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,101 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:37:03,101 INFO L290 TraceCheckUtils]: 31: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:37:03,101 INFO L290 TraceCheckUtils]: 32: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:03,102 INFO L290 TraceCheckUtils]: 33: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:03,102 INFO L272 TraceCheckUtils]: 34: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,103 INFO L290 TraceCheckUtils]: 35: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,103 INFO L290 TraceCheckUtils]: 36: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,103 INFO L290 TraceCheckUtils]: 37: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 22:37:03,104 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:03,104 INFO L290 TraceCheckUtils]: 39: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:03,105 INFO L290 TraceCheckUtils]: 40: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 22:37:03,105 INFO L290 TraceCheckUtils]: 41: Hoare triple {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:03,106 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:37:03,106 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:37:03,106 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:37:03,106 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:37:03,107 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:03,107 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:37:05,271 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:37:05,274 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:37:05,335 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:37:05,336 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-07 22:37:05,336 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:37:05,337 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:37:05,337 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:05,338 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:37:05,338 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:05,339 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:05,339 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,339 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,339 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:37:05,339 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:37:05,340 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:05,340 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:05,341 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:05,341 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:05,342 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,342 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,342 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:37:05,342 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:37:05,342 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:05,343 INFO L290 TraceCheckUtils]: 24: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:05,343 INFO L290 TraceCheckUtils]: 23: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:05,344 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:05,344 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,344 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,344 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-07 22:37:05,344 INFO L272 TraceCheckUtils]: 18: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-07 22:37:05,345 INFO L290 TraceCheckUtils]: 17: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:05,345 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:05,345 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:05,346 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:05,346 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:05,347 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:05,347 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:05,348 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:05,348 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:05,348 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:05,349 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:37:05,349 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-07 22:37:05,349 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-07 22:37:05,349 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-07 22:37:05,350 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-07 22:37:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:05,350 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1844600759] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:37:05,350 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:37:05,350 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 23 [2022-04-07 22:37:05,350 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743461913] [2022-04-07 22:37:05,350 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:37:05,351 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-07 22:37:05,351 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:37:05,351 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:05,407 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:37:05,407 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 22:37:05,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:37:05,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 22:37:05,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=441, Unknown=4, NotChecked=0, Total=506 [2022-04-07 22:37:05,408 INFO L87 Difference]: Start difference. First operand 62 states and 65 transitions. Second operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:06,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:06,256 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-07 22:37:06,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-07 22:37:06,256 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-07 22:37:06,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:37:06,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:06,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-07 22:37:06,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:06,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-07 22:37:06,258 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 60 transitions. [2022-04-07 22:37:06,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:37:06,310 INFO L225 Difference]: With dead ends: 86 [2022-04-07 22:37:06,310 INFO L226 Difference]: Without dead ends: 84 [2022-04-07 22:37:06,310 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 87 SyntacticMatches, 10 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 15.1s TimeCoverageRelationStatistics Valid=157, Invalid=1171, Unknown=4, NotChecked=0, Total=1332 [2022-04-07 22:37:06,311 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 50 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 439 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 439 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 73 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:37:06,311 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [51 Valid, 123 Invalid, 527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 439 Invalid, 0 Unknown, 73 Unchecked, 0.3s Time] [2022-04-07 22:37:06,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-07 22:37:06,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 60. [2022-04-07 22:37:06,353 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:37:06,353 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:37:06,353 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:37:06,354 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:37:06,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:06,355 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-07 22:37:06,355 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-07 22:37:06,355 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:37:06,355 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:37:06,355 INFO L74 IsIncluded]: Start isIncluded. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 22:37:06,356 INFO L87 Difference]: Start difference. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 22:37:06,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:06,357 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-07 22:37:06,357 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-07 22:37:06,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:37:06,357 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:37:06,357 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:37:06,357 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:37:06,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:37:06,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2022-04-07 22:37:06,358 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 46 [2022-04-07 22:37:06,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:37:06,358 INFO L478 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2022-04-07 22:37:06,358 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:06,358 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2022-04-07 22:37:06,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-07 22:37:06,359 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:37:06,359 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:37:06,386 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 22:37:06,571 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 22:37:06,571 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:37:06,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:37:06,572 INFO L85 PathProgramCache]: Analyzing trace with hash -1930534305, now seen corresponding path program 8 times [2022-04-07 22:37:06,572 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:37:06,572 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720710638] [2022-04-07 22:37:06,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:37:06,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:37:06,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,760 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:37:06,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,763 INFO L290 TraceCheckUtils]: 0: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-07 22:37:06,763 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,763 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 22:37:06,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,788 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,788 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,789 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:06,789 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:37:06,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,792 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,793 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,793 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,793 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:06,794 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 22:37:06,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,797 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:06,798 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:37:06,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-07 22:37:06,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-07 22:37:06,799 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:06,799 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:06,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:06,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:06,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:06,801 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:06,801 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:06,802 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:06,802 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:37:06,803 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:06,803 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:06,803 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:06,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:06,804 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:06,804 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:06,804 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,804 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,804 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,805 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:06,805 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:06,817 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:06,818 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:06,818 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:06,818 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,818 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,818 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,819 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:06,819 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:06,820 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:06,820 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:06,820 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:06,820 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:06,820 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,820 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:06,821 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:06,821 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:06,821 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:37:06,822 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:06,822 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:37:06,823 INFO L290 TraceCheckUtils]: 45: Hoare triple {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4237#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:37:06,823 INFO L290 TraceCheckUtils]: 46: Hoare triple {4237#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:06,823 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:06,823 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:06,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:37:06,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720710638] [2022-04-07 22:37:06,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720710638] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:37:06,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [756469249] [2022-04-07 22:37:06,824 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:37:06,824 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:37:06,824 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:37:06,824 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:37:06,825 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 22:37:06,874 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:37:06,874 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:37:06,875 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-07 22:37:06,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:06,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:37:06,976 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:37:07,198 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 22:37:07,199 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 22:37:20,531 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:37:20,577 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:20,577 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-07 22:37:20,577 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:20,577 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:20,577 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:20,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-07 22:37:20,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:20,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:20,578 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:20,579 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:20,579 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:20,580 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:20,580 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:20,581 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:20,582 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} is VALID [2022-04-07 22:37:20,582 INFO L290 TraceCheckUtils]: 15: Hoare triple {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:20,583 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:20,583 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:20,583 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:20,584 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:20,585 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,585 INFO L290 TraceCheckUtils]: 21: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,585 INFO L290 TraceCheckUtils]: 22: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,585 INFO L290 TraceCheckUtils]: 23: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,586 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:20,586 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:20,587 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:37:20,587 INFO L290 TraceCheckUtils]: 27: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:37:20,588 INFO L272 TraceCheckUtils]: 28: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,588 INFO L290 TraceCheckUtils]: 29: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,589 INFO L290 TraceCheckUtils]: 30: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,589 INFO L290 TraceCheckUtils]: 31: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,589 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:37:20,590 INFO L290 TraceCheckUtils]: 33: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:37:20,590 INFO L290 TraceCheckUtils]: 34: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:20,591 INFO L290 TraceCheckUtils]: 35: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:20,591 INFO L272 TraceCheckUtils]: 36: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,592 INFO L290 TraceCheckUtils]: 37: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,592 INFO L290 TraceCheckUtils]: 38: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,592 INFO L290 TraceCheckUtils]: 39: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 22:37:20,593 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:20,593 INFO L290 TraceCheckUtils]: 41: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:20,594 INFO L290 TraceCheckUtils]: 42: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:37:20,594 INFO L290 TraceCheckUtils]: 43: Hoare triple {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:20,595 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:37:20,595 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:37:20,595 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:20,595 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:20,596 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:20,596 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:37:22,843 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:37:22,848 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:37:22,932 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:22,933 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-07 22:37:22,933 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:37:22,934 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:37:22,934 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:22,935 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:37:22,935 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:22,936 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:22,936 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,936 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,936 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:22,936 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:22,937 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:22,937 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:22,938 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:22,938 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:22,938 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,939 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,939 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:22,939 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:22,939 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:22,940 INFO L290 TraceCheckUtils]: 26: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:22,940 INFO L290 TraceCheckUtils]: 25: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:22,941 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:22,941 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,941 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,941 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-07 22:37:22,941 INFO L272 TraceCheckUtils]: 20: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-07 22:37:22,942 INFO L290 TraceCheckUtils]: 19: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:22,942 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:37:22,942 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:22,943 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:22,943 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:22,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:37:22,944 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-07 22:37:22,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:22,945 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:22,946 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:22,946 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:22,947 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:22,947 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:22,947 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-07 22:37:22,947 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-07 22:37:22,947 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,948 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,948 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,948 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-07 22:37:22,948 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-07 22:37:22,948 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:22,948 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [756469249] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:37:22,948 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:37:22,949 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 16] total 26 [2022-04-07 22:37:22,949 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694459049] [2022-04-07 22:37:22,949 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:37:22,949 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-07 22:37:22,950 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:37:22,950 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:23,010 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:37:23,010 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 22:37:23,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:37:23,015 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 22:37:23,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=570, Unknown=4, NotChecked=0, Total=650 [2022-04-07 22:37:23,016 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:24,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:24,502 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2022-04-07 22:37:24,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-07 22:37:24,502 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-07 22:37:24,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:37:24,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:24,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-07 22:37:24,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:24,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-07 22:37:24,505 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 68 transitions. [2022-04-07 22:37:24,571 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:37:24,573 INFO L225 Difference]: With dead ends: 115 [2022-04-07 22:37:24,573 INFO L226 Difference]: Without dead ends: 113 [2022-04-07 22:37:24,573 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 84 SyntacticMatches, 11 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 371 ImplicationChecksByTransitivity, 15.7s TimeCoverageRelationStatistics Valid=188, Invalid=1530, Unknown=4, NotChecked=0, Total=1722 [2022-04-07 22:37:24,574 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 41 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 591 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 168 SdHoareTripleChecker+Invalid, 731 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 591 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 113 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 22:37:24,574 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 168 Invalid, 731 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 591 Invalid, 0 Unknown, 113 Unchecked, 0.5s Time] [2022-04-07 22:37:24,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-07 22:37:24,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 83. [2022-04-07 22:37:24,599 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:37:24,599 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:37:24,599 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:37:24,600 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:37:24,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:24,602 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-07 22:37:24,602 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-07 22:37:24,602 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:37:24,602 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:37:24,602 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-07 22:37:24,602 INFO L87 Difference]: Start difference. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-07 22:37:24,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:37:24,604 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-07 22:37:24,604 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-07 22:37:24,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:37:24,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:37:24,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:37:24,604 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:37:24,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:37:24,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 88 transitions. [2022-04-07 22:37:24,606 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 88 transitions. Word has length 48 [2022-04-07 22:37:24,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:37:24,606 INFO L478 AbstractCegarLoop]: Abstraction has 83 states and 88 transitions. [2022-04-07 22:37:24,606 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 22:37:24,606 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2022-04-07 22:37:24,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-07 22:37:24,607 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:37:24,607 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:37:24,622 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-07 22:37:24,811 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:37:24,811 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:37:24,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:37:24,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1776768797, now seen corresponding path program 9 times [2022-04-07 22:37:24,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:37:24,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459217137] [2022-04-07 22:37:24,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:37:24,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:37:24,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,016 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:37:25,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,020 INFO L290 TraceCheckUtils]: 0: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-07 22:37:25,020 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,020 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,020 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 22:37:25,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,024 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,025 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,025 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,025 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:25,026 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 22:37:25,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,036 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,036 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,037 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,037 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:25,038 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 22:37:25,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,040 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,041 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:25,042 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:37:25,042 INFO L290 TraceCheckUtils]: 1: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-07 22:37:25,042 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,042 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,042 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-07 22:37:25,043 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:37:25,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:37:25,044 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:25,044 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:37:25,045 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:25,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:37:25,046 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:25,046 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:37:25,047 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 22:37:25,047 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 22:37:25,048 INFO L290 TraceCheckUtils]: 16: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:37:25,048 INFO L290 TraceCheckUtils]: 17: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:25,049 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:25,049 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:37:25,050 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:25,050 INFO L290 TraceCheckUtils]: 21: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:25,050 INFO L272 TraceCheckUtils]: 22: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:37:25,050 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,050 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,050 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,051 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:25,051 INFO L290 TraceCheckUtils]: 27: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:37:25,052 INFO L290 TraceCheckUtils]: 28: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:25,052 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:25,052 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:37:25,052 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,053 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,053 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,053 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:25,054 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:37:25,054 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:25,055 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:25,055 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:37:25,055 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:37:25,055 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,055 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:37:25,055 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:25,056 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:37:25,056 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:37:25,057 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:37:25,057 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:37:25,058 INFO L290 TraceCheckUtils]: 47: Hoare triple {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5105#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:37:25,058 INFO L290 TraceCheckUtils]: 48: Hoare triple {5105#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:37:25,058 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:37:25,058 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:37:25,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:37:25,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459217137] [2022-04-07 22:37:25,059 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [459217137] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:37:25,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1191201995] [2022-04-07 22:37:25,059 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:37:25,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:37:25,059 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:37:25,060 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:37:25,063 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 22:37:25,123 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-07 22:37:25,124 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:37:25,124 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-07 22:37:25,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:37:25,137 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:37:25,197 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:37:25,316 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:37:25,316 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:37:25,342 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:37:25,342 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:38:01,568 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:38:01,612 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:01,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-07 22:38:01,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:01,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:01,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:01,613 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-07 22:38:01,613 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:38:01,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:38:01,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:01,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:01,614 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:01,615 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:01,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:38:01,616 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:38:01,616 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 22:38:01,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:38:01,617 INFO L290 TraceCheckUtils]: 16: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:38:01,619 INFO L290 TraceCheckUtils]: 17: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:01,619 INFO L290 TraceCheckUtils]: 18: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:01,620 INFO L290 TraceCheckUtils]: 19: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:01,624 INFO L290 TraceCheckUtils]: 20: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-07 22:38:01,625 INFO L290 TraceCheckUtils]: 21: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-07 22:38:01,626 INFO L272 TraceCheckUtils]: 22: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:01,626 INFO L290 TraceCheckUtils]: 23: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:01,627 INFO L290 TraceCheckUtils]: 24: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:01,627 INFO L290 TraceCheckUtils]: 25: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:01,627 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-07 22:38:01,628 INFO L290 TraceCheckUtils]: 27: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-07 22:38:01,628 INFO L290 TraceCheckUtils]: 28: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:01,629 INFO L290 TraceCheckUtils]: 29: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:03,636 WARN L272 TraceCheckUtils]: 30: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is UNKNOWN [2022-04-07 22:38:03,637 INFO L290 TraceCheckUtils]: 31: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-07 22:38:05,640 WARN L290 TraceCheckUtils]: 32: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is UNKNOWN [2022-04-07 22:38:05,641 INFO L290 TraceCheckUtils]: 33: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-07 22:38:05,642 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is VALID [2022-04-07 22:38:07,650 WARN L290 TraceCheckUtils]: 35: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is UNKNOWN [2022-04-07 22:38:07,652 INFO L290 TraceCheckUtils]: 36: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:07,652 INFO L290 TraceCheckUtils]: 37: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:07,654 INFO L272 TraceCheckUtils]: 38: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:07,654 INFO L290 TraceCheckUtils]: 39: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:07,654 INFO L290 TraceCheckUtils]: 40: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:07,655 INFO L290 TraceCheckUtils]: 41: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-07 22:38:07,655 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:07,656 INFO L290 TraceCheckUtils]: 43: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:38:07,656 INFO L290 TraceCheckUtils]: 44: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5249#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:38:07,657 INFO L290 TraceCheckUtils]: 45: Hoare triple {5249#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:38:07,657 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:38:07,657 INFO L290 TraceCheckUtils]: 47: Hoare triple {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5260#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:38:07,658 INFO L290 TraceCheckUtils]: 48: Hoare triple {5260#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:38:07,658 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:38:07,658 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 2 proven. 58 refuted. 8 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:38:07,658 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:38:09,122 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) is different from false [2022-04-07 22:38:10,650 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:38:10,654 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:38:10,719 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:38:10,719 INFO L290 TraceCheckUtils]: 48: Hoare triple {5260#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-07 22:38:10,720 INFO L290 TraceCheckUtils]: 47: Hoare triple {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5260#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:38:10,720 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:38:10,721 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:38:10,721 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:38:10,722 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:10,722 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:10,722 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,722 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,722 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:38:10,722 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:38:10,723 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:10,723 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:10,724 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:10,724 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:10,724 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,724 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,725 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:38:10,725 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:38:10,725 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:10,726 INFO L290 TraceCheckUtils]: 28: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:10,726 INFO L290 TraceCheckUtils]: 27: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:10,727 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:10,727 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,727 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,727 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-07 22:38:10,727 INFO L272 TraceCheckUtils]: 22: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-07 22:38:10,727 INFO L290 TraceCheckUtils]: 21: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:10,728 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:10,728 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:38:10,728 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:38:10,730 INFO L290 TraceCheckUtils]: 17: Hoare triple {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 22:38:10,730 INFO L290 TraceCheckUtils]: 16: Hoare triple {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:38:10,731 INFO L290 TraceCheckUtils]: 15: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 22:38:10,731 INFO L290 TraceCheckUtils]: 14: Hoare triple {5374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:38:10,732 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-07 22:38:10,732 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:38:10,733 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:10,733 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:10,733 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:10,734 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:10,734 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:38:10,734 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-07 22:38:10,735 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-07 22:38:10,735 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,735 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-07 22:38:10,735 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-07 22:38:10,736 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 11 not checked. [2022-04-07 22:38:10,736 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1191201995] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:38:10,736 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:38:10,736 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 20, 17] total 31 [2022-04-07 22:38:10,736 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813100078] [2022-04-07 22:38:10,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:38:10,737 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-07 22:38:10,737 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:38:10,737 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:38:28,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 76 inductive. 0 not inductive. 11 times theorem prover too weak to decide inductivity. [2022-04-07 22:38:28,473 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-07 22:38:28,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:38:28,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-07 22:38:28,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=742, Unknown=26, NotChecked=56, Total=930 [2022-04-07 22:38:28,474 INFO L87 Difference]: Start difference. First operand 83 states and 88 transitions. Second operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:38:29,725 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (<= 4 c_main_~i~0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-07 22:38:32,068 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 12))) (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0) (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)))) is different from false [2022-04-07 22:38:32,445 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4))) 0))) is different from false [2022-04-07 22:38:38,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:38,766 INFO L93 Difference]: Finished difference Result 122 states and 126 transitions. [2022-04-07 22:38:38,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 22:38:38,767 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-07 22:38:38,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:38:38,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:38:38,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 71 transitions. [2022-04-07 22:38:38,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:38:38,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 71 transitions. [2022-04-07 22:38:38,773 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 71 transitions. [2022-04-07 22:38:55,383 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 60 inductive. 0 not inductive. 11 times theorem prover too weak to decide inductivity. [2022-04-07 22:38:55,385 INFO L225 Difference]: With dead ends: 122 [2022-04-07 22:38:55,385 INFO L226 Difference]: Without dead ends: 120 [2022-04-07 22:38:55,385 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 89 SyntacticMatches, 9 SemanticMatches, 45 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 43.1s TimeCoverageRelationStatistics Valid=210, Invalid=1580, Unknown=32, NotChecked=340, Total=2162 [2022-04-07 22:38:55,386 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 59 mSDsluCounter, 215 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 241 SdHoareTripleChecker+Invalid, 499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 167 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:38:55,386 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [59 Valid, 241 Invalid, 499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 312 Invalid, 0 Unknown, 167 Unchecked, 0.2s Time] [2022-04-07 22:38:55,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-07 22:38:55,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 57. [2022-04-07 22:38:55,415 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:38:55,415 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:55,415 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:55,416 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:55,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:55,417 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-07 22:38:55,417 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-07 22:38:55,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:38:55,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:38:55,418 INFO L74 IsIncluded]: Start isIncluded. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-07 22:38:55,418 INFO L87 Difference]: Start difference. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-07 22:38:55,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:55,419 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-07 22:38:55,419 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-07 22:38:55,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:38:55,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:38:55,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:38:55,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:38:55,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:55,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2022-04-07 22:38:55,421 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 50 [2022-04-07 22:38:55,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:38:55,421 INFO L478 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2022-04-07 22:38:55,421 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:38:55,421 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2022-04-07 22:38:55,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-07 22:38:55,421 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:38:55,421 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:38:55,441 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 22:38:55,622 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 22:38:55,622 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:38:55,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:38:55,622 INFO L85 PathProgramCache]: Analyzing trace with hash 692034935, now seen corresponding path program 10 times [2022-04-07 22:38:55,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:38:55,622 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797989361] [2022-04-07 22:38:55,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:38:55,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:38:55,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,724 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:38:55,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,728 INFO L290 TraceCheckUtils]: 0: Hoare triple {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-07 22:38:55,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,728 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,728 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 22:38:55,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 22:38:55,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:38:55,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,739 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,740 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:55,740 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 22:38:55,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,742 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,742 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:55,743 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 22:38:55,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,747 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,748 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:55,748 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:38:55,748 INFO L290 TraceCheckUtils]: 1: Hoare triple {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-07 22:38:55,749 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,749 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,749 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,749 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-07 22:38:55,749 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5950#(= main_~i~0 0)} is VALID [2022-04-07 22:38:55,749 INFO L290 TraceCheckUtils]: 7: Hoare triple {5950#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5950#(= main_~i~0 0)} is VALID [2022-04-07 22:38:55,750 INFO L290 TraceCheckUtils]: 8: Hoare triple {5950#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:55,750 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:55,750 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:55,751 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:55,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:55,751 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:55,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-07 22:38:55,752 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-07 22:38:55,753 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 22:38:55,753 INFO L290 TraceCheckUtils]: 17: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 22:38:55,753 INFO L272 TraceCheckUtils]: 18: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:55,753 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,753 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,754 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 22:38:55,754 INFO L290 TraceCheckUtils]: 23: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 22:38:55,754 INFO L290 TraceCheckUtils]: 24: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:55,755 INFO L290 TraceCheckUtils]: 25: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:55,755 INFO L272 TraceCheckUtils]: 26: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:55,755 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,755 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,755 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,756 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:55,756 INFO L290 TraceCheckUtils]: 31: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:55,756 INFO L290 TraceCheckUtils]: 32: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:55,757 INFO L290 TraceCheckUtils]: 33: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:55,757 INFO L272 TraceCheckUtils]: 34: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:55,757 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,757 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,757 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,757 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:55,758 INFO L290 TraceCheckUtils]: 39: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:55,758 INFO L290 TraceCheckUtils]: 40: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:55,759 INFO L290 TraceCheckUtils]: 41: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:55,759 INFO L272 TraceCheckUtils]: 42: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:55,759 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:55,759 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,759 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:55,759 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:55,760 INFO L290 TraceCheckUtils]: 47: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:55,760 INFO L290 TraceCheckUtils]: 48: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5976#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:38:55,760 INFO L290 TraceCheckUtils]: 49: Hoare triple {5976#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:55,761 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:55,761 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-07 22:38:55,761 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:55,761 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:55,761 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 27 proven. 29 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:38:55,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:38:55,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797989361] [2022-04-07 22:38:55,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [797989361] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:38:55,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [471603283] [2022-04-07 22:38:55,761 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:38:55,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:38:55,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:38:55,762 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:38:55,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 22:38:55,817 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:38:55,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:38:55,818 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 22:38:55,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:55,841 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:38:56,149 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-07 22:38:56,150 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5999#(<= main_~i~0 0)} is VALID [2022-04-07 22:38:56,151 INFO L290 TraceCheckUtils]: 7: Hoare triple {5999#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5999#(<= main_~i~0 0)} is VALID [2022-04-07 22:38:56,151 INFO L290 TraceCheckUtils]: 8: Hoare triple {5999#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:56,151 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:56,152 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:56,152 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:56,152 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:56,153 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:56,153 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-07 22:38:56,153 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-07 22:38:56,154 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,154 INFO L290 TraceCheckUtils]: 17: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,154 INFO L272 TraceCheckUtils]: 18: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,154 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,154 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,154 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,155 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,156 INFO L290 TraceCheckUtils]: 23: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,156 INFO L290 TraceCheckUtils]: 24: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,157 INFO L290 TraceCheckUtils]: 25: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,157 INFO L272 TraceCheckUtils]: 26: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,157 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,157 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,157 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,157 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,158 INFO L290 TraceCheckUtils]: 31: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,158 INFO L290 TraceCheckUtils]: 32: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,159 INFO L290 TraceCheckUtils]: 33: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,159 INFO L272 TraceCheckUtils]: 34: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,159 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,159 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,159 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,159 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,160 INFO L290 TraceCheckUtils]: 39: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,160 INFO L290 TraceCheckUtils]: 40: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,160 INFO L290 TraceCheckUtils]: 41: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,161 INFO L272 TraceCheckUtils]: 42: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,161 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,161 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,161 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,161 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,161 INFO L290 TraceCheckUtils]: 47: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,162 INFO L290 TraceCheckUtils]: 48: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6130#(and (<= 4 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 22:38:56,162 INFO L290 TraceCheckUtils]: 49: Hoare triple {6130#(and (<= 4 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:56,162 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:56,163 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-07 22:38:56,163 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:56,163 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:56,163 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:38:56,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:38:56,393 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:56,393 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-07 22:38:56,393 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-07 22:38:56,393 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:56,394 INFO L290 TraceCheckUtils]: 49: Hoare triple {5976#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-07 22:38:56,394 INFO L290 TraceCheckUtils]: 48: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5976#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:38:56,395 INFO L290 TraceCheckUtils]: 47: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:56,395 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:56,395 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,395 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,395 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,396 INFO L272 TraceCheckUtils]: 42: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,396 INFO L290 TraceCheckUtils]: 41: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:56,396 INFO L290 TraceCheckUtils]: 40: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:38:56,397 INFO L290 TraceCheckUtils]: 39: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:56,397 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:56,397 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,397 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,397 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,397 INFO L272 TraceCheckUtils]: 34: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,398 INFO L290 TraceCheckUtils]: 33: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:56,398 INFO L290 TraceCheckUtils]: 32: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:38:56,399 INFO L290 TraceCheckUtils]: 31: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:56,399 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:56,399 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,399 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,399 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,399 INFO L272 TraceCheckUtils]: 26: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:56,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:38:56,401 INFO L290 TraceCheckUtils]: 23: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:38:56,401 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {6233#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:38:56,401 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,401 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,401 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-07 22:38:56,401 INFO L272 TraceCheckUtils]: 18: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-07 22:38:56,402 INFO L290 TraceCheckUtils]: 17: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:38:56,402 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:38:56,402 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-07 22:38:56,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-07 22:38:56,403 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:56,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-07 22:38:56,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:56,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-07 22:38:56,405 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:56,405 INFO L290 TraceCheckUtils]: 8: Hoare triple {5999#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-07 22:38:56,405 INFO L290 TraceCheckUtils]: 7: Hoare triple {5999#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5999#(<= main_~i~0 0)} is VALID [2022-04-07 22:38:56,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5999#(<= main_~i~0 0)} is VALID [2022-04-07 22:38:56,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-07 22:38:56,406 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:38:56,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [471603283] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:38:56,407 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:38:56,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2022-04-07 22:38:56,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1794518632] [2022-04-07 22:38:56,407 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:38:56,407 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-07 22:38:56,408 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:38:56,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:38:56,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:38:56,457 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 22:38:56,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:38:56,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 22:38:56,457 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=323, Unknown=0, NotChecked=0, Total=420 [2022-04-07 22:38:56,457 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:38:57,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:57,010 INFO L93 Difference]: Finished difference Result 88 states and 94 transitions. [2022-04-07 22:38:57,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-07 22:38:57,010 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-07 22:38:57,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:38:57,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:38:57,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-07 22:38:57,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:38:57,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-07 22:38:57,012 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 64 transitions. [2022-04-07 22:38:57,070 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:38:57,071 INFO L225 Difference]: With dead ends: 88 [2022-04-07 22:38:57,071 INFO L226 Difference]: Without dead ends: 60 [2022-04-07 22:38:57,072 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-04-07 22:38:57,072 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 40 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 255 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 255 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:38:57,072 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [41 Valid, 68 Invalid, 283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 255 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:38:57,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-07 22:38:57,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2022-04-07 22:38:57,101 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:38:57,102 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:57,102 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:57,102 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:57,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:57,103 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-07 22:38:57,103 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-07 22:38:57,103 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:38:57,103 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:38:57,103 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-07 22:38:57,103 INFO L87 Difference]: Start difference. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-07 22:38:57,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:38:57,104 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-07 22:38:57,104 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-07 22:38:57,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:38:57,104 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:38:57,104 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:38:57,104 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:38:57,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:38:57,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2022-04-07 22:38:57,105 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 54 [2022-04-07 22:38:57,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:38:57,105 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2022-04-07 22:38:57,106 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 22:38:57,106 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2022-04-07 22:38:57,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-07 22:38:57,106 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:38:57,106 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:38:57,127 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-07 22:38:57,325 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 22:38:57,325 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:38:57,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:38:57,326 INFO L85 PathProgramCache]: Analyzing trace with hash 529632181, now seen corresponding path program 11 times [2022-04-07 22:38:57,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:38:57,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745354047] [2022-04-07 22:38:57,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:38:57,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:38:57,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,505 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:38:57,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,512 INFO L290 TraceCheckUtils]: 0: Hoare triple {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-07 22:38:57,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,512 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,512 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 22:38:57,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,515 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,515 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:38:57,515 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:38:57,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,525 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,525 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,526 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:57,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 22:38:57,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,529 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,529 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,529 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,530 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:57,530 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 22:38:57,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,532 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,532 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:57,534 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:38:57,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-07 22:38:57,534 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,534 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,534 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,534 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-07 22:38:57,534 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:38:57,535 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:38:57,535 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:57,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:38:57,536 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:57,537 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:38:57,537 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:38:57,538 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:38:57,538 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:38:57,539 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6669#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:38:57,539 INFO L290 TraceCheckUtils]: 16: Hoare triple {6669#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:38:57,540 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:38:57,540 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:38:57,540 INFO L290 TraceCheckUtils]: 19: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:38:57,540 INFO L272 TraceCheckUtils]: 20: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:38:57,541 INFO L290 TraceCheckUtils]: 21: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,541 INFO L290 TraceCheckUtils]: 22: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,541 INFO L290 TraceCheckUtils]: 23: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,541 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6659#true} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:38:57,542 INFO L290 TraceCheckUtils]: 25: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:38:57,542 INFO L290 TraceCheckUtils]: 26: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:57,543 INFO L290 TraceCheckUtils]: 27: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:57,543 INFO L272 TraceCheckUtils]: 28: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:38:57,543 INFO L290 TraceCheckUtils]: 29: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,543 INFO L290 TraceCheckUtils]: 30: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,543 INFO L290 TraceCheckUtils]: 31: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,544 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:57,544 INFO L290 TraceCheckUtils]: 33: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:38:57,545 INFO L290 TraceCheckUtils]: 34: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:57,545 INFO L290 TraceCheckUtils]: 35: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:57,545 INFO L272 TraceCheckUtils]: 36: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:38:57,545 INFO L290 TraceCheckUtils]: 37: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,546 INFO L290 TraceCheckUtils]: 38: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,546 INFO L290 TraceCheckUtils]: 39: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,546 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:57,547 INFO L290 TraceCheckUtils]: 41: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:38:57,547 INFO L290 TraceCheckUtils]: 42: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:57,548 INFO L290 TraceCheckUtils]: 43: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:57,548 INFO L272 TraceCheckUtils]: 44: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:38:57,548 INFO L290 TraceCheckUtils]: 45: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:38:57,548 INFO L290 TraceCheckUtils]: 46: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,548 INFO L290 TraceCheckUtils]: 47: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:38:57,549 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:57,549 INFO L290 TraceCheckUtils]: 49: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:38:57,550 INFO L290 TraceCheckUtils]: 50: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:38:57,550 INFO L290 TraceCheckUtils]: 51: Hoare triple {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:38:57,551 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6693#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:38:57,551 INFO L290 TraceCheckUtils]: 53: Hoare triple {6693#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6694#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:38:57,551 INFO L290 TraceCheckUtils]: 54: Hoare triple {6694#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:38:57,551 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:38:57,552 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:38:57,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:38:57,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745354047] [2022-04-07 22:38:57,552 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745354047] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:38:57,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [168885577] [2022-04-07 22:38:57,552 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:38:57,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:38:57,552 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:38:57,555 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:38:57,556 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 22:38:57,636 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-07 22:38:57,636 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:38:57,637 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-07 22:38:57,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:38:57,649 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:38:57,736 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:39:30,428 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:39:30,471 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:30,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-07 22:39:30,472 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:30,472 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:30,472 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:30,472 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-07 22:39:30,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:39:30,472 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:39:30,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:30,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:30,473 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:30,474 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:30,474 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:30,475 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:30,475 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:39:30,476 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:30,476 INFO L290 TraceCheckUtils]: 16: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:30,476 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:30,477 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:30,477 INFO L290 TraceCheckUtils]: 19: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:30,478 INFO L272 TraceCheckUtils]: 20: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,478 INFO L290 TraceCheckUtils]: 21: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,478 INFO L290 TraceCheckUtils]: 22: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,479 INFO L290 TraceCheckUtils]: 23: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,479 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:30,480 INFO L290 TraceCheckUtils]: 25: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:30,480 INFO L290 TraceCheckUtils]: 26: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,481 INFO L290 TraceCheckUtils]: 27: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,481 INFO L272 TraceCheckUtils]: 28: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,482 INFO L290 TraceCheckUtils]: 29: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,482 INFO L290 TraceCheckUtils]: 30: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,482 INFO L290 TraceCheckUtils]: 31: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,483 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,483 INFO L290 TraceCheckUtils]: 33: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,484 INFO L290 TraceCheckUtils]: 34: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,484 INFO L290 TraceCheckUtils]: 35: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,485 INFO L272 TraceCheckUtils]: 36: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,485 INFO L290 TraceCheckUtils]: 37: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,485 INFO L290 TraceCheckUtils]: 38: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,486 INFO L290 TraceCheckUtils]: 39: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,486 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,487 INFO L290 TraceCheckUtils]: 41: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,487 INFO L290 TraceCheckUtils]: 42: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,488 INFO L290 TraceCheckUtils]: 43: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,488 INFO L272 TraceCheckUtils]: 44: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,489 INFO L290 TraceCheckUtils]: 45: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,489 INFO L290 TraceCheckUtils]: 46: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,489 INFO L290 TraceCheckUtils]: 47: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-07 22:39:30,490 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,493 INFO L290 TraceCheckUtils]: 49: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,493 INFO L290 TraceCheckUtils]: 50: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6853#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 22:39:30,494 INFO L290 TraceCheckUtils]: 51: Hoare triple {6853#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:39:30,494 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:39:30,495 INFO L290 TraceCheckUtils]: 53: Hoare triple {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:39:30,495 INFO L290 TraceCheckUtils]: 54: Hoare triple {6864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:39:30,495 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:39:30,495 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:39:30,495 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:39:32,669 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:39:32,673 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:39:32,752 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:39:32,752 INFO L290 TraceCheckUtils]: 54: Hoare triple {6864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-07 22:39:32,752 INFO L290 TraceCheckUtils]: 53: Hoare triple {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:39:32,753 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:39:32,753 INFO L290 TraceCheckUtils]: 51: Hoare triple {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:39:32,754 INFO L290 TraceCheckUtils]: 50: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:32,754 INFO L290 TraceCheckUtils]: 49: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:32,755 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:32,755 INFO L290 TraceCheckUtils]: 47: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,755 INFO L290 TraceCheckUtils]: 46: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,755 INFO L290 TraceCheckUtils]: 45: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:39:32,755 INFO L272 TraceCheckUtils]: 44: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:39:32,755 INFO L290 TraceCheckUtils]: 43: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:32,756 INFO L290 TraceCheckUtils]: 42: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:32,756 INFO L290 TraceCheckUtils]: 41: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:32,757 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:32,757 INFO L290 TraceCheckUtils]: 39: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,757 INFO L290 TraceCheckUtils]: 38: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,757 INFO L290 TraceCheckUtils]: 37: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:39:32,757 INFO L272 TraceCheckUtils]: 36: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:39:32,757 INFO L290 TraceCheckUtils]: 35: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:32,758 INFO L290 TraceCheckUtils]: 34: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:32,758 INFO L290 TraceCheckUtils]: 33: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:32,759 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:32,759 INFO L290 TraceCheckUtils]: 31: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,759 INFO L290 TraceCheckUtils]: 30: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,759 INFO L290 TraceCheckUtils]: 29: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:39:32,759 INFO L272 TraceCheckUtils]: 28: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:39:32,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:32,760 INFO L290 TraceCheckUtils]: 26: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:32,760 INFO L290 TraceCheckUtils]: 25: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:32,761 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6659#true} {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:32,761 INFO L290 TraceCheckUtils]: 23: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,761 INFO L290 TraceCheckUtils]: 22: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,761 INFO L290 TraceCheckUtils]: 21: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-07 22:39:32,761 INFO L272 TraceCheckUtils]: 20: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-07 22:39:32,761 INFO L290 TraceCheckUtils]: 19: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:32,762 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:32,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:32,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:32,763 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 22:39:32,763 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:39:32,764 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:32,764 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:32,764 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:32,765 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:32,765 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:32,765 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:32,766 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:39:32,766 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-07 22:39:32,766 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-07 22:39:32,766 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-07 22:39:32,767 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-07 22:39:32,767 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 22:39:32,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [168885577] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:39:32,767 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:39:32,767 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 16] total 26 [2022-04-07 22:39:32,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455483295] [2022-04-07 22:39:32,767 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:39:32,768 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-07 22:39:32,768 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:39:32,768 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 22:39:32,837 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:39:32,837 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 22:39:32,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:39:32,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 22:39:32,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=575, Unknown=5, NotChecked=0, Total=650 [2022-04-07 22:39:32,838 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 22:39:33,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:33,937 INFO L93 Difference]: Finished difference Result 72 states and 73 transitions. [2022-04-07 22:39:33,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-07 22:39:33,938 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-07 22:39:33,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:39:33,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 22:39:33,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 64 transitions. [2022-04-07 22:39:33,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 22:39:33,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 64 transitions. [2022-04-07 22:39:33,940 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 64 transitions. [2022-04-07 22:39:33,994 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:39:33,995 INFO L225 Difference]: With dead ends: 72 [2022-04-07 22:39:33,995 INFO L226 Difference]: Without dead ends: 70 [2022-04-07 22:39:33,996 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 103 SyntacticMatches, 12 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 34.6s TimeCoverageRelationStatistics Valid=184, Invalid=1617, Unknown=5, NotChecked=0, Total=1806 [2022-04-07 22:39:33,996 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 60 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 555 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 657 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 555 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 67 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:39:33,996 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [60 Valid, 146 Invalid, 657 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 555 Invalid, 0 Unknown, 67 Unchecked, 0.4s Time] [2022-04-07 22:39:33,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-04-07 22:39:34,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 67. [2022-04-07 22:39:34,017 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:39:34,017 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:34,017 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:34,018 INFO L87 Difference]: Start difference. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:34,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:34,018 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-07 22:39:34,018 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-07 22:39:34,019 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:39:34,019 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:39:34,019 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-07 22:39:34,019 INFO L87 Difference]: Start difference. First operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-07 22:39:34,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:34,020 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-07 22:39:34,020 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-07 22:39:34,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:39:34,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:39:34,020 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:39:34,020 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:39:34,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:34,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2022-04-07 22:39:34,021 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 56 [2022-04-07 22:39:34,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:39:34,021 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2022-04-07 22:39:34,022 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 22:39:34,022 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2022-04-07 22:39:34,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-07 22:39:34,022 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:39:34,022 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:39:34,040 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 22:39:34,235 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 22:39:34,236 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:39:34,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:39:34,236 INFO L85 PathProgramCache]: Analyzing trace with hash 603520779, now seen corresponding path program 12 times [2022-04-07 22:39:34,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:39:34,236 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039036961] [2022-04-07 22:39:34,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:39:34,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:39:34,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:39:34,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,370 INFO L290 TraceCheckUtils]: 0: Hoare triple {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-07 22:39:34,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,370 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 22:39:34,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,373 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,374 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-07 22:39:34,374 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:39:34,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,377 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:34,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 22:39:34,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,380 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:34,381 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 22:39:34,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,392 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,392 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,392 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,393 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:34,393 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-07 22:39:34,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,395 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,395 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,396 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:34,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:39:34,397 INFO L290 TraceCheckUtils]: 1: Hoare triple {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-07 22:39:34,397 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,397 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,397 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,397 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-07 22:39:34,397 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7414#(= main_~i~0 0)} is VALID [2022-04-07 22:39:34,398 INFO L290 TraceCheckUtils]: 7: Hoare triple {7414#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7414#(= main_~i~0 0)} is VALID [2022-04-07 22:39:34,398 INFO L290 TraceCheckUtils]: 8: Hoare triple {7414#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:34,398 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:34,399 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:34,399 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:34,399 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:34,400 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:34,400 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:34,400 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:34,401 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-07 22:39:34,401 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-07 22:39:34,402 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-07 22:39:34,402 INFO L290 TraceCheckUtils]: 19: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-07 22:39:34,402 INFO L272 TraceCheckUtils]: 20: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:34,402 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,402 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,402 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,403 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-07 22:39:34,403 INFO L290 TraceCheckUtils]: 25: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-07 22:39:34,404 INFO L290 TraceCheckUtils]: 26: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:34,404 INFO L290 TraceCheckUtils]: 27: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:34,404 INFO L272 TraceCheckUtils]: 28: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:34,404 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,404 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,404 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,407 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:34,407 INFO L290 TraceCheckUtils]: 33: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:34,408 INFO L290 TraceCheckUtils]: 34: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:34,415 INFO L290 TraceCheckUtils]: 35: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:34,415 INFO L272 TraceCheckUtils]: 36: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:34,415 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,415 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,415 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,459 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:34,472 INFO L290 TraceCheckUtils]: 41: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:34,495 INFO L290 TraceCheckUtils]: 42: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:34,519 INFO L290 TraceCheckUtils]: 43: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:34,519 INFO L272 TraceCheckUtils]: 44: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:34,519 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,519 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,519 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,547 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:34,551 INFO L290 TraceCheckUtils]: 49: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:34,552 INFO L290 TraceCheckUtils]: 50: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:34,552 INFO L290 TraceCheckUtils]: 51: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:34,552 INFO L272 TraceCheckUtils]: 52: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:34,552 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:34,552 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,552 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:34,553 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:34,553 INFO L290 TraceCheckUtils]: 57: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:34,554 INFO L290 TraceCheckUtils]: 58: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7446#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:39:34,554 INFO L290 TraceCheckUtils]: 59: Hoare triple {7446#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:34,554 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:34,554 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-07 22:39:34,554 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:34,554 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:34,554 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 43 proven. 42 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:39:34,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:39:34,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1039036961] [2022-04-07 22:39:34,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1039036961] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:39:34,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [491425153] [2022-04-07 22:39:34,555 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:39:34,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:39:34,555 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:39:34,556 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:39:34,557 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 22:39:34,614 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-07 22:39:34,614 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:39:34,615 INFO L263 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:39:34,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:34,636 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:39:35,050 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-07 22:39:35,050 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,050 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,050 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,050 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-07 22:39:35,051 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7469#(<= main_~i~0 0)} is VALID [2022-04-07 22:39:35,051 INFO L290 TraceCheckUtils]: 7: Hoare triple {7469#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7469#(<= main_~i~0 0)} is VALID [2022-04-07 22:39:35,052 INFO L290 TraceCheckUtils]: 8: Hoare triple {7469#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:35,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:35,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:35,053 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:35,053 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:35,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:35,054 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:35,054 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:35,055 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-07 22:39:35,055 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-07 22:39:35,055 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,056 INFO L290 TraceCheckUtils]: 19: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,056 INFO L272 TraceCheckUtils]: 20: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,056 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,056 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,056 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,057 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,057 INFO L290 TraceCheckUtils]: 25: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,057 INFO L290 TraceCheckUtils]: 26: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,058 INFO L290 TraceCheckUtils]: 27: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,058 INFO L272 TraceCheckUtils]: 28: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,058 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,058 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,058 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,058 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,059 INFO L290 TraceCheckUtils]: 33: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,059 INFO L290 TraceCheckUtils]: 34: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-07 22:39:35,060 INFO L290 TraceCheckUtils]: 35: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-07 22:39:35,060 INFO L272 TraceCheckUtils]: 36: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,060 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,060 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,060 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,060 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-07 22:39:35,061 INFO L290 TraceCheckUtils]: 41: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-07 22:39:35,061 INFO L290 TraceCheckUtils]: 42: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-07 22:39:35,062 INFO L290 TraceCheckUtils]: 43: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-07 22:39:35,062 INFO L272 TraceCheckUtils]: 44: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,062 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,062 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,062 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,062 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-07 22:39:35,063 INFO L290 TraceCheckUtils]: 49: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-07 22:39:35,063 INFO L290 TraceCheckUtils]: 50: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-07 22:39:35,064 INFO L290 TraceCheckUtils]: 51: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-07 22:39:35,064 INFO L272 TraceCheckUtils]: 52: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,064 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,064 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,064 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,064 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-07 22:39:35,065 INFO L290 TraceCheckUtils]: 57: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-07 22:39:35,065 INFO L290 TraceCheckUtils]: 58: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7631#(and (<= 5 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-07 22:39:35,065 INFO L290 TraceCheckUtils]: 59: Hoare triple {7631#(and (<= 5 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:35,066 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:35,066 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-07 22:39:35,066 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:35,066 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:35,066 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:39:35,066 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:39:35,357 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:35,357 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-07 22:39:35,357 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-07 22:39:35,357 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:35,358 INFO L290 TraceCheckUtils]: 59: Hoare triple {7446#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-07 22:39:35,358 INFO L290 TraceCheckUtils]: 58: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7446#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:39:35,358 INFO L290 TraceCheckUtils]: 57: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:35,359 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:35,359 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,359 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,359 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,359 INFO L272 TraceCheckUtils]: 52: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,359 INFO L290 TraceCheckUtils]: 51: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:35,360 INFO L290 TraceCheckUtils]: 50: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:39:35,360 INFO L290 TraceCheckUtils]: 49: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:35,361 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:35,361 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,361 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,361 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,361 INFO L272 TraceCheckUtils]: 44: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,361 INFO L290 TraceCheckUtils]: 43: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:35,362 INFO L290 TraceCheckUtils]: 42: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:39:35,362 INFO L290 TraceCheckUtils]: 41: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:35,362 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:35,363 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,363 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,363 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,363 INFO L272 TraceCheckUtils]: 36: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,363 INFO L290 TraceCheckUtils]: 35: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:35,364 INFO L290 TraceCheckUtils]: 34: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:39:35,364 INFO L290 TraceCheckUtils]: 33: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:35,364 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:35,365 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,365 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,365 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,365 INFO L272 TraceCheckUtils]: 28: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,365 INFO L290 TraceCheckUtils]: 27: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:35,366 INFO L290 TraceCheckUtils]: 26: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:39:35,366 INFO L290 TraceCheckUtils]: 25: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:39:35,366 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7758#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:39:35,366 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,366 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,367 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-07 22:39:35,367 INFO L272 TraceCheckUtils]: 20: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-07 22:39:35,367 INFO L290 TraceCheckUtils]: 19: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:39:35,367 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:39:35,368 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-07 22:39:35,368 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-07 22:39:35,368 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:35,371 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-07 22:39:35,371 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:35,372 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-07 22:39:35,372 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:35,373 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-07 22:39:35,373 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:35,373 INFO L290 TraceCheckUtils]: 8: Hoare triple {7469#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-07 22:39:35,374 INFO L290 TraceCheckUtils]: 7: Hoare triple {7469#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7469#(<= main_~i~0 0)} is VALID [2022-04-07 22:39:35,374 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7469#(<= main_~i~0 0)} is VALID [2022-04-07 22:39:35,374 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-07 22:39:35,374 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,374 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,374 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,374 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-07 22:39:35,375 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-07 22:39:35,375 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:39:35,375 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [491425153] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:39:35,375 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:39:35,375 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 24 [2022-04-07 22:39:35,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106167931] [2022-04-07 22:39:35,375 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:39:35,376 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-07 22:39:35,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:39:35,377 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:39:35,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:39:35,431 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-07 22:39:35,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:39:35,432 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-07 22:39:35,432 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=426, Unknown=0, NotChecked=0, Total=552 [2022-04-07 22:39:35,432 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:39:36,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:36,136 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2022-04-07 22:39:36,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-07 22:39:36,136 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-07 22:39:36,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:39:36,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:39:36,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 22:39:36,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:39:36,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 22:39:36,138 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-07 22:39:36,188 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:39:36,189 INFO L225 Difference]: With dead ends: 102 [2022-04-07 22:39:36,189 INFO L226 Difference]: Without dead ends: 70 [2022-04-07 22:39:36,189 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 22:39:36,190 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 42 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 337 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:39:36,190 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [43 Valid, 65 Invalid, 337 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:39:36,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-04-07 22:39:36,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2022-04-07 22:39:36,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:39:36,219 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:36,219 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:36,220 INFO L87 Difference]: Start difference. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:36,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:36,221 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-07 22:39:36,221 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-07 22:39:36,221 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:39:36,221 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:39:36,221 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-07 22:39:36,221 INFO L87 Difference]: Start difference. First operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-07 22:39:36,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:39:36,222 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-07 22:39:36,222 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-07 22:39:36,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:39:36,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:39:36,222 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:39:36,222 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:39:36,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 22:39:36,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 70 transitions. [2022-04-07 22:39:36,223 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 70 transitions. Word has length 64 [2022-04-07 22:39:36,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:39:36,223 INFO L478 AbstractCegarLoop]: Abstraction has 69 states and 70 transitions. [2022-04-07 22:39:36,224 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:39:36,224 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 70 transitions. [2022-04-07 22:39:36,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-07 22:39:36,224 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:39:36,224 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:39:36,248 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 22:39:36,435 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 22:39:36,435 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:39:36,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:39:36,436 INFO L85 PathProgramCache]: Analyzing trace with hash -694372407, now seen corresponding path program 13 times [2022-04-07 22:39:36,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:39:36,436 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990588890] [2022-04-07 22:39:36,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:39:36,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:39:36,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,636 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:39:36,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,639 INFO L290 TraceCheckUtils]: 0: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-07 22:39:36,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,639 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,639 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 22:39:36,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,645 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:36,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 22:39:36,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,649 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,649 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,649 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 22:39:36,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,652 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:36,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 22:39:36,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,655 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,655 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,655 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,656 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:36,656 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 22:39:36,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:36,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:39:36,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-07 22:39:36,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-07 22:39:36,660 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:39:36,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:39:36,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:36,661 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:39:36,661 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:36,662 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:39:36,662 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:36,663 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:39:36,663 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:39:36,663 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:39:36,664 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:39:36,664 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8259#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:39:36,665 INFO L290 TraceCheckUtils]: 18: Hoare triple {8259#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:39:36,665 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:39:36,665 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:36,666 INFO L290 TraceCheckUtils]: 21: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:36,666 INFO L272 TraceCheckUtils]: 22: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:39:36,666 INFO L290 TraceCheckUtils]: 23: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,666 INFO L290 TraceCheckUtils]: 24: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,666 INFO L290 TraceCheckUtils]: 25: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,667 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8248#true} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:36,667 INFO L290 TraceCheckUtils]: 27: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:39:36,668 INFO L290 TraceCheckUtils]: 28: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,668 INFO L290 TraceCheckUtils]: 29: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,668 INFO L272 TraceCheckUtils]: 30: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:39:36,668 INFO L290 TraceCheckUtils]: 31: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,668 INFO L290 TraceCheckUtils]: 32: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,668 INFO L290 TraceCheckUtils]: 33: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,669 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,669 INFO L290 TraceCheckUtils]: 35: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,670 INFO L290 TraceCheckUtils]: 36: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:36,670 INFO L290 TraceCheckUtils]: 37: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:36,670 INFO L272 TraceCheckUtils]: 38: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:39:36,670 INFO L290 TraceCheckUtils]: 39: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,670 INFO L290 TraceCheckUtils]: 40: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,670 INFO L290 TraceCheckUtils]: 41: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,671 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:36,671 INFO L290 TraceCheckUtils]: 43: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:39:36,672 INFO L290 TraceCheckUtils]: 44: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:36,672 INFO L290 TraceCheckUtils]: 45: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:36,672 INFO L272 TraceCheckUtils]: 46: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:39:36,672 INFO L290 TraceCheckUtils]: 47: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,672 INFO L290 TraceCheckUtils]: 48: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,673 INFO L290 TraceCheckUtils]: 49: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,673 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:36,673 INFO L290 TraceCheckUtils]: 51: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:39:36,674 INFO L290 TraceCheckUtils]: 52: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:36,674 INFO L290 TraceCheckUtils]: 53: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:36,674 INFO L272 TraceCheckUtils]: 54: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:39:36,674 INFO L290 TraceCheckUtils]: 55: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:39:36,675 INFO L290 TraceCheckUtils]: 56: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,675 INFO L290 TraceCheckUtils]: 57: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:39:36,675 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:36,675 INFO L290 TraceCheckUtils]: 59: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:39:36,676 INFO L290 TraceCheckUtils]: 60: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:39:36,676 INFO L290 TraceCheckUtils]: 61: Hoare triple {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:39:36,677 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8288#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:39:36,677 INFO L290 TraceCheckUtils]: 63: Hoare triple {8288#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8289#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:39:36,677 INFO L290 TraceCheckUtils]: 64: Hoare triple {8289#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:39:36,678 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:39:36,678 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:39:36,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:39:36,678 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990588890] [2022-04-07 22:39:36,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [990588890] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:39:36,678 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1209317787] [2022-04-07 22:39:36,678 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:39:36,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:39:36,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:39:36,679 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:39:36,680 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 22:39:36,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,736 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-07 22:39:36,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:39:36,749 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:39:36,856 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:40:27,759 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:40:27,803 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-07 22:40:27,804 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:40:27,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:40:27,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:27,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:27,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:27,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:27,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:27,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:27,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:27,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:27,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:40:27,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:27,809 INFO L290 TraceCheckUtils]: 18: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:27,809 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:27,809 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:27,810 INFO L290 TraceCheckUtils]: 21: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:27,810 INFO L272 TraceCheckUtils]: 22: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,811 INFO L290 TraceCheckUtils]: 23: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,811 INFO L290 TraceCheckUtils]: 24: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,811 INFO L290 TraceCheckUtils]: 25: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,812 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:27,812 INFO L290 TraceCheckUtils]: 27: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:27,813 INFO L290 TraceCheckUtils]: 28: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:40:27,813 INFO L290 TraceCheckUtils]: 29: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:40:27,814 INFO L272 TraceCheckUtils]: 30: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,814 INFO L290 TraceCheckUtils]: 31: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,814 INFO L290 TraceCheckUtils]: 32: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,815 INFO L290 TraceCheckUtils]: 33: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,815 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:40:27,815 INFO L290 TraceCheckUtils]: 35: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:40:27,816 INFO L290 TraceCheckUtils]: 36: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:40:27,816 INFO L290 TraceCheckUtils]: 37: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:40:27,817 INFO L272 TraceCheckUtils]: 38: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,817 INFO L290 TraceCheckUtils]: 39: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,817 INFO L290 TraceCheckUtils]: 40: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,818 INFO L290 TraceCheckUtils]: 41: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,818 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:40:27,819 INFO L290 TraceCheckUtils]: 43: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:40:27,819 INFO L290 TraceCheckUtils]: 44: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,819 INFO L290 TraceCheckUtils]: 45: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,820 INFO L272 TraceCheckUtils]: 46: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,820 INFO L290 TraceCheckUtils]: 47: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,821 INFO L290 TraceCheckUtils]: 48: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,821 INFO L290 TraceCheckUtils]: 49: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,821 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,822 INFO L290 TraceCheckUtils]: 51: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,822 INFO L290 TraceCheckUtils]: 52: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,822 INFO L290 TraceCheckUtils]: 53: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,823 INFO L272 TraceCheckUtils]: 54: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,823 INFO L290 TraceCheckUtils]: 55: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,824 INFO L290 TraceCheckUtils]: 56: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,824 INFO L290 TraceCheckUtils]: 57: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-07 22:40:27,825 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,825 INFO L290 TraceCheckUtils]: 59: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:27,825 INFO L290 TraceCheckUtils]: 60: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-07 22:40:27,826 INFO L290 TraceCheckUtils]: 61: Hoare triple {8479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ (- 2) main_~i~1) 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:40:27,826 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:40:27,826 INFO L290 TraceCheckUtils]: 63: Hoare triple {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8490#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:40:27,827 INFO L290 TraceCheckUtils]: 64: Hoare triple {8490#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:40:27,827 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:40:27,827 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:40:27,827 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:40:28,356 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:40:28,359 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:40:28,445 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:40:28,445 INFO L290 TraceCheckUtils]: 64: Hoare triple {8490#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-07 22:40:28,446 INFO L290 TraceCheckUtils]: 63: Hoare triple {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8490#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:40:28,446 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:40:28,446 INFO L290 TraceCheckUtils]: 61: Hoare triple {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:40:28,447 INFO L290 TraceCheckUtils]: 60: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:28,447 INFO L290 TraceCheckUtils]: 59: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:28,448 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:28,448 INFO L290 TraceCheckUtils]: 57: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,448 INFO L290 TraceCheckUtils]: 56: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,448 INFO L290 TraceCheckUtils]: 55: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:40:28,448 INFO L272 TraceCheckUtils]: 54: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:40:28,448 INFO L290 TraceCheckUtils]: 53: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:28,449 INFO L290 TraceCheckUtils]: 52: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:28,449 INFO L290 TraceCheckUtils]: 51: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:28,450 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:28,450 INFO L290 TraceCheckUtils]: 49: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,450 INFO L290 TraceCheckUtils]: 48: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,450 INFO L290 TraceCheckUtils]: 47: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:40:28,450 INFO L272 TraceCheckUtils]: 46: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:40:28,450 INFO L290 TraceCheckUtils]: 45: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:28,451 INFO L290 TraceCheckUtils]: 44: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:28,451 INFO L290 TraceCheckUtils]: 43: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:28,452 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:28,452 INFO L290 TraceCheckUtils]: 41: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,452 INFO L290 TraceCheckUtils]: 40: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,452 INFO L290 TraceCheckUtils]: 39: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:40:28,452 INFO L272 TraceCheckUtils]: 38: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:40:28,452 INFO L290 TraceCheckUtils]: 37: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:28,453 INFO L290 TraceCheckUtils]: 36: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:28,453 INFO L290 TraceCheckUtils]: 35: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:28,454 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:28,454 INFO L290 TraceCheckUtils]: 33: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,454 INFO L290 TraceCheckUtils]: 32: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,454 INFO L290 TraceCheckUtils]: 31: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:40:28,454 INFO L272 TraceCheckUtils]: 30: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:40:28,454 INFO L290 TraceCheckUtils]: 29: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:28,455 INFO L290 TraceCheckUtils]: 28: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:28,455 INFO L290 TraceCheckUtils]: 27: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:40:28,456 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8248#true} {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:40:28,456 INFO L290 TraceCheckUtils]: 25: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,456 INFO L290 TraceCheckUtils]: 24: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,456 INFO L290 TraceCheckUtils]: 23: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-07 22:40:28,456 INFO L272 TraceCheckUtils]: 22: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-07 22:40:28,456 INFO L290 TraceCheckUtils]: 21: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:40:28,457 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:40:28,457 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:28,457 INFO L290 TraceCheckUtils]: 18: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:28,458 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:28,458 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:40:28,458 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:28,459 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:28,459 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:28,460 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:28,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:28,460 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:28,461 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:28,461 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:28,461 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:40:28,462 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-07 22:40:28,462 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-07 22:40:28,462 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:40:28,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1209317787] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:40:28,463 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:40:28,463 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 18] total 29 [2022-04-07 22:40:28,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032384222] [2022-04-07 22:40:28,463 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:40:28,463 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-07 22:40:28,464 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:40:28,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:40:28,525 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:40:28,525 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 22:40:28,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:40:28,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 22:40:28,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=727, Unknown=6, NotChecked=0, Total=812 [2022-04-07 22:40:28,526 INFO L87 Difference]: Start difference. First operand 69 states and 70 transitions. Second operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:40:37,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:40:37,791 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-07 22:40:37,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-07 22:40:37,792 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-07 22:40:37,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:40:37,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:40:37,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-07 22:40:37,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:40:37,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-07 22:40:37,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 74 transitions. [2022-04-07 22:40:37,854 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:40:37,856 INFO L225 Difference]: With dead ends: 122 [2022-04-07 22:40:37,856 INFO L226 Difference]: Without dead ends: 120 [2022-04-07 22:40:37,857 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 126 SyntacticMatches, 14 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 59.1s TimeCoverageRelationStatistics Valid=219, Invalid=2221, Unknown=10, NotChecked=0, Total=2450 [2022-04-07 22:40:37,857 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 64 mSDsluCounter, 160 mSDsCounter, 0 mSdLazyCounter, 685 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 786 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 685 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 81 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 22:40:37,857 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [65 Valid, 189 Invalid, 786 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 685 Invalid, 0 Unknown, 81 Unchecked, 0.5s Time] [2022-04-07 22:40:37,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-07 22:40:37,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 80. [2022-04-07 22:40:37,904 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:40:37,904 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:40:37,904 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:40:37,904 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:40:37,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:40:37,906 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2022-04-07 22:40:37,906 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2022-04-07 22:40:37,906 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:40:37,906 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:40:37,906 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) Second operand 120 states. [2022-04-07 22:40:37,906 INFO L87 Difference]: Start difference. First operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) Second operand 120 states. [2022-04-07 22:40:37,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:40:37,908 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2022-04-07 22:40:37,908 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2022-04-07 22:40:37,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:40:37,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:40:37,908 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:40:37,908 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:40:37,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 22:40:37,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 82 transitions. [2022-04-07 22:40:37,909 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 82 transitions. Word has length 66 [2022-04-07 22:40:37,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:40:37,909 INFO L478 AbstractCegarLoop]: Abstraction has 80 states and 82 transitions. [2022-04-07 22:40:37,909 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:40:37,910 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-07 22:40:37,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-07 22:40:37,910 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:40:37,910 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:40:37,926 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 22:40:38,126 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:40:38,126 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:40:38,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:40:38,127 INFO L85 PathProgramCache]: Analyzing trace with hash 1865758983, now seen corresponding path program 14 times [2022-04-07 22:40:38,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:40:38,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1344517504] [2022-04-07 22:40:38,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:40:38,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:40:38,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,349 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:40:38,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,356 INFO L290 TraceCheckUtils]: 0: Hoare triple {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-07 22:40:38,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,356 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,356 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 22:40:38,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,359 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,360 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:38,360 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 22:40:38,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,363 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,363 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,363 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,364 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,364 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 22:40:38,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,366 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,367 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:38,367 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 22:40:38,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,369 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:38,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 22:40:38,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,373 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,373 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:38,374 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:40:38,374 INFO L290 TraceCheckUtils]: 1: Hoare triple {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-07 22:40:38,374 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,374 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,374 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,374 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-07 22:40:38,375 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:40:38,375 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:40:38,375 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:38,376 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:40:38,376 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:38,377 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:40:38,377 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:38,378 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:40:38,378 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:38,378 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:40:38,379 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:40:38,379 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:40:38,380 INFO L290 TraceCheckUtils]: 18: Hoare triple {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:40:38,381 INFO L290 TraceCheckUtils]: 19: Hoare triple {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:38,381 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:38,381 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:40:38,381 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:38,382 INFO L290 TraceCheckUtils]: 23: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:38,382 INFO L272 TraceCheckUtils]: 24: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:40:38,382 INFO L290 TraceCheckUtils]: 25: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,382 INFO L290 TraceCheckUtils]: 26: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,382 INFO L290 TraceCheckUtils]: 27: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,383 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9265#true} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:38,383 INFO L290 TraceCheckUtils]: 29: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:40:38,384 INFO L290 TraceCheckUtils]: 30: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,384 INFO L290 TraceCheckUtils]: 31: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,384 INFO L272 TraceCheckUtils]: 32: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:40:38,384 INFO L290 TraceCheckUtils]: 33: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,384 INFO L290 TraceCheckUtils]: 34: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,384 INFO L290 TraceCheckUtils]: 35: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,385 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,385 INFO L290 TraceCheckUtils]: 37: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,386 INFO L290 TraceCheckUtils]: 38: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:38,386 INFO L290 TraceCheckUtils]: 39: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:38,386 INFO L272 TraceCheckUtils]: 40: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:40:38,386 INFO L290 TraceCheckUtils]: 41: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,386 INFO L290 TraceCheckUtils]: 42: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,386 INFO L290 TraceCheckUtils]: 43: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,387 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:38,387 INFO L290 TraceCheckUtils]: 45: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:40:38,388 INFO L290 TraceCheckUtils]: 46: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:38,388 INFO L290 TraceCheckUtils]: 47: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:38,388 INFO L272 TraceCheckUtils]: 48: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:40:38,388 INFO L290 TraceCheckUtils]: 49: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,388 INFO L290 TraceCheckUtils]: 50: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,388 INFO L290 TraceCheckUtils]: 51: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,389 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:38,389 INFO L290 TraceCheckUtils]: 53: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:40:38,390 INFO L290 TraceCheckUtils]: 54: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:38,390 INFO L290 TraceCheckUtils]: 55: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:38,390 INFO L272 TraceCheckUtils]: 56: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:40:38,390 INFO L290 TraceCheckUtils]: 57: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:40:38,390 INFO L290 TraceCheckUtils]: 58: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,390 INFO L290 TraceCheckUtils]: 59: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:40:38,391 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:38,391 INFO L290 TraceCheckUtils]: 61: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:40:38,392 INFO L290 TraceCheckUtils]: 62: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:40:38,392 INFO L290 TraceCheckUtils]: 63: Hoare triple {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:40:38,392 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9306#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:40:38,393 INFO L290 TraceCheckUtils]: 65: Hoare triple {9306#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9307#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:40:38,393 INFO L290 TraceCheckUtils]: 66: Hoare triple {9307#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:40:38,393 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:40:38,393 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:40:38,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:40:38,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1344517504] [2022-04-07 22:40:38,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1344517504] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:40:38,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [650638487] [2022-04-07 22:40:38,394 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:40:38,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:40:38,394 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:40:38,395 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:40:38,399 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 22:40:38,461 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:40:38,461 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:40:38,462 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 22:40:38,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:40:38,474 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:40:38,555 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:40:38,765 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 22:40:38,765 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 22:41:28,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:41:28,049 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:28,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-07 22:41:28,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:28,050 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:28,050 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:28,050 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-07 22:41:28,050 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:41:28,050 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:41:28,051 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:28,051 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:28,051 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:28,052 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:28,052 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:28,053 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:28,053 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:28,053 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:28,054 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:41:28,054 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:41:28,055 INFO L290 TraceCheckUtils]: 18: Hoare triple {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9366#(exists ((v_main_~i~0_120 Int)) (and (<= 5 v_main_~i~0_120) (<= (+ v_main_~i~0_120 1) main_~i~0) (<= v_main_~i~0_120 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_120))) 0)))} is VALID [2022-04-07 22:41:28,056 INFO L290 TraceCheckUtils]: 19: Hoare triple {9366#(exists ((v_main_~i~0_120 Int)) (and (<= 5 v_main_~i~0_120) (<= (+ v_main_~i~0_120 1) main_~i~0) (<= v_main_~i~0_120 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_120))) 0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:28,056 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:28,056 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:28,057 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:28,057 INFO L290 TraceCheckUtils]: 23: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:28,058 INFO L272 TraceCheckUtils]: 24: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,058 INFO L290 TraceCheckUtils]: 25: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,059 INFO L290 TraceCheckUtils]: 26: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,059 INFO L290 TraceCheckUtils]: 27: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,059 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:28,060 INFO L290 TraceCheckUtils]: 29: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:28,060 INFO L290 TraceCheckUtils]: 30: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:41:28,061 INFO L290 TraceCheckUtils]: 31: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:41:28,061 INFO L272 TraceCheckUtils]: 32: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,062 INFO L290 TraceCheckUtils]: 33: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,062 INFO L290 TraceCheckUtils]: 34: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,062 INFO L290 TraceCheckUtils]: 35: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,063 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:41:28,063 INFO L290 TraceCheckUtils]: 37: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:41:28,063 INFO L290 TraceCheckUtils]: 38: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,064 INFO L290 TraceCheckUtils]: 39: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,065 INFO L272 TraceCheckUtils]: 40: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,065 INFO L290 TraceCheckUtils]: 41: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,065 INFO L290 TraceCheckUtils]: 42: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,066 INFO L290 TraceCheckUtils]: 43: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,066 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,067 INFO L290 TraceCheckUtils]: 45: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,067 INFO L290 TraceCheckUtils]: 46: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,068 INFO L290 TraceCheckUtils]: 47: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,068 INFO L272 TraceCheckUtils]: 48: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,069 INFO L290 TraceCheckUtils]: 49: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,069 INFO L290 TraceCheckUtils]: 50: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,070 INFO L290 TraceCheckUtils]: 51: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,070 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,070 INFO L290 TraceCheckUtils]: 53: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:28,071 INFO L290 TraceCheckUtils]: 54: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:41:28,071 INFO L290 TraceCheckUtils]: 55: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:41:28,072 INFO L272 TraceCheckUtils]: 56: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,072 INFO L290 TraceCheckUtils]: 57: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,073 INFO L290 TraceCheckUtils]: 58: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,073 INFO L290 TraceCheckUtils]: 59: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-07 22:41:28,073 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:41:28,074 INFO L290 TraceCheckUtils]: 61: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:41:28,074 INFO L290 TraceCheckUtils]: 62: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 22:41:28,074 INFO L290 TraceCheckUtils]: 63: Hoare triple {9504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:41:28,075 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:41:28,075 INFO L290 TraceCheckUtils]: 65: Hoare triple {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9515#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:41:28,075 INFO L290 TraceCheckUtils]: 66: Hoare triple {9515#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:41:28,076 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:41:28,076 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:41:28,076 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:41:30,363 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:41:30,367 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:41:30,451 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:41:30,452 INFO L290 TraceCheckUtils]: 66: Hoare triple {9515#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-07 22:41:30,452 INFO L290 TraceCheckUtils]: 65: Hoare triple {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9515#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:41:30,452 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:41:30,453 INFO L290 TraceCheckUtils]: 63: Hoare triple {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:41:30,453 INFO L290 TraceCheckUtils]: 62: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:30,454 INFO L290 TraceCheckUtils]: 61: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:30,454 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:30,454 INFO L290 TraceCheckUtils]: 59: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,454 INFO L290 TraceCheckUtils]: 58: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,454 INFO L290 TraceCheckUtils]: 57: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:41:30,454 INFO L272 TraceCheckUtils]: 56: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:41:30,455 INFO L290 TraceCheckUtils]: 55: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:30,455 INFO L290 TraceCheckUtils]: 54: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:30,456 INFO L290 TraceCheckUtils]: 53: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:30,456 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:30,456 INFO L290 TraceCheckUtils]: 51: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,456 INFO L290 TraceCheckUtils]: 50: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,456 INFO L290 TraceCheckUtils]: 49: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:41:30,456 INFO L272 TraceCheckUtils]: 48: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:41:30,457 INFO L290 TraceCheckUtils]: 47: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:30,457 INFO L290 TraceCheckUtils]: 46: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:30,458 INFO L290 TraceCheckUtils]: 45: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:30,458 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:30,458 INFO L290 TraceCheckUtils]: 43: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,458 INFO L290 TraceCheckUtils]: 42: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,458 INFO L290 TraceCheckUtils]: 41: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:41:30,458 INFO L272 TraceCheckUtils]: 40: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:41:30,459 INFO L290 TraceCheckUtils]: 39: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:30,459 INFO L290 TraceCheckUtils]: 38: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:30,460 INFO L290 TraceCheckUtils]: 37: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:30,460 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:30,460 INFO L290 TraceCheckUtils]: 35: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,460 INFO L290 TraceCheckUtils]: 34: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,460 INFO L290 TraceCheckUtils]: 33: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:41:30,460 INFO L272 TraceCheckUtils]: 32: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:41:30,461 INFO L290 TraceCheckUtils]: 31: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:30,461 INFO L290 TraceCheckUtils]: 30: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:30,462 INFO L290 TraceCheckUtils]: 29: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:41:30,462 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9265#true} {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:41:30,462 INFO L290 TraceCheckUtils]: 27: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,462 INFO L290 TraceCheckUtils]: 26: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,462 INFO L290 TraceCheckUtils]: 25: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-07 22:41:30,462 INFO L272 TraceCheckUtils]: 24: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-07 22:41:30,463 INFO L290 TraceCheckUtils]: 23: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:41:30,463 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:41:30,463 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:30,464 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:30,464 INFO L290 TraceCheckUtils]: 19: Hoare triple {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:30,465 INFO L290 TraceCheckUtils]: 18: Hoare triple {9670#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:30,465 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9670#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-07 22:41:30,465 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:41:30,466 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:30,466 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:30,467 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:30,467 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:30,467 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:30,468 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:30,468 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:30,468 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:30,469 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:41:30,469 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-07 22:41:30,469 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-07 22:41:30,469 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,469 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,469 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-07 22:41:30,469 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-07 22:41:30,470 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:41:30,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [650638487] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:41:30,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:41:30,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 20] total 32 [2022-04-07 22:41:30,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59517945] [2022-04-07 22:41:30,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:41:30,471 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-07 22:41:30,471 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:41:30,471 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:41:30,536 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:41:30,536 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 22:41:30,536 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:41:30,543 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 22:41:30,543 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=892, Unknown=6, NotChecked=0, Total=992 [2022-04-07 22:41:30,544 INFO L87 Difference]: Start difference. First operand 80 states and 82 transitions. Second operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:41:31,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:41:31,866 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2022-04-07 22:41:31,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-07 22:41:31,867 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-07 22:41:31,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:41:31,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:41:31,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 78 transitions. [2022-04-07 22:41:31,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:41:31,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 78 transitions. [2022-04-07 22:41:31,869 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 78 transitions. [2022-04-07 22:41:31,943 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:41:31,945 INFO L225 Difference]: With dead ends: 156 [2022-04-07 22:41:31,945 INFO L226 Difference]: Without dead ends: 154 [2022-04-07 22:41:31,946 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 128 SyntacticMatches, 15 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 51.1s TimeCoverageRelationStatistics Valid=227, Invalid=2317, Unknown=6, NotChecked=0, Total=2550 [2022-04-07 22:41:31,946 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 56 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 680 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 680 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 22:41:31,946 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [57 Valid, 229 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 680 Invalid, 0 Unknown, 88 Unchecked, 0.5s Time] [2022-04-07 22:41:31,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-04-07 22:41:32,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 127. [2022-04-07 22:41:32,000 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:41:32,001 INFO L82 GeneralOperation]: Start isEquivalent. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:41:32,001 INFO L74 IsIncluded]: Start isIncluded. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:41:32,001 INFO L87 Difference]: Start difference. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:41:32,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:41:32,003 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2022-04-07 22:41:32,003 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 161 transitions. [2022-04-07 22:41:32,004 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:41:32,004 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:41:32,004 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 154 states. [2022-04-07 22:41:32,004 INFO L87 Difference]: Start difference. First operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 154 states. [2022-04-07 22:41:32,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:41:32,006 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2022-04-07 22:41:32,006 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 161 transitions. [2022-04-07 22:41:32,007 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:41:32,007 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:41:32,007 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:41:32,007 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:41:32,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:41:32,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 134 transitions. [2022-04-07 22:41:32,010 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 134 transitions. Word has length 68 [2022-04-07 22:41:32,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:41:32,010 INFO L478 AbstractCegarLoop]: Abstraction has 127 states and 134 transitions. [2022-04-07 22:41:32,010 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 22:41:32,010 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 134 transitions. [2022-04-07 22:41:32,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-07 22:41:32,010 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:41:32,010 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:41:32,026 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-07 22:41:32,215 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 22:41:32,215 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:41:32,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:41:32,216 INFO L85 PathProgramCache]: Analyzing trace with hash 1135764165, now seen corresponding path program 15 times [2022-04-07 22:41:32,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:41:32,216 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741974443] [2022-04-07 22:41:32,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:41:32,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:41:32,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,472 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:41:32,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-07 22:41:32,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,484 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,484 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:41:32,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,486 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,486 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,486 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,487 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:32,487 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 22:41:32,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,489 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,489 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 22:41:32,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,492 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:32,492 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 22:41:32,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,503 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:32,504 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 22:41:32,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,507 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,507 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,507 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:32,508 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:41:32,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-07 22:41:32,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-07 22:41:32,508 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:41:32,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:41:32,509 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:32,510 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:41:32,510 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:32,510 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:41:32,511 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:32,511 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:41:32,512 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:32,512 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:41:32,512 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:41:32,513 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:41:32,513 INFO L290 TraceCheckUtils]: 18: Hoare triple {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 22:41:32,514 INFO L290 TraceCheckUtils]: 19: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 22:41:32,514 INFO L290 TraceCheckUtils]: 20: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:41:32,515 INFO L290 TraceCheckUtils]: 21: Hoare triple {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:32,515 INFO L290 TraceCheckUtils]: 22: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:32,515 INFO L290 TraceCheckUtils]: 23: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:41:32,516 INFO L290 TraceCheckUtils]: 24: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:32,516 INFO L290 TraceCheckUtils]: 25: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:32,516 INFO L272 TraceCheckUtils]: 26: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:41:32,516 INFO L290 TraceCheckUtils]: 27: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,516 INFO L290 TraceCheckUtils]: 28: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,516 INFO L290 TraceCheckUtils]: 29: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,517 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10479#true} {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:32,517 INFO L290 TraceCheckUtils]: 31: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:41:32,518 INFO L290 TraceCheckUtils]: 32: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,519 INFO L290 TraceCheckUtils]: 33: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,519 INFO L272 TraceCheckUtils]: 34: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:41:32,519 INFO L290 TraceCheckUtils]: 35: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,519 INFO L290 TraceCheckUtils]: 36: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,519 INFO L290 TraceCheckUtils]: 37: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,519 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,520 INFO L290 TraceCheckUtils]: 39: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,520 INFO L290 TraceCheckUtils]: 40: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:32,521 INFO L290 TraceCheckUtils]: 41: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:32,521 INFO L272 TraceCheckUtils]: 42: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:41:32,521 INFO L290 TraceCheckUtils]: 43: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,521 INFO L290 TraceCheckUtils]: 44: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,521 INFO L290 TraceCheckUtils]: 45: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,521 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:32,522 INFO L290 TraceCheckUtils]: 47: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:41:32,522 INFO L290 TraceCheckUtils]: 48: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:32,523 INFO L290 TraceCheckUtils]: 49: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:32,523 INFO L272 TraceCheckUtils]: 50: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:41:32,523 INFO L290 TraceCheckUtils]: 51: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,523 INFO L290 TraceCheckUtils]: 52: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,523 INFO L290 TraceCheckUtils]: 53: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,523 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:32,524 INFO L290 TraceCheckUtils]: 55: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:41:32,524 INFO L290 TraceCheckUtils]: 56: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:32,525 INFO L290 TraceCheckUtils]: 57: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:32,525 INFO L272 TraceCheckUtils]: 58: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:41:32,525 INFO L290 TraceCheckUtils]: 59: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:41:32,525 INFO L290 TraceCheckUtils]: 60: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,525 INFO L290 TraceCheckUtils]: 61: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:41:32,525 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:32,526 INFO L290 TraceCheckUtils]: 63: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:41:32,526 INFO L290 TraceCheckUtils]: 64: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:41:32,527 INFO L290 TraceCheckUtils]: 65: Hoare triple {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:41:32,527 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10521#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:41:32,527 INFO L290 TraceCheckUtils]: 67: Hoare triple {10521#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10522#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:41:32,527 INFO L290 TraceCheckUtils]: 68: Hoare triple {10522#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:41:32,528 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:41:32,528 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 114 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:41:32,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:41:32,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741974443] [2022-04-07 22:41:32,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741974443] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:41:32,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2031234610] [2022-04-07 22:41:32,528 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:41:32,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:41:32,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:41:32,529 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:41:32,530 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 22:41:32,622 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-07 22:41:32,622 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:41:32,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-07 22:41:32,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:41:32,637 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:41:32,722 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:41:32,828 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:41:32,828 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:41:32,850 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:41:32,850 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:42:26,641 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:42:26,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:26,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-07 22:42:26,688 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:26,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:26,688 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:26,688 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-07 22:42:26,689 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:42:26,689 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:42:26,689 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:26,690 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:26,690 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:26,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:26,691 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:26,691 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:26,691 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:26,692 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:26,692 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:42:26,693 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:42:26,693 INFO L290 TraceCheckUtils]: 18: Hoare triple {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 22:42:26,694 INFO L290 TraceCheckUtils]: 19: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:42:26,694 INFO L290 TraceCheckUtils]: 20: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:42:26,695 INFO L290 TraceCheckUtils]: 21: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:42:26,696 INFO L290 TraceCheckUtils]: 22: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:42:26,696 INFO L290 TraceCheckUtils]: 23: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-07 22:42:26,697 INFO L290 TraceCheckUtils]: 24: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:42:26,697 INFO L290 TraceCheckUtils]: 25: Hoare triple {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:42:26,704 INFO L272 TraceCheckUtils]: 26: Hoare triple {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,705 INFO L290 TraceCheckUtils]: 27: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,705 INFO L290 TraceCheckUtils]: 28: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,705 INFO L290 TraceCheckUtils]: 29: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,706 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:42:26,706 INFO L290 TraceCheckUtils]: 31: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:42:26,707 INFO L290 TraceCheckUtils]: 32: Hoare triple {10600#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:42:26,707 INFO L290 TraceCheckUtils]: 33: Hoare triple {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:42:26,708 INFO L272 TraceCheckUtils]: 34: Hoare triple {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,708 INFO L290 TraceCheckUtils]: 35: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,708 INFO L290 TraceCheckUtils]: 36: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,709 INFO L290 TraceCheckUtils]: 37: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,709 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:42:26,709 INFO L290 TraceCheckUtils]: 39: Hoare triple {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:42:26,710 INFO L290 TraceCheckUtils]: 40: Hoare triple {10626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,710 INFO L290 TraceCheckUtils]: 41: Hoare triple {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,711 INFO L272 TraceCheckUtils]: 42: Hoare triple {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,711 INFO L290 TraceCheckUtils]: 43: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,711 INFO L290 TraceCheckUtils]: 44: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,712 INFO L290 TraceCheckUtils]: 45: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,712 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,713 INFO L290 TraceCheckUtils]: 47: Hoare triple {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,713 INFO L290 TraceCheckUtils]: 48: Hoare triple {10651#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,713 INFO L290 TraceCheckUtils]: 49: Hoare triple {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,714 INFO L272 TraceCheckUtils]: 50: Hoare triple {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,715 INFO L290 TraceCheckUtils]: 51: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,715 INFO L290 TraceCheckUtils]: 52: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,715 INFO L290 TraceCheckUtils]: 53: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,716 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,716 INFO L290 TraceCheckUtils]: 55: Hoare triple {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,717 INFO L290 TraceCheckUtils]: 56: Hoare triple {10676#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,717 INFO L290 TraceCheckUtils]: 57: Hoare triple {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,718 INFO L272 TraceCheckUtils]: 58: Hoare triple {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,718 INFO L290 TraceCheckUtils]: 59: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,719 INFO L290 TraceCheckUtils]: 60: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,719 INFO L290 TraceCheckUtils]: 61: Hoare triple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-07 22:42:26,720 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10607#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,720 INFO L290 TraceCheckUtils]: 63: Hoare triple {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:26,721 INFO L290 TraceCheckUtils]: 64: Hoare triple {10701#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10726#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 22:42:26,721 INFO L290 TraceCheckUtils]: 65: Hoare triple {10726#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:42:26,721 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:42:26,722 INFO L290 TraceCheckUtils]: 67: Hoare triple {10733#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10737#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:42:26,722 INFO L290 TraceCheckUtils]: 68: Hoare triple {10737#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:42:26,722 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:42:26,723 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 2 proven. 122 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 22:42:26,723 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:42:29,310 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) is different from false [2022-04-07 22:42:29,608 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:42:29,612 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:42:29,698 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:42:29,698 INFO L290 TraceCheckUtils]: 68: Hoare triple {10737#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-07 22:42:29,698 INFO L290 TraceCheckUtils]: 67: Hoare triple {10733#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10737#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:42:29,699 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:42:29,699 INFO L290 TraceCheckUtils]: 65: Hoare triple {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:42:29,700 INFO L290 TraceCheckUtils]: 64: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:29,700 INFO L290 TraceCheckUtils]: 63: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:29,700 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:29,701 INFO L290 TraceCheckUtils]: 61: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,701 INFO L290 TraceCheckUtils]: 60: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,701 INFO L290 TraceCheckUtils]: 59: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:42:29,701 INFO L272 TraceCheckUtils]: 58: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:42:29,701 INFO L290 TraceCheckUtils]: 57: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:29,702 INFO L290 TraceCheckUtils]: 56: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:29,702 INFO L290 TraceCheckUtils]: 55: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:29,703 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:29,703 INFO L290 TraceCheckUtils]: 53: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,703 INFO L290 TraceCheckUtils]: 52: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,703 INFO L290 TraceCheckUtils]: 51: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:42:29,703 INFO L272 TraceCheckUtils]: 50: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:42:29,709 INFO L290 TraceCheckUtils]: 49: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:29,710 INFO L290 TraceCheckUtils]: 48: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:29,710 INFO L290 TraceCheckUtils]: 47: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:29,711 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:29,711 INFO L290 TraceCheckUtils]: 45: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,711 INFO L290 TraceCheckUtils]: 44: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,711 INFO L290 TraceCheckUtils]: 43: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:42:29,711 INFO L272 TraceCheckUtils]: 42: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:42:29,712 INFO L290 TraceCheckUtils]: 41: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:29,712 INFO L290 TraceCheckUtils]: 40: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:29,712 INFO L290 TraceCheckUtils]: 39: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:29,713 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:29,713 INFO L290 TraceCheckUtils]: 37: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,713 INFO L290 TraceCheckUtils]: 36: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,713 INFO L290 TraceCheckUtils]: 35: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:42:29,713 INFO L272 TraceCheckUtils]: 34: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:42:29,714 INFO L290 TraceCheckUtils]: 33: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:29,714 INFO L290 TraceCheckUtils]: 32: Hoare triple {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:29,715 INFO L290 TraceCheckUtils]: 31: Hoare triple {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:29,715 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10479#true} {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:29,715 INFO L290 TraceCheckUtils]: 29: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,715 INFO L290 TraceCheckUtils]: 28: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,715 INFO L290 TraceCheckUtils]: 27: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-07 22:42:29,715 INFO L272 TraceCheckUtils]: 26: Hoare triple {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-07 22:42:29,716 INFO L290 TraceCheckUtils]: 25: Hoare triple {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:29,716 INFO L290 TraceCheckUtils]: 24: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10855#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:29,716 INFO L290 TraceCheckUtils]: 23: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:42:29,717 INFO L290 TraceCheckUtils]: 22: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:42:29,718 INFO L290 TraceCheckUtils]: 21: Hoare triple {10889#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 22:42:29,719 INFO L290 TraceCheckUtils]: 20: Hoare triple {10889#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10889#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:29,719 INFO L290 TraceCheckUtils]: 19: Hoare triple {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10889#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:29,720 INFO L290 TraceCheckUtils]: 18: Hoare triple {10899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 22:42:29,720 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-07 22:42:29,721 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:42:29,721 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:29,722 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:29,722 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:29,722 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:29,723 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:29,723 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:29,724 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:29,724 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:29,724 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:42:29,725 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-07 22:42:29,725 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-07 22:42:29,725 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 15 not checked. [2022-04-07 22:42:29,725 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2031234610] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:42:29,726 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:42:29,726 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 23, 21] total 35 [2022-04-07 22:42:29,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597090453] [2022-04-07 22:42:29,726 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:42:29,726 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) Word has length 70 [2022-04-07 22:42:29,727 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:42:29,727 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:42:29,800 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:42:29,801 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-07 22:42:29,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:42:29,801 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-07 22:42:29,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=1000, Unknown=15, NotChecked=64, Total=1190 [2022-04-07 22:42:29,802 INFO L87 Difference]: Start difference. First operand 127 states and 134 transitions. Second operand has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:42:30,692 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 20)) 0) (<= 6 c_main_~i~0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-07 22:42:31,338 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 20))) (and (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (not (= .cse0 (+ (* c_main_~i~0 4) c_main_~x~0.offset))))) is different from false [2022-04-07 22:42:32,027 WARN L833 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 20)) 0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (exists ((main_~i~0 Int)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4))) 0))) is different from false [2022-04-07 22:42:42,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:42,240 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2022-04-07 22:42:42,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-04-07 22:42:42,240 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) Word has length 70 [2022-04-07 22:42:42,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:42:42,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:42:42,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 83 transitions. [2022-04-07 22:42:42,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:42:42,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 83 transitions. [2022-04-07 22:42:42,242 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 35 states and 83 transitions. [2022-04-07 22:42:42,321 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:42:42,323 INFO L225 Difference]: With dead ends: 153 [2022-04-07 22:42:42,323 INFO L226 Difference]: Without dead ends: 151 [2022-04-07 22:42:42,324 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 204 GetRequests, 131 SyntacticMatches, 15 SemanticMatches, 58 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 711 ImplicationChecksByTransitivity, 66.2s TimeCoverageRelationStatistics Valid=275, Invalid=2796, Unknown=25, NotChecked=444, Total=3540 [2022-04-07 22:42:42,324 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 77 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 745 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 203 SdHoareTripleChecker+Invalid, 953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 745 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 176 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 22:42:42,324 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [78 Valid, 203 Invalid, 953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 745 Invalid, 0 Unknown, 176 Unchecked, 0.5s Time] [2022-04-07 22:42:42,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2022-04-07 22:42:42,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 139. [2022-04-07 22:42:42,382 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:42:42,382 INFO L82 GeneralOperation]: Start isEquivalent. First operand 151 states. Second operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 22:42:42,382 INFO L74 IsIncluded]: Start isIncluded. First operand 151 states. Second operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 22:42:42,382 INFO L87 Difference]: Start difference. First operand 151 states. Second operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 22:42:42,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:42,384 INFO L93 Difference]: Finished difference Result 151 states and 160 transitions. [2022-04-07 22:42:42,384 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2022-04-07 22:42:42,385 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:42:42,385 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:42:42,385 INFO L74 IsIncluded]: Start isIncluded. First operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 151 states. [2022-04-07 22:42:42,385 INFO L87 Difference]: Start difference. First operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 151 states. [2022-04-07 22:42:42,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:42,387 INFO L93 Difference]: Finished difference Result 151 states and 160 transitions. [2022-04-07 22:42:42,387 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2022-04-07 22:42:42,387 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:42:42,387 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:42:42,387 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:42:42,387 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:42:42,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 106 states have (on average 1.0377358490566038) internal successors, (110), 109 states have internal predecessors, (110), 19 states have call successors, (19), 14 states have call predecessors, (19), 13 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 22:42:42,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2022-04-07 22:42:42,389 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 70 [2022-04-07 22:42:42,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:42:42,390 INFO L478 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2022-04-07 22:42:42,390 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.3529411764705883) internal successors, (80), 32 states have internal predecessors, (80), 13 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-07 22:42:42,390 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2022-04-07 22:42:42,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-07 22:42:42,390 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:42:42,390 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:42:42,409 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 22:42:42,603 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 22:42:42,603 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:42:42,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:42:42,604 INFO L85 PathProgramCache]: Analyzing trace with hash -126822625, now seen corresponding path program 16 times [2022-04-07 22:42:42,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:42:42,604 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437665044] [2022-04-07 22:42:42,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:42:42,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:42:42,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,753 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:42:42,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,756 INFO L290 TraceCheckUtils]: 0: Hoare triple {11772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11728#true} is VALID [2022-04-07 22:42:42,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,757 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11728#true} {11728#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,757 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 22:42:42,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,759 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,759 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,759 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,759 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 22:42:42,760 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 22:42:42,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,761 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,762 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,762 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,762 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11746#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:42,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 22:42:42,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,764 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,764 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,764 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,765 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11751#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:42,765 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 22:42:42,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,767 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,768 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11756#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:42,768 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 22:42:42,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,770 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11761#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:42,771 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-07 22:42:42,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,773 INFO L290 TraceCheckUtils]: 0: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,773 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11766#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:42,774 INFO L272 TraceCheckUtils]: 0: Hoare triple {11728#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:42:42,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {11772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11728#true} is VALID [2022-04-07 22:42:42,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11728#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,774 INFO L272 TraceCheckUtils]: 4: Hoare triple {11728#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {11728#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11728#true} is VALID [2022-04-07 22:42:42,774 INFO L290 TraceCheckUtils]: 6: Hoare triple {11728#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11733#(= main_~i~0 0)} is VALID [2022-04-07 22:42:42,775 INFO L290 TraceCheckUtils]: 7: Hoare triple {11733#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11733#(= main_~i~0 0)} is VALID [2022-04-07 22:42:42,775 INFO L290 TraceCheckUtils]: 8: Hoare triple {11733#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:42,775 INFO L290 TraceCheckUtils]: 9: Hoare triple {11734#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:42,776 INFO L290 TraceCheckUtils]: 10: Hoare triple {11734#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:42,776 INFO L290 TraceCheckUtils]: 11: Hoare triple {11735#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:42,776 INFO L290 TraceCheckUtils]: 12: Hoare triple {11735#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:42,777 INFO L290 TraceCheckUtils]: 13: Hoare triple {11736#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:42,777 INFO L290 TraceCheckUtils]: 14: Hoare triple {11736#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:42,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {11737#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:42,778 INFO L290 TraceCheckUtils]: 16: Hoare triple {11737#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:42,778 INFO L290 TraceCheckUtils]: 17: Hoare triple {11738#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:42,779 INFO L290 TraceCheckUtils]: 18: Hoare triple {11738#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11739#(<= main_~i~0 6)} is VALID [2022-04-07 22:42:42,779 INFO L290 TraceCheckUtils]: 19: Hoare triple {11739#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11740#(<= main_~n~0 6)} is VALID [2022-04-07 22:42:42,780 INFO L290 TraceCheckUtils]: 20: Hoare triple {11740#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 22:42:42,780 INFO L290 TraceCheckUtils]: 21: Hoare triple {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 22:42:42,780 INFO L272 TraceCheckUtils]: 22: Hoare triple {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,780 INFO L290 TraceCheckUtils]: 23: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,780 INFO L290 TraceCheckUtils]: 24: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,780 INFO L290 TraceCheckUtils]: 25: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,781 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11728#true} {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 22:42:42,781 INFO L290 TraceCheckUtils]: 27: Hoare triple {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 22:42:42,782 INFO L290 TraceCheckUtils]: 28: Hoare triple {11741#(and (<= main_~n~0 6) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:42,782 INFO L290 TraceCheckUtils]: 29: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:42,782 INFO L272 TraceCheckUtils]: 30: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,782 INFO L290 TraceCheckUtils]: 31: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,782 INFO L290 TraceCheckUtils]: 32: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,782 INFO L290 TraceCheckUtils]: 33: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,783 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11728#true} {11746#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:42,783 INFO L290 TraceCheckUtils]: 35: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:42,784 INFO L290 TraceCheckUtils]: 36: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:42,784 INFO L290 TraceCheckUtils]: 37: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:42,784 INFO L272 TraceCheckUtils]: 38: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,784 INFO L290 TraceCheckUtils]: 39: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,784 INFO L290 TraceCheckUtils]: 40: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,784 INFO L290 TraceCheckUtils]: 41: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,785 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11728#true} {11751#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:42,785 INFO L290 TraceCheckUtils]: 43: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:42,785 INFO L290 TraceCheckUtils]: 44: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:42,786 INFO L290 TraceCheckUtils]: 45: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:42,786 INFO L272 TraceCheckUtils]: 46: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,786 INFO L290 TraceCheckUtils]: 47: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,786 INFO L290 TraceCheckUtils]: 48: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,786 INFO L290 TraceCheckUtils]: 49: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,787 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11728#true} {11756#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:42,787 INFO L290 TraceCheckUtils]: 51: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:42,788 INFO L290 TraceCheckUtils]: 52: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:42,788 INFO L290 TraceCheckUtils]: 53: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:42,788 INFO L272 TraceCheckUtils]: 54: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,788 INFO L290 TraceCheckUtils]: 55: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,788 INFO L290 TraceCheckUtils]: 56: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,788 INFO L290 TraceCheckUtils]: 57: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,789 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11728#true} {11761#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:42,789 INFO L290 TraceCheckUtils]: 59: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:42,790 INFO L290 TraceCheckUtils]: 60: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:42,790 INFO L290 TraceCheckUtils]: 61: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:42,790 INFO L272 TraceCheckUtils]: 62: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:42,790 INFO L290 TraceCheckUtils]: 63: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:42,790 INFO L290 TraceCheckUtils]: 64: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,790 INFO L290 TraceCheckUtils]: 65: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:42,791 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11728#true} {11766#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:42,791 INFO L290 TraceCheckUtils]: 67: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:42,792 INFO L290 TraceCheckUtils]: 68: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11771#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:42:42,792 INFO L290 TraceCheckUtils]: 69: Hoare triple {11771#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:42,792 INFO L272 TraceCheckUtils]: 70: Hoare triple {11729#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:42,792 INFO L290 TraceCheckUtils]: 71: Hoare triple {11729#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11729#false} is VALID [2022-04-07 22:42:42,792 INFO L290 TraceCheckUtils]: 72: Hoare triple {11729#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:42,792 INFO L290 TraceCheckUtils]: 73: Hoare triple {11729#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:42,792 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 63 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:42:42,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:42:42,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [437665044] [2022-04-07 22:42:42,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [437665044] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:42:42,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1408185601] [2022-04-07 22:42:42,793 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:42:42,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:42:42,793 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:42:42,794 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:42:42,795 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 22:42:42,875 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:42:42,875 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:42:42,876 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-07 22:42:42,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:42,892 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:42:43,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {11728#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11728#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L272 TraceCheckUtils]: 4: Hoare triple {11728#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L290 TraceCheckUtils]: 5: Hoare triple {11728#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11728#true} is VALID [2022-04-07 22:42:43,386 INFO L290 TraceCheckUtils]: 6: Hoare triple {11728#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11794#(<= main_~i~0 0)} is VALID [2022-04-07 22:42:43,387 INFO L290 TraceCheckUtils]: 7: Hoare triple {11794#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11794#(<= main_~i~0 0)} is VALID [2022-04-07 22:42:43,387 INFO L290 TraceCheckUtils]: 8: Hoare triple {11794#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:43,387 INFO L290 TraceCheckUtils]: 9: Hoare triple {11734#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:43,388 INFO L290 TraceCheckUtils]: 10: Hoare triple {11734#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:43,388 INFO L290 TraceCheckUtils]: 11: Hoare triple {11735#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:43,388 INFO L290 TraceCheckUtils]: 12: Hoare triple {11735#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:43,389 INFO L290 TraceCheckUtils]: 13: Hoare triple {11736#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:43,389 INFO L290 TraceCheckUtils]: 14: Hoare triple {11736#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:43,389 INFO L290 TraceCheckUtils]: 15: Hoare triple {11737#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:43,390 INFO L290 TraceCheckUtils]: 16: Hoare triple {11737#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:43,390 INFO L290 TraceCheckUtils]: 17: Hoare triple {11738#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:43,391 INFO L290 TraceCheckUtils]: 18: Hoare triple {11738#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11739#(<= main_~i~0 6)} is VALID [2022-04-07 22:42:43,391 INFO L290 TraceCheckUtils]: 19: Hoare triple {11739#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11740#(<= main_~n~0 6)} is VALID [2022-04-07 22:42:43,391 INFO L290 TraceCheckUtils]: 20: Hoare triple {11740#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 22:42:43,392 INFO L290 TraceCheckUtils]: 21: Hoare triple {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 22:42:43,392 INFO L272 TraceCheckUtils]: 22: Hoare triple {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,392 INFO L290 TraceCheckUtils]: 23: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,392 INFO L290 TraceCheckUtils]: 24: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,392 INFO L290 TraceCheckUtils]: 25: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,393 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11728#true} {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 22:42:43,393 INFO L290 TraceCheckUtils]: 27: Hoare triple {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 22:42:43,393 INFO L290 TraceCheckUtils]: 28: Hoare triple {11837#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 22:42:43,394 INFO L290 TraceCheckUtils]: 29: Hoare triple {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 22:42:43,394 INFO L272 TraceCheckUtils]: 30: Hoare triple {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,394 INFO L290 TraceCheckUtils]: 31: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,394 INFO L290 TraceCheckUtils]: 32: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,394 INFO L290 TraceCheckUtils]: 33: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,404 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11728#true} {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 22:42:43,405 INFO L290 TraceCheckUtils]: 35: Hoare triple {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 22:42:43,405 INFO L290 TraceCheckUtils]: 36: Hoare triple {11862#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 22:42:43,406 INFO L290 TraceCheckUtils]: 37: Hoare triple {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 22:42:43,406 INFO L272 TraceCheckUtils]: 38: Hoare triple {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,406 INFO L290 TraceCheckUtils]: 39: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,406 INFO L290 TraceCheckUtils]: 40: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,406 INFO L290 TraceCheckUtils]: 41: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,407 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11728#true} {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 22:42:43,407 INFO L290 TraceCheckUtils]: 43: Hoare triple {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 22:42:43,407 INFO L290 TraceCheckUtils]: 44: Hoare triple {11887#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 22:42:43,408 INFO L290 TraceCheckUtils]: 45: Hoare triple {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 22:42:43,408 INFO L272 TraceCheckUtils]: 46: Hoare triple {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,408 INFO L290 TraceCheckUtils]: 47: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,408 INFO L290 TraceCheckUtils]: 48: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,408 INFO L290 TraceCheckUtils]: 49: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,408 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11728#true} {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 22:42:43,409 INFO L290 TraceCheckUtils]: 51: Hoare triple {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 22:42:43,409 INFO L290 TraceCheckUtils]: 52: Hoare triple {11912#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 22:42:43,410 INFO L290 TraceCheckUtils]: 53: Hoare triple {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 22:42:43,410 INFO L272 TraceCheckUtils]: 54: Hoare triple {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,410 INFO L290 TraceCheckUtils]: 55: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,410 INFO L290 TraceCheckUtils]: 56: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,410 INFO L290 TraceCheckUtils]: 57: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,410 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11728#true} {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 22:42:43,411 INFO L290 TraceCheckUtils]: 59: Hoare triple {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 22:42:43,411 INFO L290 TraceCheckUtils]: 60: Hoare triple {11937#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 22:42:43,412 INFO L290 TraceCheckUtils]: 61: Hoare triple {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 22:42:43,412 INFO L272 TraceCheckUtils]: 62: Hoare triple {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,412 INFO L290 TraceCheckUtils]: 63: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,412 INFO L290 TraceCheckUtils]: 64: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,412 INFO L290 TraceCheckUtils]: 65: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,412 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11728#true} {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 22:42:43,413 INFO L290 TraceCheckUtils]: 67: Hoare triple {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 22:42:43,413 INFO L290 TraceCheckUtils]: 68: Hoare triple {11962#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11987#(and (<= main_~n~0 6) (<= 6 main_~i~1))} is VALID [2022-04-07 22:42:43,413 INFO L290 TraceCheckUtils]: 69: Hoare triple {11987#(and (<= main_~n~0 6) (<= 6 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:43,414 INFO L272 TraceCheckUtils]: 70: Hoare triple {11729#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:43,414 INFO L290 TraceCheckUtils]: 71: Hoare triple {11729#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11729#false} is VALID [2022-04-07 22:42:43,414 INFO L290 TraceCheckUtils]: 72: Hoare triple {11729#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:43,414 INFO L290 TraceCheckUtils]: 73: Hoare triple {11729#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:43,414 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:42:43,414 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:42:43,710 INFO L290 TraceCheckUtils]: 73: Hoare triple {11729#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:43,711 INFO L290 TraceCheckUtils]: 72: Hoare triple {11729#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11729#false} is VALID [2022-04-07 22:42:43,711 INFO L290 TraceCheckUtils]: 71: Hoare triple {11729#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11729#false} is VALID [2022-04-07 22:42:43,711 INFO L272 TraceCheckUtils]: 70: Hoare triple {11729#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:43,711 INFO L290 TraceCheckUtils]: 69: Hoare triple {11771#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11729#false} is VALID [2022-04-07 22:42:43,712 INFO L290 TraceCheckUtils]: 68: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11771#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:42:43,712 INFO L290 TraceCheckUtils]: 67: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:43,712 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11728#true} {11766#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:43,712 INFO L290 TraceCheckUtils]: 65: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,712 INFO L290 TraceCheckUtils]: 64: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,713 INFO L290 TraceCheckUtils]: 63: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,713 INFO L272 TraceCheckUtils]: 62: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,713 INFO L290 TraceCheckUtils]: 61: Hoare triple {11766#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:43,713 INFO L290 TraceCheckUtils]: 60: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11766#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:42:43,714 INFO L290 TraceCheckUtils]: 59: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:43,714 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11728#true} {11761#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:43,714 INFO L290 TraceCheckUtils]: 57: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,714 INFO L290 TraceCheckUtils]: 56: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,714 INFO L290 TraceCheckUtils]: 55: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,714 INFO L272 TraceCheckUtils]: 54: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,716 INFO L290 TraceCheckUtils]: 53: Hoare triple {11761#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:43,717 INFO L290 TraceCheckUtils]: 52: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11761#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:42:43,717 INFO L290 TraceCheckUtils]: 51: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:43,717 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11728#true} {11756#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:43,718 INFO L290 TraceCheckUtils]: 49: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,718 INFO L290 TraceCheckUtils]: 48: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,718 INFO L290 TraceCheckUtils]: 47: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,718 INFO L272 TraceCheckUtils]: 46: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,718 INFO L290 TraceCheckUtils]: 45: Hoare triple {11756#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:43,719 INFO L290 TraceCheckUtils]: 44: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11756#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:42:43,719 INFO L290 TraceCheckUtils]: 43: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:43,719 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11728#true} {11751#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:43,719 INFO L290 TraceCheckUtils]: 41: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,719 INFO L290 TraceCheckUtils]: 40: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,719 INFO L290 TraceCheckUtils]: 39: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,720 INFO L272 TraceCheckUtils]: 38: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,720 INFO L290 TraceCheckUtils]: 37: Hoare triple {11751#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:43,720 INFO L290 TraceCheckUtils]: 36: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11751#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:42:43,720 INFO L290 TraceCheckUtils]: 35: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:43,721 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11728#true} {11746#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:43,721 INFO L290 TraceCheckUtils]: 33: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,721 INFO L290 TraceCheckUtils]: 32: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,721 INFO L290 TraceCheckUtils]: 31: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,721 INFO L272 TraceCheckUtils]: 30: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,721 INFO L290 TraceCheckUtils]: 29: Hoare triple {11746#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:43,722 INFO L290 TraceCheckUtils]: 28: Hoare triple {12138#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11746#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:42:43,722 INFO L290 TraceCheckUtils]: 27: Hoare triple {12138#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12138#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:42:43,723 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11728#true} {12138#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12138#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:42:43,723 INFO L290 TraceCheckUtils]: 25: Hoare triple {11728#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,723 INFO L290 TraceCheckUtils]: 24: Hoare triple {11728#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,723 INFO L290 TraceCheckUtils]: 23: Hoare triple {11728#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11728#true} is VALID [2022-04-07 22:42:43,723 INFO L272 TraceCheckUtils]: 22: Hoare triple {12138#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11728#true} is VALID [2022-04-07 22:42:43,723 INFO L290 TraceCheckUtils]: 21: Hoare triple {12138#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12138#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:42:43,723 INFO L290 TraceCheckUtils]: 20: Hoare triple {11740#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12138#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:42:43,724 INFO L290 TraceCheckUtils]: 19: Hoare triple {11739#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11740#(<= main_~n~0 6)} is VALID [2022-04-07 22:42:43,724 INFO L290 TraceCheckUtils]: 18: Hoare triple {11738#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11739#(<= main_~i~0 6)} is VALID [2022-04-07 22:42:43,724 INFO L290 TraceCheckUtils]: 17: Hoare triple {11738#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:43,725 INFO L290 TraceCheckUtils]: 16: Hoare triple {11737#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11738#(<= main_~i~0 5)} is VALID [2022-04-07 22:42:43,725 INFO L290 TraceCheckUtils]: 15: Hoare triple {11737#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:43,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {11736#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11737#(<= main_~i~0 4)} is VALID [2022-04-07 22:42:43,726 INFO L290 TraceCheckUtils]: 13: Hoare triple {11736#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:43,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {11735#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11736#(<= main_~i~0 3)} is VALID [2022-04-07 22:42:43,727 INFO L290 TraceCheckUtils]: 11: Hoare triple {11735#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:43,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {11734#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11735#(<= main_~i~0 2)} is VALID [2022-04-07 22:42:43,728 INFO L290 TraceCheckUtils]: 9: Hoare triple {11734#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:43,728 INFO L290 TraceCheckUtils]: 8: Hoare triple {11794#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11734#(<= main_~i~0 1)} is VALID [2022-04-07 22:42:43,729 INFO L290 TraceCheckUtils]: 7: Hoare triple {11794#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11794#(<= main_~i~0 0)} is VALID [2022-04-07 22:42:43,729 INFO L290 TraceCheckUtils]: 6: Hoare triple {11728#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11794#(<= main_~i~0 0)} is VALID [2022-04-07 22:42:43,729 INFO L290 TraceCheckUtils]: 5: Hoare triple {11728#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11728#true} is VALID [2022-04-07 22:42:43,729 INFO L272 TraceCheckUtils]: 4: Hoare triple {11728#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11728#true} {11728#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {11728#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {11728#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11728#true} is VALID [2022-04-07 22:42:43,730 INFO L272 TraceCheckUtils]: 0: Hoare triple {11728#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11728#true} is VALID [2022-04-07 22:42:43,730 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:42:43,730 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1408185601] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:42:43,730 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:42:43,730 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 27 [2022-04-07 22:42:43,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559482681] [2022-04-07 22:42:43,730 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:42:43,731 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-07 22:42:43,731 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:42:43,731 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 22:42:43,794 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:42:43,794 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-07 22:42:43,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:42:43,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-07 22:42:43,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=543, Unknown=0, NotChecked=0, Total=702 [2022-04-07 22:42:43,795 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 22:42:44,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:44,570 INFO L93 Difference]: Finished difference Result 156 states and 165 transitions. [2022-04-07 22:42:44,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 22:42:44,571 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-07 22:42:44,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:42:44,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 22:42:44,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 78 transitions. [2022-04-07 22:42:44,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 22:42:44,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 78 transitions. [2022-04-07 22:42:44,573 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 78 transitions. [2022-04-07 22:42:44,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:42:44,628 INFO L225 Difference]: With dead ends: 156 [2022-04-07 22:42:44,628 INFO L226 Difference]: Without dead ends: 116 [2022-04-07 22:42:44,629 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 152 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=357, Invalid=1365, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 22:42:44,629 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 43 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 364 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 400 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 364 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:42:44,630 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 77 Invalid, 400 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 364 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:42:44,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-07 22:42:44,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-04-07 22:42:44,676 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:42:44,676 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 22:42:44,676 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 22:42:44,676 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 22:42:44,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:44,678 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-07 22:42:44,678 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 22:42:44,678 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:42:44,678 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:42:44,678 INFO L74 IsIncluded]: Start isIncluded. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-07 22:42:44,678 INFO L87 Difference]: Start difference. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-07 22:42:44,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:42:44,680 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-07 22:42:44,680 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 22:42:44,680 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:42:44,680 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:42:44,680 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:42:44,680 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:42:44,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 22:42:44,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2022-04-07 22:42:44,681 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 119 transitions. Word has length 74 [2022-04-07 22:42:44,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:42:44,682 INFO L478 AbstractCegarLoop]: Abstraction has 116 states and 119 transitions. [2022-04-07 22:42:44,682 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 22:42:44,682 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 22:42:44,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-07 22:42:44,682 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:42:44,682 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:42:44,699 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 22:42:44,898 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:42:44,899 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:42:44,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:42:44,899 INFO L85 PathProgramCache]: Analyzing trace with hash -578078115, now seen corresponding path program 17 times [2022-04-07 22:42:44,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:42:44,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669620594] [2022-04-07 22:42:44,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:42:44,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:42:44,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,169 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:42:45,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,172 INFO L290 TraceCheckUtils]: 0: Hoare triple {12920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12872#true} is VALID [2022-04-07 22:42:45,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,172 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12872#true} {12872#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,172 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 22:42:45,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,183 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,184 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:42:45,184 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 22:42:45,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,187 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,187 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,187 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,188 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:45,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 22:42:45,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,190 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,191 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 22:42:45,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,193 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,194 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:45,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 22:42:45,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,196 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,196 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:45,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-07 22:42:45,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,198 INFO L290 TraceCheckUtils]: 0: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,199 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:45,200 INFO L272 TraceCheckUtils]: 0: Hoare triple {12872#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:42:45,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {12920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12872#true} is VALID [2022-04-07 22:42:45,200 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,200 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12872#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,200 INFO L272 TraceCheckUtils]: 4: Hoare triple {12872#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,200 INFO L290 TraceCheckUtils]: 5: Hoare triple {12872#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12872#true} is VALID [2022-04-07 22:42:45,200 INFO L290 TraceCheckUtils]: 6: Hoare triple {12872#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:42:45,201 INFO L290 TraceCheckUtils]: 7: Hoare triple {12877#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:42:45,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {12877#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:45,202 INFO L290 TraceCheckUtils]: 9: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:42:45,202 INFO L290 TraceCheckUtils]: 10: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:45,202 INFO L290 TraceCheckUtils]: 11: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:42:45,203 INFO L290 TraceCheckUtils]: 12: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:45,203 INFO L290 TraceCheckUtils]: 13: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:42:45,204 INFO L290 TraceCheckUtils]: 14: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:45,204 INFO L290 TraceCheckUtils]: 15: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:42:45,205 INFO L290 TraceCheckUtils]: 16: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:42:45,205 INFO L290 TraceCheckUtils]: 17: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:42:45,206 INFO L290 TraceCheckUtils]: 18: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:42:45,206 INFO L290 TraceCheckUtils]: 19: Hoare triple {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12884#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:42:45,207 INFO L290 TraceCheckUtils]: 20: Hoare triple {12884#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:42:45,207 INFO L290 TraceCheckUtils]: 21: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:42:45,208 INFO L290 TraceCheckUtils]: 22: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:42:45,208 INFO L290 TraceCheckUtils]: 23: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:42:45,208 INFO L272 TraceCheckUtils]: 24: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,208 INFO L290 TraceCheckUtils]: 25: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,208 INFO L290 TraceCheckUtils]: 26: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,208 INFO L290 TraceCheckUtils]: 27: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,209 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12872#true} {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:42:45,209 INFO L290 TraceCheckUtils]: 29: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:42:45,210 INFO L290 TraceCheckUtils]: 30: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:45,210 INFO L290 TraceCheckUtils]: 31: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:45,210 INFO L272 TraceCheckUtils]: 32: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,210 INFO L290 TraceCheckUtils]: 33: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,210 INFO L290 TraceCheckUtils]: 34: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,210 INFO L290 TraceCheckUtils]: 35: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,211 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12872#true} {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:45,211 INFO L290 TraceCheckUtils]: 37: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:42:45,212 INFO L290 TraceCheckUtils]: 38: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,212 INFO L290 TraceCheckUtils]: 39: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,213 INFO L272 TraceCheckUtils]: 40: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,213 INFO L290 TraceCheckUtils]: 41: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,213 INFO L290 TraceCheckUtils]: 42: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,213 INFO L290 TraceCheckUtils]: 43: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,213 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12872#true} {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,214 INFO L290 TraceCheckUtils]: 45: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,214 INFO L290 TraceCheckUtils]: 46: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:45,215 INFO L290 TraceCheckUtils]: 47: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:45,215 INFO L272 TraceCheckUtils]: 48: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,215 INFO L290 TraceCheckUtils]: 49: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,215 INFO L290 TraceCheckUtils]: 50: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,215 INFO L290 TraceCheckUtils]: 51: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,215 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12872#true} {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:45,216 INFO L290 TraceCheckUtils]: 53: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:42:45,216 INFO L290 TraceCheckUtils]: 54: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:45,217 INFO L290 TraceCheckUtils]: 55: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:45,217 INFO L272 TraceCheckUtils]: 56: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,217 INFO L290 TraceCheckUtils]: 57: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,217 INFO L290 TraceCheckUtils]: 58: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,217 INFO L290 TraceCheckUtils]: 59: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,218 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12872#true} {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:45,218 INFO L290 TraceCheckUtils]: 61: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:42:45,218 INFO L290 TraceCheckUtils]: 62: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:45,219 INFO L290 TraceCheckUtils]: 63: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:45,219 INFO L272 TraceCheckUtils]: 64: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:42:45,219 INFO L290 TraceCheckUtils]: 65: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:42:45,219 INFO L290 TraceCheckUtils]: 66: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,219 INFO L290 TraceCheckUtils]: 67: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:42:45,220 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12872#true} {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:45,220 INFO L290 TraceCheckUtils]: 69: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:42:45,220 INFO L290 TraceCheckUtils]: 70: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:42:45,221 INFO L290 TraceCheckUtils]: 71: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12917#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:42:45,221 INFO L272 TraceCheckUtils]: 72: Hoare triple {12917#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12918#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:42:45,222 INFO L290 TraceCheckUtils]: 73: Hoare triple {12918#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12919#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:42:45,222 INFO L290 TraceCheckUtils]: 74: Hoare triple {12919#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:42:45,222 INFO L290 TraceCheckUtils]: 75: Hoare triple {12873#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:42:45,222 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:42:45,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:42:45,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669620594] [2022-04-07 22:42:45,223 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669620594] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:42:45,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [273295663] [2022-04-07 22:42:45,223 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:42:45,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:42:45,223 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:42:45,224 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:42:45,225 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 22:42:45,303 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-04-07 22:42:45,303 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:42:45,304 INFO L263 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-07 22:42:45,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:42:45,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:42:45,446 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:43:55,515 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:43:55,563 INFO L272 TraceCheckUtils]: 0: Hoare triple {12872#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12872#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L272 TraceCheckUtils]: 4: Hoare triple {12872#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L290 TraceCheckUtils]: 5: Hoare triple {12872#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12872#true} is VALID [2022-04-07 22:43:55,563 INFO L290 TraceCheckUtils]: 6: Hoare triple {12872#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:43:55,564 INFO L290 TraceCheckUtils]: 7: Hoare triple {12877#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:43:55,564 INFO L290 TraceCheckUtils]: 8: Hoare triple {12877#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:43:55,564 INFO L290 TraceCheckUtils]: 9: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:43:55,565 INFO L290 TraceCheckUtils]: 10: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:43:55,565 INFO L290 TraceCheckUtils]: 11: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:43:55,565 INFO L290 TraceCheckUtils]: 12: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:43:55,566 INFO L290 TraceCheckUtils]: 13: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:43:55,566 INFO L290 TraceCheckUtils]: 14: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:43:55,567 INFO L290 TraceCheckUtils]: 15: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:43:55,567 INFO L290 TraceCheckUtils]: 16: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:43:55,567 INFO L290 TraceCheckUtils]: 17: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:43:55,568 INFO L290 TraceCheckUtils]: 18: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:43:55,568 INFO L290 TraceCheckUtils]: 19: Hoare triple {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:55,569 INFO L290 TraceCheckUtils]: 20: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:55,569 INFO L290 TraceCheckUtils]: 21: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:55,569 INFO L290 TraceCheckUtils]: 22: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,570 INFO L290 TraceCheckUtils]: 23: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,570 INFO L272 TraceCheckUtils]: 24: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,571 INFO L290 TraceCheckUtils]: 25: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,571 INFO L290 TraceCheckUtils]: 26: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,572 INFO L290 TraceCheckUtils]: 27: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,572 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,573 INFO L290 TraceCheckUtils]: 29: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,573 INFO L290 TraceCheckUtils]: 30: Hoare triple {12886#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,574 INFO L290 TraceCheckUtils]: 31: Hoare triple {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,574 INFO L272 TraceCheckUtils]: 32: Hoare triple {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,575 INFO L290 TraceCheckUtils]: 33: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,575 INFO L290 TraceCheckUtils]: 34: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,575 INFO L290 TraceCheckUtils]: 35: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,576 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,576 INFO L290 TraceCheckUtils]: 37: Hoare triple {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,576 INFO L290 TraceCheckUtils]: 38: Hoare triple {13015#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,577 INFO L290 TraceCheckUtils]: 39: Hoare triple {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,577 INFO L272 TraceCheckUtils]: 40: Hoare triple {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,578 INFO L290 TraceCheckUtils]: 41: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,578 INFO L290 TraceCheckUtils]: 42: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,578 INFO L290 TraceCheckUtils]: 43: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,579 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,579 INFO L290 TraceCheckUtils]: 45: Hoare triple {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,579 INFO L290 TraceCheckUtils]: 46: Hoare triple {13040#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,580 INFO L290 TraceCheckUtils]: 47: Hoare triple {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,580 INFO L272 TraceCheckUtils]: 48: Hoare triple {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,581 INFO L290 TraceCheckUtils]: 49: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,581 INFO L290 TraceCheckUtils]: 50: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,581 INFO L290 TraceCheckUtils]: 51: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,582 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,582 INFO L290 TraceCheckUtils]: 53: Hoare triple {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,582 INFO L290 TraceCheckUtils]: 54: Hoare triple {13065#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,583 INFO L290 TraceCheckUtils]: 55: Hoare triple {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,583 INFO L272 TraceCheckUtils]: 56: Hoare triple {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,584 INFO L290 TraceCheckUtils]: 57: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,584 INFO L290 TraceCheckUtils]: 58: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,584 INFO L290 TraceCheckUtils]: 59: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,585 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,585 INFO L290 TraceCheckUtils]: 61: Hoare triple {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,585 INFO L290 TraceCheckUtils]: 62: Hoare triple {13090#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,586 INFO L290 TraceCheckUtils]: 63: Hoare triple {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,587 INFO L272 TraceCheckUtils]: 64: Hoare triple {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,587 INFO L290 TraceCheckUtils]: 65: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,587 INFO L290 TraceCheckUtils]: 66: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,587 INFO L290 TraceCheckUtils]: 67: Hoare triple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-07 22:43:55,588 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12996#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,588 INFO L290 TraceCheckUtils]: 69: Hoare triple {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,589 INFO L290 TraceCheckUtils]: 70: Hoare triple {13115#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13140#(and (= 5 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:43:55,589 INFO L290 TraceCheckUtils]: 71: Hoare triple {13140#(and (= 5 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12917#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:43:55,589 INFO L272 TraceCheckUtils]: 72: Hoare triple {12917#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13147#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:43:55,590 INFO L290 TraceCheckUtils]: 73: Hoare triple {13147#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13151#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:43:55,590 INFO L290 TraceCheckUtils]: 74: Hoare triple {13151#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:43:55,590 INFO L290 TraceCheckUtils]: 75: Hoare triple {12873#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:43:55,590 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:43:55,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:43:57,821 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:43:57,824 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:43:57,921 INFO L290 TraceCheckUtils]: 75: Hoare triple {12873#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:43:57,921 INFO L290 TraceCheckUtils]: 74: Hoare triple {13151#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12873#false} is VALID [2022-04-07 22:43:57,921 INFO L290 TraceCheckUtils]: 73: Hoare triple {13147#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13151#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:43:57,922 INFO L272 TraceCheckUtils]: 72: Hoare triple {12917#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13147#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:43:57,922 INFO L290 TraceCheckUtils]: 71: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12917#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:43:57,923 INFO L290 TraceCheckUtils]: 70: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:43:57,923 INFO L290 TraceCheckUtils]: 69: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:43:57,924 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12872#true} {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:43:57,924 INFO L290 TraceCheckUtils]: 67: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,924 INFO L290 TraceCheckUtils]: 66: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,924 INFO L290 TraceCheckUtils]: 65: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,924 INFO L272 TraceCheckUtils]: 64: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,924 INFO L290 TraceCheckUtils]: 63: Hoare triple {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:43:57,925 INFO L290 TraceCheckUtils]: 62: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12911#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:43:57,925 INFO L290 TraceCheckUtils]: 61: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:43:57,925 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12872#true} {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:43:57,926 INFO L290 TraceCheckUtils]: 59: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,926 INFO L290 TraceCheckUtils]: 58: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,926 INFO L290 TraceCheckUtils]: 57: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,926 INFO L272 TraceCheckUtils]: 56: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,926 INFO L290 TraceCheckUtils]: 55: Hoare triple {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:43:57,927 INFO L290 TraceCheckUtils]: 54: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12906#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:43:57,927 INFO L290 TraceCheckUtils]: 53: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:43:57,927 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12872#true} {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:43:57,928 INFO L290 TraceCheckUtils]: 51: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,928 INFO L290 TraceCheckUtils]: 50: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,928 INFO L290 TraceCheckUtils]: 49: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,928 INFO L272 TraceCheckUtils]: 48: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,928 INFO L290 TraceCheckUtils]: 47: Hoare triple {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:43:57,929 INFO L290 TraceCheckUtils]: 46: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12901#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:43:57,929 INFO L290 TraceCheckUtils]: 45: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:43:57,929 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12872#true} {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:43:57,930 INFO L290 TraceCheckUtils]: 43: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,930 INFO L290 TraceCheckUtils]: 42: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,930 INFO L290 TraceCheckUtils]: 41: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,930 INFO L272 TraceCheckUtils]: 40: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,930 INFO L290 TraceCheckUtils]: 39: Hoare triple {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:43:57,931 INFO L290 TraceCheckUtils]: 38: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12896#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:43:57,931 INFO L290 TraceCheckUtils]: 37: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:43:57,931 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12872#true} {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:43:57,931 INFO L290 TraceCheckUtils]: 35: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,932 INFO L290 TraceCheckUtils]: 34: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,932 INFO L290 TraceCheckUtils]: 33: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,932 INFO L272 TraceCheckUtils]: 32: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,932 INFO L290 TraceCheckUtils]: 31: Hoare triple {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:43:57,933 INFO L290 TraceCheckUtils]: 30: Hoare triple {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12891#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:43:57,933 INFO L290 TraceCheckUtils]: 29: Hoare triple {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:43:57,933 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12872#true} {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:43:57,933 INFO L290 TraceCheckUtils]: 27: Hoare triple {12872#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,933 INFO L290 TraceCheckUtils]: 26: Hoare triple {12872#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,933 INFO L290 TraceCheckUtils]: 25: Hoare triple {12872#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12872#true} is VALID [2022-04-07 22:43:57,934 INFO L272 TraceCheckUtils]: 24: Hoare triple {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12872#true} is VALID [2022-04-07 22:43:57,934 INFO L290 TraceCheckUtils]: 23: Hoare triple {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:43:57,934 INFO L290 TraceCheckUtils]: 22: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13293#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:43:57,934 INFO L290 TraceCheckUtils]: 21: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:57,935 INFO L290 TraceCheckUtils]: 20: Hoare triple {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:57,935 INFO L290 TraceCheckUtils]: 19: Hoare triple {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12885#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:43:57,936 INFO L290 TraceCheckUtils]: 18: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12883#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:43:57,936 INFO L290 TraceCheckUtils]: 17: Hoare triple {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:43:57,936 INFO L290 TraceCheckUtils]: 16: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12882#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:43:57,937 INFO L290 TraceCheckUtils]: 15: Hoare triple {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:43:57,937 INFO L290 TraceCheckUtils]: 14: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12881#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:43:57,938 INFO L290 TraceCheckUtils]: 13: Hoare triple {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:43:57,938 INFO L290 TraceCheckUtils]: 12: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12880#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:43:57,938 INFO L290 TraceCheckUtils]: 11: Hoare triple {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:43:57,939 INFO L290 TraceCheckUtils]: 10: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12879#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:43:57,939 INFO L290 TraceCheckUtils]: 9: Hoare triple {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:43:57,939 INFO L290 TraceCheckUtils]: 8: Hoare triple {12877#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12878#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:43:57,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {12877#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:43:57,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {12872#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12877#(= main_~i~0 0)} is VALID [2022-04-07 22:43:57,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {12872#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12872#true} is VALID [2022-04-07 22:43:57,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {12872#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12872#true} {12872#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {12872#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {12872#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12872#true} is VALID [2022-04-07 22:43:57,940 INFO L272 TraceCheckUtils]: 0: Hoare triple {12872#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12872#true} is VALID [2022-04-07 22:43:57,941 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:43:57,941 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [273295663] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:43:57,941 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:43:57,941 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 20] total 32 [2022-04-07 22:43:57,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548744402] [2022-04-07 22:43:57,941 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:43:57,942 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-07 22:43:57,942 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:43:57,942 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:43:58,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:43:58,020 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 22:43:58,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:43:58,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 22:43:58,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=897, Unknown=7, NotChecked=0, Total=992 [2022-04-07 22:43:58,021 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. Second operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:43:59,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:43:59,759 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2022-04-07 22:43:59,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-07 22:43:59,760 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-07 22:43:59,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:43:59,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:43:59,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 81 transitions. [2022-04-07 22:43:59,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:43:59,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 81 transitions. [2022-04-07 22:43:59,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 81 transitions. [2022-04-07 22:43:59,854 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:43:59,856 INFO L225 Difference]: With dead ends: 140 [2022-04-07 22:43:59,856 INFO L226 Difference]: Without dead ends: 138 [2022-04-07 22:43:59,857 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 148 SyntacticMatches, 16 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 559 ImplicationChecksByTransitivity, 71.9s TimeCoverageRelationStatistics Valid=223, Invalid=2422, Unknown=7, NotChecked=0, Total=2652 [2022-04-07 22:43:59,858 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 68 mSDsluCounter, 209 mSDsCounter, 0 mSdLazyCounter, 1011 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 1139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1011 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 106 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-07 22:43:59,858 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 239 Invalid, 1139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1011 Invalid, 0 Unknown, 106 Unchecked, 0.7s Time] [2022-04-07 22:43:59,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2022-04-07 22:43:59,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 90. [2022-04-07 22:43:59,898 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:43:59,899 INFO L82 GeneralOperation]: Start isEquivalent. First operand 138 states. Second operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:43:59,899 INFO L74 IsIncluded]: Start isIncluded. First operand 138 states. Second operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:43:59,899 INFO L87 Difference]: Start difference. First operand 138 states. Second operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:43:59,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:43:59,901 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2022-04-07 22:43:59,901 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2022-04-07 22:43:59,901 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:43:59,901 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:43:59,901 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 138 states. [2022-04-07 22:43:59,901 INFO L87 Difference]: Start difference. First operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 138 states. [2022-04-07 22:43:59,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:43:59,903 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2022-04-07 22:43:59,903 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2022-04-07 22:43:59,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:43:59,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:43:59,903 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:43:59,903 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:43:59,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 70 states have (on average 1.042857142857143) internal successors, (73), 71 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:43:59,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 92 transitions. [2022-04-07 22:43:59,905 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 92 transitions. Word has length 76 [2022-04-07 22:43:59,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:43:59,906 INFO L478 AbstractCegarLoop]: Abstraction has 90 states and 92 transitions. [2022-04-07 22:43:59,906 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:43:59,906 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 92 transitions. [2022-04-07 22:43:59,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-04-07 22:43:59,906 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:43:59,906 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:43:59,925 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 22:44:00,119 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:44:00,119 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:44:00,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:44:00,120 INFO L85 PathProgramCache]: Analyzing trace with hash -442907109, now seen corresponding path program 18 times [2022-04-07 22:44:00,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:44:00,120 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099963695] [2022-04-07 22:44:00,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:44:00,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:44:00,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,392 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:44:00,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,395 INFO L290 TraceCheckUtils]: 0: Hoare triple {14081#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14032#true} is VALID [2022-04-07 22:44:00,395 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,395 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14032#true} {14032#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,395 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:44:00,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,397 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,397 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,397 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,401 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 22:44:00,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,404 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:44:00,404 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 22:44:00,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,407 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,408 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 22:44:00,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:44:00,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 22:44:00,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:44:00,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-07 22:44:00,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,421 INFO L290 TraceCheckUtils]: 0: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:44:00,422 INFO L272 TraceCheckUtils]: 0: Hoare triple {14032#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14081#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:44:00,423 INFO L290 TraceCheckUtils]: 1: Hoare triple {14081#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14032#true} is VALID [2022-04-07 22:44:00,423 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,423 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14032#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,423 INFO L272 TraceCheckUtils]: 4: Hoare triple {14032#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,423 INFO L290 TraceCheckUtils]: 5: Hoare triple {14032#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14032#true} is VALID [2022-04-07 22:44:00,423 INFO L290 TraceCheckUtils]: 6: Hoare triple {14032#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:44:00,423 INFO L290 TraceCheckUtils]: 7: Hoare triple {14037#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:44:00,424 INFO L290 TraceCheckUtils]: 8: Hoare triple {14037#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:44:00,424 INFO L290 TraceCheckUtils]: 9: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:44:00,425 INFO L290 TraceCheckUtils]: 10: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:44:00,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:44:00,426 INFO L290 TraceCheckUtils]: 12: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:44:00,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:44:00,426 INFO L290 TraceCheckUtils]: 14: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:44:00,427 INFO L290 TraceCheckUtils]: 15: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:44:00,427 INFO L290 TraceCheckUtils]: 16: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:44:00,428 INFO L290 TraceCheckUtils]: 17: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:44:00,428 INFO L290 TraceCheckUtils]: 18: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:44:00,428 INFO L290 TraceCheckUtils]: 19: Hoare triple {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14044#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:44:00,429 INFO L290 TraceCheckUtils]: 20: Hoare triple {14044#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14045#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,430 INFO L290 TraceCheckUtils]: 21: Hoare triple {14045#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:44:00,430 INFO L290 TraceCheckUtils]: 22: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:44:00,430 INFO L290 TraceCheckUtils]: 23: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:44:00,430 INFO L290 TraceCheckUtils]: 24: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,431 INFO L290 TraceCheckUtils]: 25: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,431 INFO L272 TraceCheckUtils]: 26: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,431 INFO L290 TraceCheckUtils]: 27: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,431 INFO L290 TraceCheckUtils]: 28: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,431 INFO L290 TraceCheckUtils]: 29: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,432 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14032#true} {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,432 INFO L290 TraceCheckUtils]: 31: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:44:00,432 INFO L290 TraceCheckUtils]: 32: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:44:00,433 INFO L290 TraceCheckUtils]: 33: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:44:00,433 INFO L272 TraceCheckUtils]: 34: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,433 INFO L290 TraceCheckUtils]: 35: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,433 INFO L290 TraceCheckUtils]: 36: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,433 INFO L290 TraceCheckUtils]: 37: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,434 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14032#true} {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:44:00,434 INFO L290 TraceCheckUtils]: 39: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:44:00,434 INFO L290 TraceCheckUtils]: 40: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,435 INFO L290 TraceCheckUtils]: 41: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,435 INFO L272 TraceCheckUtils]: 42: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,435 INFO L290 TraceCheckUtils]: 43: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,435 INFO L290 TraceCheckUtils]: 44: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,435 INFO L290 TraceCheckUtils]: 45: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,435 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14032#true} {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,436 INFO L290 TraceCheckUtils]: 47: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,436 INFO L290 TraceCheckUtils]: 48: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:44:00,437 INFO L290 TraceCheckUtils]: 49: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:44:00,437 INFO L272 TraceCheckUtils]: 50: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,437 INFO L290 TraceCheckUtils]: 51: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,437 INFO L290 TraceCheckUtils]: 52: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,437 INFO L290 TraceCheckUtils]: 53: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,437 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14032#true} {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:44:00,438 INFO L290 TraceCheckUtils]: 55: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:44:00,438 INFO L290 TraceCheckUtils]: 56: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:44:00,438 INFO L290 TraceCheckUtils]: 57: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:44:00,438 INFO L272 TraceCheckUtils]: 58: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,439 INFO L290 TraceCheckUtils]: 59: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,439 INFO L290 TraceCheckUtils]: 60: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,439 INFO L290 TraceCheckUtils]: 61: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,439 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14032#true} {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:44:00,439 INFO L290 TraceCheckUtils]: 63: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:44:00,440 INFO L290 TraceCheckUtils]: 64: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:44:00,440 INFO L290 TraceCheckUtils]: 65: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:44:00,440 INFO L272 TraceCheckUtils]: 66: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:44:00,441 INFO L290 TraceCheckUtils]: 67: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:44:00,441 INFO L290 TraceCheckUtils]: 68: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,441 INFO L290 TraceCheckUtils]: 69: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:44:00,441 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14032#true} {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:44:00,441 INFO L290 TraceCheckUtils]: 71: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:44:00,442 INFO L290 TraceCheckUtils]: 72: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14077#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:44:00,442 INFO L290 TraceCheckUtils]: 73: Hoare triple {14077#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14078#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:44:00,443 INFO L272 TraceCheckUtils]: 74: Hoare triple {14078#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14079#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:44:00,443 INFO L290 TraceCheckUtils]: 75: Hoare triple {14079#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14080#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:44:00,443 INFO L290 TraceCheckUtils]: 76: Hoare triple {14080#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:44:00,443 INFO L290 TraceCheckUtils]: 77: Hoare triple {14033#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:44:00,444 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 12 proven. 136 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:44:00,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:44:00,444 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1099963695] [2022-04-07 22:44:00,444 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1099963695] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:44:00,444 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [552904471] [2022-04-07 22:44:00,444 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:44:00,444 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:44:00,444 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:44:00,447 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:44:00,451 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 22:44:00,537 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-04-07 22:44:00,537 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:44:00,539 INFO L263 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-07 22:44:00,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:44:00,553 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:44:00,647 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:44:00,845 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 22:44:00,845 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 22:45:12,367 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:45:12,417 INFO L272 TraceCheckUtils]: 0: Hoare triple {14032#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:12,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14032#true} is VALID [2022-04-07 22:45:12,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:12,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14032#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:12,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {14032#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:12,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {14032#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14032#true} is VALID [2022-04-07 22:45:12,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {14032#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:45:12,418 INFO L290 TraceCheckUtils]: 7: Hoare triple {14037#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:45:12,419 INFO L290 TraceCheckUtils]: 8: Hoare triple {14037#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:12,419 INFO L290 TraceCheckUtils]: 9: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:12,419 INFO L290 TraceCheckUtils]: 10: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:12,420 INFO L290 TraceCheckUtils]: 11: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:12,420 INFO L290 TraceCheckUtils]: 12: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:12,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:12,421 INFO L290 TraceCheckUtils]: 14: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:12,421 INFO L290 TraceCheckUtils]: 15: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:12,422 INFO L290 TraceCheckUtils]: 16: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:12,422 INFO L290 TraceCheckUtils]: 17: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:12,423 INFO L290 TraceCheckUtils]: 18: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:45:12,423 INFO L290 TraceCheckUtils]: 19: Hoare triple {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14044#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:45:12,424 INFO L290 TraceCheckUtils]: 20: Hoare triple {14044#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(exists ((v_main_~i~0_178 Int)) (and (<= v_main_~i~0_178 6) (<= 6 v_main_~i~0_178) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_178)))) (<= (+ v_main_~i~0_178 1) main_~i~0)))} is VALID [2022-04-07 22:45:12,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {14145#(exists ((v_main_~i~0_178 Int)) (and (<= v_main_~i~0_178 6) (<= 6 v_main_~i~0_178) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_178)))) (<= (+ v_main_~i~0_178 1) main_~i~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:12,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:12,425 INFO L290 TraceCheckUtils]: 23: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:12,425 INFO L290 TraceCheckUtils]: 24: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,426 INFO L290 TraceCheckUtils]: 25: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,427 INFO L272 TraceCheckUtils]: 26: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,427 INFO L290 TraceCheckUtils]: 27: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,427 INFO L290 TraceCheckUtils]: 28: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,427 INFO L290 TraceCheckUtils]: 29: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,428 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,428 INFO L290 TraceCheckUtils]: 31: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,429 INFO L290 TraceCheckUtils]: 32: Hoare triple {14047#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,429 INFO L290 TraceCheckUtils]: 33: Hoare triple {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,430 INFO L272 TraceCheckUtils]: 34: Hoare triple {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,430 INFO L290 TraceCheckUtils]: 35: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,430 INFO L290 TraceCheckUtils]: 36: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,430 INFO L290 TraceCheckUtils]: 37: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,431 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,431 INFO L290 TraceCheckUtils]: 39: Hoare triple {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,432 INFO L290 TraceCheckUtils]: 40: Hoare triple {14183#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,432 INFO L290 TraceCheckUtils]: 41: Hoare triple {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,433 INFO L272 TraceCheckUtils]: 42: Hoare triple {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,433 INFO L290 TraceCheckUtils]: 43: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,433 INFO L290 TraceCheckUtils]: 44: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,434 INFO L290 TraceCheckUtils]: 45: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,434 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,434 INFO L290 TraceCheckUtils]: 47: Hoare triple {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,435 INFO L290 TraceCheckUtils]: 48: Hoare triple {14208#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,435 INFO L290 TraceCheckUtils]: 49: Hoare triple {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,436 INFO L272 TraceCheckUtils]: 50: Hoare triple {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,436 INFO L290 TraceCheckUtils]: 51: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,436 INFO L290 TraceCheckUtils]: 52: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,437 INFO L290 TraceCheckUtils]: 53: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,437 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,437 INFO L290 TraceCheckUtils]: 55: Hoare triple {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,438 INFO L290 TraceCheckUtils]: 56: Hoare triple {14233#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,438 INFO L290 TraceCheckUtils]: 57: Hoare triple {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,439 INFO L272 TraceCheckUtils]: 58: Hoare triple {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,439 INFO L290 TraceCheckUtils]: 59: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,439 INFO L290 TraceCheckUtils]: 60: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,440 INFO L290 TraceCheckUtils]: 61: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,440 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,441 INFO L290 TraceCheckUtils]: 63: Hoare triple {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,441 INFO L290 TraceCheckUtils]: 64: Hoare triple {14258#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,441 INFO L290 TraceCheckUtils]: 65: Hoare triple {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,442 INFO L272 TraceCheckUtils]: 66: Hoare triple {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,442 INFO L290 TraceCheckUtils]: 67: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,443 INFO L290 TraceCheckUtils]: 68: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,443 INFO L290 TraceCheckUtils]: 69: Hoare triple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} is VALID [2022-04-07 22:45:12,443 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14164#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ v_main_~x~0.offset_BEFORE_CALL_81 24)) 0))} {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,444 INFO L290 TraceCheckUtils]: 71: Hoare triple {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,444 INFO L290 TraceCheckUtils]: 72: Hoare triple {14283#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14308#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:12,444 INFO L290 TraceCheckUtils]: 73: Hoare triple {14308#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14078#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:45:12,445 INFO L272 TraceCheckUtils]: 74: Hoare triple {14078#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14315#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:45:12,445 INFO L290 TraceCheckUtils]: 75: Hoare triple {14315#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14319#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:45:12,445 INFO L290 TraceCheckUtils]: 76: Hoare triple {14319#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:45:12,445 INFO L290 TraceCheckUtils]: 77: Hoare triple {14033#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:45:12,446 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:45:12,446 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:45:14,749 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:45:14,753 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:45:14,874 INFO L290 TraceCheckUtils]: 77: Hoare triple {14033#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:45:14,875 INFO L290 TraceCheckUtils]: 76: Hoare triple {14319#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14033#false} is VALID [2022-04-07 22:45:14,875 INFO L290 TraceCheckUtils]: 75: Hoare triple {14315#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14319#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:45:14,875 INFO L272 TraceCheckUtils]: 74: Hoare triple {14078#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14315#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:45:14,876 INFO L290 TraceCheckUtils]: 73: Hoare triple {14077#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14078#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:45:14,876 INFO L290 TraceCheckUtils]: 72: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14077#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:14,877 INFO L290 TraceCheckUtils]: 71: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:14,877 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14032#true} {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:14,877 INFO L290 TraceCheckUtils]: 69: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,878 INFO L290 TraceCheckUtils]: 68: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,878 INFO L290 TraceCheckUtils]: 67: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,878 INFO L272 TraceCheckUtils]: 66: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,878 INFO L290 TraceCheckUtils]: 65: Hoare triple {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:14,879 INFO L290 TraceCheckUtils]: 64: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14072#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:14,879 INFO L290 TraceCheckUtils]: 63: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:14,879 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14032#true} {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:14,880 INFO L290 TraceCheckUtils]: 61: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,880 INFO L290 TraceCheckUtils]: 60: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,880 INFO L290 TraceCheckUtils]: 59: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,880 INFO L272 TraceCheckUtils]: 58: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,880 INFO L290 TraceCheckUtils]: 57: Hoare triple {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:14,881 INFO L290 TraceCheckUtils]: 56: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14067#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:14,881 INFO L290 TraceCheckUtils]: 55: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:14,881 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14032#true} {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:14,881 INFO L290 TraceCheckUtils]: 53: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,882 INFO L290 TraceCheckUtils]: 52: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,882 INFO L290 TraceCheckUtils]: 51: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,882 INFO L272 TraceCheckUtils]: 50: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,882 INFO L290 TraceCheckUtils]: 49: Hoare triple {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:14,883 INFO L290 TraceCheckUtils]: 48: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14062#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:14,883 INFO L290 TraceCheckUtils]: 47: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:14,883 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14032#true} {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:14,883 INFO L290 TraceCheckUtils]: 45: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,884 INFO L290 TraceCheckUtils]: 44: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,884 INFO L290 TraceCheckUtils]: 43: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,884 INFO L272 TraceCheckUtils]: 42: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,884 INFO L290 TraceCheckUtils]: 41: Hoare triple {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:14,885 INFO L290 TraceCheckUtils]: 40: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14057#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:14,885 INFO L290 TraceCheckUtils]: 39: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:14,885 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14032#true} {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:14,885 INFO L290 TraceCheckUtils]: 37: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,886 INFO L290 TraceCheckUtils]: 36: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,886 INFO L290 TraceCheckUtils]: 35: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,886 INFO L272 TraceCheckUtils]: 34: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,886 INFO L290 TraceCheckUtils]: 33: Hoare triple {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:14,887 INFO L290 TraceCheckUtils]: 32: Hoare triple {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14052#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:14,887 INFO L290 TraceCheckUtils]: 31: Hoare triple {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:45:14,887 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14032#true} {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:45:14,887 INFO L290 TraceCheckUtils]: 29: Hoare triple {14032#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,887 INFO L290 TraceCheckUtils]: 28: Hoare triple {14032#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,888 INFO L290 TraceCheckUtils]: 27: Hoare triple {14032#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14032#true} is VALID [2022-04-07 22:45:14,888 INFO L272 TraceCheckUtils]: 26: Hoare triple {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14032#true} is VALID [2022-04-07 22:45:14,888 INFO L290 TraceCheckUtils]: 25: Hoare triple {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:45:14,888 INFO L290 TraceCheckUtils]: 24: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14461#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:45:14,888 INFO L290 TraceCheckUtils]: 23: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:14,889 INFO L290 TraceCheckUtils]: 22: Hoare triple {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:14,889 INFO L290 TraceCheckUtils]: 21: Hoare triple {14045#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14046#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:14,890 INFO L290 TraceCheckUtils]: 20: Hoare triple {14498#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14045#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:14,890 INFO L290 TraceCheckUtils]: 19: Hoare triple {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14498#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:14,891 INFO L290 TraceCheckUtils]: 18: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14043#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:45:14,891 INFO L290 TraceCheckUtils]: 17: Hoare triple {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:14,891 INFO L290 TraceCheckUtils]: 16: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14042#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:14,892 INFO L290 TraceCheckUtils]: 15: Hoare triple {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:14,892 INFO L290 TraceCheckUtils]: 14: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14041#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:14,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:14,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14040#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:14,893 INFO L290 TraceCheckUtils]: 11: Hoare triple {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:14,894 INFO L290 TraceCheckUtils]: 10: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14039#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:14,894 INFO L290 TraceCheckUtils]: 9: Hoare triple {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:14,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {14037#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14038#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:14,895 INFO L290 TraceCheckUtils]: 7: Hoare triple {14037#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:45:14,895 INFO L290 TraceCheckUtils]: 6: Hoare triple {14032#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14037#(= main_~i~0 0)} is VALID [2022-04-07 22:45:14,895 INFO L290 TraceCheckUtils]: 5: Hoare triple {14032#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14032#true} is VALID [2022-04-07 22:45:14,895 INFO L272 TraceCheckUtils]: 4: Hoare triple {14032#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,895 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14032#true} {14032#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,895 INFO L290 TraceCheckUtils]: 2: Hoare triple {14032#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {14032#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14032#true} is VALID [2022-04-07 22:45:14,895 INFO L272 TraceCheckUtils]: 0: Hoare triple {14032#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14032#true} is VALID [2022-04-07 22:45:14,896 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 12 proven. 136 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:45:14,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [552904471] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:45:14,896 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:45:14,896 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 22] total 35 [2022-04-07 22:45:14,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614873885] [2022-04-07 22:45:14,896 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:45:14,897 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 78 [2022-04-07 22:45:14,897 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:45:14,897 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:45:14,967 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:45:14,967 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-07 22:45:14,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:45:14,968 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-07 22:45:14,968 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1080, Unknown=7, NotChecked=0, Total=1190 [2022-04-07 22:45:14,968 INFO L87 Difference]: Start difference. First operand 90 states and 92 transitions. Second operand has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:45:24,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:45:24,693 INFO L93 Difference]: Finished difference Result 177 states and 185 transitions. [2022-04-07 22:45:24,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-07 22:45:24,693 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 78 [2022-04-07 22:45:24,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:45:24,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:45:24,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 84 transitions. [2022-04-07 22:45:24,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:45:24,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 84 transitions. [2022-04-07 22:45:24,695 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 84 transitions. [2022-04-07 22:45:24,769 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:45:24,772 INFO L225 Difference]: With dead ends: 177 [2022-04-07 22:45:24,772 INFO L226 Difference]: Without dead ends: 175 [2022-04-07 22:45:24,773 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 146 SyntacticMatches, 17 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 738 ImplicationChecksByTransitivity, 81.4s TimeCoverageRelationStatistics Valid=262, Invalid=3033, Unknown=11, NotChecked=0, Total=3306 [2022-04-07 22:45:24,773 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 61 mSDsluCounter, 236 mSDsCounter, 0 mSdLazyCounter, 930 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 265 SdHoareTripleChecker+Invalid, 1065 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 930 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 111 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-07 22:45:24,773 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [62 Valid, 265 Invalid, 1065 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 930 Invalid, 0 Unknown, 111 Unchecked, 0.7s Time] [2022-04-07 22:45:24,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2022-04-07 22:45:24,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 149. [2022-04-07 22:45:24,836 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:45:24,837 INFO L82 GeneralOperation]: Start isEquivalent. First operand 175 states. Second operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) [2022-04-07 22:45:24,837 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) [2022-04-07 22:45:24,837 INFO L87 Difference]: Start difference. First operand 175 states. Second operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) [2022-04-07 22:45:24,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:45:24,840 INFO L93 Difference]: Finished difference Result 175 states and 183 transitions. [2022-04-07 22:45:24,840 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 183 transitions. [2022-04-07 22:45:24,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:45:24,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:45:24,841 INFO L74 IsIncluded]: Start isIncluded. First operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) Second operand 175 states. [2022-04-07 22:45:24,841 INFO L87 Difference]: Start difference. First operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) Second operand 175 states. [2022-04-07 22:45:24,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:45:24,843 INFO L93 Difference]: Finished difference Result 175 states and 183 transitions. [2022-04-07 22:45:24,843 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 183 transitions. [2022-04-07 22:45:24,843 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:45:24,843 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:45:24,843 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:45:24,844 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:45:24,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 117 states have internal predecessors, (118), 20 states have call successors, (20), 15 states have call predecessors, (20), 14 states have return successors, (19), 16 states have call predecessors, (19), 19 states have call successors, (19) [2022-04-07 22:45:24,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2022-04-07 22:45:24,846 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 78 [2022-04-07 22:45:24,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:45:24,846 INFO L478 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2022-04-07 22:45:24,846 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.2941176470588234) internal successors, (78), 32 states have internal predecessors, (78), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:45:24,846 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2022-04-07 22:45:24,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-07 22:45:24,847 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:45:24,847 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:45:24,867 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-07 22:45:25,059 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:45:25,059 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:45:25,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:45:25,060 INFO L85 PathProgramCache]: Analyzing trace with hash 607410777, now seen corresponding path program 19 times [2022-04-07 22:45:25,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:45:25,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677678862] [2022-04-07 22:45:25,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:45:25,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:45:25,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,369 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:45:25,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {15473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15423#true} is VALID [2022-04-07 22:45:25,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15423#true} {15423#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,374 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:45:25,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,377 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 22:45:25,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,379 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,379 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,379 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,379 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:25,380 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 22:45:25,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,381 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,382 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,382 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-07 22:45:25,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:25,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-07 22:45:25,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,387 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,387 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,387 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:25,388 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-07 22:45:25,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,389 INFO L290 TraceCheckUtils]: 0: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:25,391 INFO L272 TraceCheckUtils]: 0: Hoare triple {15423#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:45:25,391 INFO L290 TraceCheckUtils]: 1: Hoare triple {15473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15423#true} is VALID [2022-04-07 22:45:25,391 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,391 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15423#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,391 INFO L272 TraceCheckUtils]: 4: Hoare triple {15423#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {15423#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15423#true} is VALID [2022-04-07 22:45:25,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {15423#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:45:25,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {15428#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:45:25,392 INFO L290 TraceCheckUtils]: 8: Hoare triple {15428#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:25,392 INFO L290 TraceCheckUtils]: 9: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:45:25,393 INFO L290 TraceCheckUtils]: 10: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:25,393 INFO L290 TraceCheckUtils]: 11: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:45:25,393 INFO L290 TraceCheckUtils]: 12: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:25,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:45:25,394 INFO L290 TraceCheckUtils]: 14: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:25,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:45:25,395 INFO L290 TraceCheckUtils]: 16: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:25,395 INFO L290 TraceCheckUtils]: 17: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:45:25,396 INFO L290 TraceCheckUtils]: 18: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:45:25,396 INFO L290 TraceCheckUtils]: 19: Hoare triple {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15435#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:45:25,397 INFO L290 TraceCheckUtils]: 20: Hoare triple {15435#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:45:25,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:45:25,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15437#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,398 INFO L290 TraceCheckUtils]: 23: Hoare triple {15437#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:25,399 INFO L290 TraceCheckUtils]: 24: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:25,399 INFO L290 TraceCheckUtils]: 25: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:45:25,399 INFO L290 TraceCheckUtils]: 26: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,399 INFO L290 TraceCheckUtils]: 27: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,400 INFO L272 TraceCheckUtils]: 28: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,400 INFO L290 TraceCheckUtils]: 29: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,400 INFO L290 TraceCheckUtils]: 30: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,400 INFO L290 TraceCheckUtils]: 31: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,400 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15423#true} {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,401 INFO L290 TraceCheckUtils]: 33: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:45:25,401 INFO L290 TraceCheckUtils]: 34: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:25,401 INFO L290 TraceCheckUtils]: 35: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:25,401 INFO L272 TraceCheckUtils]: 36: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,401 INFO L290 TraceCheckUtils]: 37: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,402 INFO L290 TraceCheckUtils]: 38: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,402 INFO L290 TraceCheckUtils]: 39: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,402 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15423#true} {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:25,402 INFO L290 TraceCheckUtils]: 41: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:45:25,403 INFO L290 TraceCheckUtils]: 42: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,403 INFO L290 TraceCheckUtils]: 43: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,403 INFO L272 TraceCheckUtils]: 44: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,403 INFO L290 TraceCheckUtils]: 45: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,404 INFO L290 TraceCheckUtils]: 46: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,404 INFO L290 TraceCheckUtils]: 47: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,404 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15423#true} {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,404 INFO L290 TraceCheckUtils]: 49: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,405 INFO L290 TraceCheckUtils]: 50: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:25,405 INFO L290 TraceCheckUtils]: 51: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:25,405 INFO L272 TraceCheckUtils]: 52: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,405 INFO L290 TraceCheckUtils]: 53: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,405 INFO L290 TraceCheckUtils]: 54: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,405 INFO L290 TraceCheckUtils]: 55: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,406 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15423#true} {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:25,406 INFO L290 TraceCheckUtils]: 57: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:45:25,407 INFO L290 TraceCheckUtils]: 58: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:25,407 INFO L290 TraceCheckUtils]: 59: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:25,407 INFO L272 TraceCheckUtils]: 60: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,407 INFO L290 TraceCheckUtils]: 61: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,407 INFO L290 TraceCheckUtils]: 62: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,407 INFO L290 TraceCheckUtils]: 63: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,408 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15423#true} {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:25,408 INFO L290 TraceCheckUtils]: 65: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:45:25,409 INFO L290 TraceCheckUtils]: 66: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:25,409 INFO L290 TraceCheckUtils]: 67: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:25,409 INFO L272 TraceCheckUtils]: 68: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:45:25,409 INFO L290 TraceCheckUtils]: 69: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:45:25,409 INFO L290 TraceCheckUtils]: 70: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,409 INFO L290 TraceCheckUtils]: 71: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:45:25,410 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15423#true} {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:25,410 INFO L290 TraceCheckUtils]: 73: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:45:25,411 INFO L290 TraceCheckUtils]: 74: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15469#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:45:25,411 INFO L290 TraceCheckUtils]: 75: Hoare triple {15469#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15470#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:45:25,411 INFO L272 TraceCheckUtils]: 76: Hoare triple {15470#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15471#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:45:25,412 INFO L290 TraceCheckUtils]: 77: Hoare triple {15471#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15472#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:45:25,412 INFO L290 TraceCheckUtils]: 78: Hoare triple {15472#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:45:25,412 INFO L290 TraceCheckUtils]: 79: Hoare triple {15424#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:45:25,412 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 12 proven. 153 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:45:25,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:45:25,412 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677678862] [2022-04-07 22:45:25,413 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1677678862] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:45:25,413 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [998272337] [2022-04-07 22:45:25,413 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:45:25,413 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:45:25,413 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:45:25,414 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:45:25,415 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 22:45:25,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 43 conjunts are in the unsatisfiable core [2022-04-07 22:45:25,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:45:25,498 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:45:25,605 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:45:25,699 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:45:25,700 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:45:25,773 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:45:25,774 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:46:36,207 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:46:36,259 INFO L272 TraceCheckUtils]: 0: Hoare triple {15423#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15423#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L272 TraceCheckUtils]: 4: Hoare triple {15423#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L290 TraceCheckUtils]: 5: Hoare triple {15423#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15423#true} is VALID [2022-04-07 22:46:36,260 INFO L290 TraceCheckUtils]: 6: Hoare triple {15423#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:46:36,261 INFO L290 TraceCheckUtils]: 7: Hoare triple {15428#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:46:36,261 INFO L290 TraceCheckUtils]: 8: Hoare triple {15428#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:36,261 INFO L290 TraceCheckUtils]: 9: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:36,262 INFO L290 TraceCheckUtils]: 10: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:36,262 INFO L290 TraceCheckUtils]: 11: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:36,263 INFO L290 TraceCheckUtils]: 12: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:36,263 INFO L290 TraceCheckUtils]: 13: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:36,264 INFO L290 TraceCheckUtils]: 14: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:36,264 INFO L290 TraceCheckUtils]: 15: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:36,264 INFO L290 TraceCheckUtils]: 16: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:36,265 INFO L290 TraceCheckUtils]: 17: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:36,265 INFO L290 TraceCheckUtils]: 18: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:46:36,266 INFO L290 TraceCheckUtils]: 19: Hoare triple {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15435#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:46:36,266 INFO L290 TraceCheckUtils]: 20: Hoare triple {15435#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:46:36,267 INFO L290 TraceCheckUtils]: 21: Hoare triple {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:46:36,267 INFO L290 TraceCheckUtils]: 22: Hoare triple {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15543#(and (<= 8 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,268 INFO L290 TraceCheckUtils]: 23: Hoare triple {15543#(and (<= 8 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:36,268 INFO L290 TraceCheckUtils]: 24: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:36,269 INFO L290 TraceCheckUtils]: 25: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:36,269 INFO L290 TraceCheckUtils]: 26: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,269 INFO L290 TraceCheckUtils]: 27: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,270 INFO L272 TraceCheckUtils]: 28: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,271 INFO L290 TraceCheckUtils]: 29: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,271 INFO L290 TraceCheckUtils]: 30: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,271 INFO L290 TraceCheckUtils]: 31: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,272 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,272 INFO L290 TraceCheckUtils]: 33: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,272 INFO L290 TraceCheckUtils]: 34: Hoare triple {15439#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,273 INFO L290 TraceCheckUtils]: 35: Hoare triple {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,274 INFO L272 TraceCheckUtils]: 36: Hoare triple {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,274 INFO L290 TraceCheckUtils]: 37: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,274 INFO L290 TraceCheckUtils]: 38: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,274 INFO L290 TraceCheckUtils]: 39: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,275 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,275 INFO L290 TraceCheckUtils]: 41: Hoare triple {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,276 INFO L290 TraceCheckUtils]: 42: Hoare triple {15581#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,276 INFO L290 TraceCheckUtils]: 43: Hoare triple {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,277 INFO L272 TraceCheckUtils]: 44: Hoare triple {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,277 INFO L290 TraceCheckUtils]: 45: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,278 INFO L290 TraceCheckUtils]: 46: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,278 INFO L290 TraceCheckUtils]: 47: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,278 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,279 INFO L290 TraceCheckUtils]: 49: Hoare triple {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,279 INFO L290 TraceCheckUtils]: 50: Hoare triple {15606#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,280 INFO L290 TraceCheckUtils]: 51: Hoare triple {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,280 INFO L272 TraceCheckUtils]: 52: Hoare triple {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,281 INFO L290 TraceCheckUtils]: 53: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,281 INFO L290 TraceCheckUtils]: 54: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,281 INFO L290 TraceCheckUtils]: 55: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,282 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,282 INFO L290 TraceCheckUtils]: 57: Hoare triple {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,283 INFO L290 TraceCheckUtils]: 58: Hoare triple {15631#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,283 INFO L290 TraceCheckUtils]: 59: Hoare triple {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,284 INFO L272 TraceCheckUtils]: 60: Hoare triple {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,284 INFO L290 TraceCheckUtils]: 61: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,284 INFO L290 TraceCheckUtils]: 62: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,285 INFO L290 TraceCheckUtils]: 63: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,285 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,285 INFO L290 TraceCheckUtils]: 65: Hoare triple {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,286 INFO L290 TraceCheckUtils]: 66: Hoare triple {15656#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,286 INFO L290 TraceCheckUtils]: 67: Hoare triple {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,287 INFO L272 TraceCheckUtils]: 68: Hoare triple {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,287 INFO L290 TraceCheckUtils]: 69: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,288 INFO L290 TraceCheckUtils]: 70: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,288 INFO L290 TraceCheckUtils]: 71: Hoare triple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} is VALID [2022-04-07 22:46:36,288 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15562#(exists ((v_main_~x~0.base_BEFORE_CALL_93 Int) (v_main_~x~0.offset_BEFORE_CALL_93 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_93) (+ v_main_~x~0.offset_BEFORE_CALL_93 24)) 0))} {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,289 INFO L290 TraceCheckUtils]: 73: Hoare triple {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,289 INFO L290 TraceCheckUtils]: 74: Hoare triple {15681#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15706#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:36,290 INFO L290 TraceCheckUtils]: 75: Hoare triple {15706#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15470#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:46:36,290 INFO L272 TraceCheckUtils]: 76: Hoare triple {15470#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15713#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:46:36,290 INFO L290 TraceCheckUtils]: 77: Hoare triple {15713#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15717#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:46:36,291 INFO L290 TraceCheckUtils]: 78: Hoare triple {15717#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:46:36,291 INFO L290 TraceCheckUtils]: 79: Hoare triple {15424#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:46:36,291 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 1 proven. 164 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 22:46:36,291 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:46:38,697 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:46:38,701 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:46:38,798 INFO L290 TraceCheckUtils]: 79: Hoare triple {15424#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:46:38,799 INFO L290 TraceCheckUtils]: 78: Hoare triple {15717#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15424#false} is VALID [2022-04-07 22:46:38,799 INFO L290 TraceCheckUtils]: 77: Hoare triple {15713#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15717#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:46:38,799 INFO L272 TraceCheckUtils]: 76: Hoare triple {15470#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15713#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:46:38,800 INFO L290 TraceCheckUtils]: 75: Hoare triple {15469#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15470#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:46:38,800 INFO L290 TraceCheckUtils]: 74: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15469#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:38,801 INFO L290 TraceCheckUtils]: 73: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:38,801 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15423#true} {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:38,801 INFO L290 TraceCheckUtils]: 71: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,801 INFO L290 TraceCheckUtils]: 70: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,801 INFO L290 TraceCheckUtils]: 69: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,801 INFO L272 TraceCheckUtils]: 68: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,802 INFO L290 TraceCheckUtils]: 67: Hoare triple {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:38,802 INFO L290 TraceCheckUtils]: 66: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15464#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:38,803 INFO L290 TraceCheckUtils]: 65: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:38,803 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15423#true} {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:38,803 INFO L290 TraceCheckUtils]: 63: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,804 INFO L290 TraceCheckUtils]: 62: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,804 INFO L290 TraceCheckUtils]: 61: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,804 INFO L272 TraceCheckUtils]: 60: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,804 INFO L290 TraceCheckUtils]: 59: Hoare triple {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:38,805 INFO L290 TraceCheckUtils]: 58: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15459#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:38,805 INFO L290 TraceCheckUtils]: 57: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:38,806 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15423#true} {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:38,806 INFO L290 TraceCheckUtils]: 55: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,806 INFO L290 TraceCheckUtils]: 54: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,807 INFO L290 TraceCheckUtils]: 53: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,807 INFO L272 TraceCheckUtils]: 52: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,807 INFO L290 TraceCheckUtils]: 51: Hoare triple {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:38,808 INFO L290 TraceCheckUtils]: 50: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15454#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:38,808 INFO L290 TraceCheckUtils]: 49: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:38,809 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15423#true} {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:38,809 INFO L290 TraceCheckUtils]: 47: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,809 INFO L290 TraceCheckUtils]: 46: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,809 INFO L290 TraceCheckUtils]: 45: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,809 INFO L272 TraceCheckUtils]: 44: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,810 INFO L290 TraceCheckUtils]: 43: Hoare triple {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:38,811 INFO L290 TraceCheckUtils]: 42: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15449#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:38,811 INFO L290 TraceCheckUtils]: 41: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:38,812 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15423#true} {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:38,812 INFO L290 TraceCheckUtils]: 39: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,812 INFO L290 TraceCheckUtils]: 38: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,812 INFO L290 TraceCheckUtils]: 37: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,812 INFO L272 TraceCheckUtils]: 36: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,813 INFO L290 TraceCheckUtils]: 35: Hoare triple {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:38,814 INFO L290 TraceCheckUtils]: 34: Hoare triple {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15444#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:38,814 INFO L290 TraceCheckUtils]: 33: Hoare triple {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:38,815 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15423#true} {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:38,815 INFO L290 TraceCheckUtils]: 31: Hoare triple {15423#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,815 INFO L290 TraceCheckUtils]: 30: Hoare triple {15423#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,815 INFO L290 TraceCheckUtils]: 29: Hoare triple {15423#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15423#true} is VALID [2022-04-07 22:46:38,815 INFO L272 TraceCheckUtils]: 28: Hoare triple {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15423#true} is VALID [2022-04-07 22:46:38,816 INFO L290 TraceCheckUtils]: 27: Hoare triple {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:38,816 INFO L290 TraceCheckUtils]: 26: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:38,817 INFO L290 TraceCheckUtils]: 25: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:38,817 INFO L290 TraceCheckUtils]: 24: Hoare triple {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:38,818 INFO L290 TraceCheckUtils]: 23: Hoare triple {15437#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15438#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 22:46:38,818 INFO L290 TraceCheckUtils]: 22: Hoare triple {15896#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15437#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 24))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:38,819 INFO L290 TraceCheckUtils]: 21: Hoare triple {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15896#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:38,819 INFO L290 TraceCheckUtils]: 20: Hoare triple {15896#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15436#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:46:38,820 INFO L290 TraceCheckUtils]: 19: Hoare triple {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15896#(and (not (<= main_~i~0 5)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 22:46:38,820 INFO L290 TraceCheckUtils]: 18: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15434#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:46:38,821 INFO L290 TraceCheckUtils]: 17: Hoare triple {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:38,821 INFO L290 TraceCheckUtils]: 16: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15433#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:38,822 INFO L290 TraceCheckUtils]: 15: Hoare triple {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:38,822 INFO L290 TraceCheckUtils]: 14: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15432#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:38,823 INFO L290 TraceCheckUtils]: 13: Hoare triple {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:38,823 INFO L290 TraceCheckUtils]: 12: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15431#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:38,823 INFO L290 TraceCheckUtils]: 11: Hoare triple {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:38,824 INFO L290 TraceCheckUtils]: 10: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15430#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:38,824 INFO L290 TraceCheckUtils]: 9: Hoare triple {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:38,825 INFO L290 TraceCheckUtils]: 8: Hoare triple {15428#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15429#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:38,825 INFO L290 TraceCheckUtils]: 7: Hoare triple {15428#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:46:38,825 INFO L290 TraceCheckUtils]: 6: Hoare triple {15423#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15428#(= main_~i~0 0)} is VALID [2022-04-07 22:46:38,825 INFO L290 TraceCheckUtils]: 5: Hoare triple {15423#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15423#true} is VALID [2022-04-07 22:46:38,825 INFO L272 TraceCheckUtils]: 4: Hoare triple {15423#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,825 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15423#true} {15423#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {15423#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,826 INFO L290 TraceCheckUtils]: 1: Hoare triple {15423#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15423#true} is VALID [2022-04-07 22:46:38,826 INFO L272 TraceCheckUtils]: 0: Hoare triple {15423#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15423#true} is VALID [2022-04-07 22:46:38,826 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 12 proven. 152 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2022-04-07 22:46:38,826 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [998272337] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:46:38,826 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:46:38,826 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 23] total 36 [2022-04-07 22:46:38,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292814567] [2022-04-07 22:46:38,827 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:46:38,827 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 80 [2022-04-07 22:46:38,828 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:46:38,828 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:46:38,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:46:38,912 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-07 22:46:38,912 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:46:38,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-07 22:46:38,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1143, Unknown=7, NotChecked=0, Total=1260 [2022-04-07 22:46:38,913 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:46:41,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:41,235 INFO L93 Difference]: Finished difference Result 173 states and 182 transitions. [2022-04-07 22:46:41,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-07 22:46:41,235 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 80 [2022-04-07 22:46:41,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:46:41,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:46:41,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 85 transitions. [2022-04-07 22:46:41,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:46:41,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 85 transitions. [2022-04-07 22:46:41,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 85 transitions. [2022-04-07 22:46:41,312 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:46:41,314 INFO L225 Difference]: With dead ends: 173 [2022-04-07 22:46:41,314 INFO L226 Difference]: Without dead ends: 171 [2022-04-07 22:46:41,315 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 144 SyntacticMatches, 19 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 821 ImplicationChecksByTransitivity, 72.5s TimeCoverageRelationStatistics Valid=299, Invalid=3234, Unknown=7, NotChecked=0, Total=3540 [2022-04-07 22:46:41,316 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 73 mSDsluCounter, 239 mSDsCounter, 0 mSdLazyCounter, 1278 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 1404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 1278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 77 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:46:41,316 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [73 Valid, 269 Invalid, 1404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 1278 Invalid, 0 Unknown, 77 Unchecked, 1.0s Time] [2022-04-07 22:46:41,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2022-04-07 22:46:41,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 161. [2022-04-07 22:46:41,374 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:46:41,375 INFO L82 GeneralOperation]: Start isEquivalent. First operand 171 states. Second operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) [2022-04-07 22:46:41,375 INFO L74 IsIncluded]: Start isIncluded. First operand 171 states. Second operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) [2022-04-07 22:46:41,375 INFO L87 Difference]: Start difference. First operand 171 states. Second operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) [2022-04-07 22:46:41,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:41,377 INFO L93 Difference]: Finished difference Result 171 states and 180 transitions. [2022-04-07 22:46:41,377 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 180 transitions. [2022-04-07 22:46:41,377 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:46:41,377 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:46:41,378 INFO L74 IsIncluded]: Start isIncluded. First operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) Second operand 171 states. [2022-04-07 22:46:41,378 INFO L87 Difference]: Start difference. First operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) Second operand 171 states. [2022-04-07 22:46:41,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:41,380 INFO L93 Difference]: Finished difference Result 171 states and 180 transitions. [2022-04-07 22:46:41,380 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 180 transitions. [2022-04-07 22:46:41,380 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:46:41,380 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:46:41,380 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:46:41,380 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:46:41,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 123 states have (on average 1.032520325203252) internal successors, (127), 126 states have internal predecessors, (127), 22 states have call successors, (22), 16 states have call predecessors, (22), 15 states have return successors, (21), 18 states have call predecessors, (21), 21 states have call successors, (21) [2022-04-07 22:46:41,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 170 transitions. [2022-04-07 22:46:41,383 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 170 transitions. Word has length 80 [2022-04-07 22:46:41,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:46:41,383 INFO L478 AbstractCegarLoop]: Abstraction has 161 states and 170 transitions. [2022-04-07 22:46:41,383 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 2.342857142857143) internal successors, (82), 33 states have internal predecessors, (82), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 22:46:41,383 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 170 transitions. [2022-04-07 22:46:41,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-04-07 22:46:41,384 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:46:41,384 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:46:41,402 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-07 22:46:41,587 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-07 22:46:41,587 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:46:41,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:46:41,588 INFO L85 PathProgramCache]: Analyzing trace with hash -1454537293, now seen corresponding path program 20 times [2022-04-07 22:46:41,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:46:41,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141023599] [2022-04-07 22:46:41,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:46:41,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:46:41,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:46:41,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {16878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16828#true} is VALID [2022-04-07 22:46:41,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,766 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16828#true} {16828#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 22:46:41,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,769 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 22:46:41,770 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 22:46:41,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,772 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16847#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:41,773 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 22:46:41,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,775 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16852#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:41,776 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 22:46:41,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,778 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16857#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:41,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 22:46:41,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,780 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,781 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,781 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16862#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:41,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-07 22:46:41,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,783 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,784 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16867#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:41,784 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2022-04-07 22:46:41,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,786 INFO L290 TraceCheckUtils]: 0: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,787 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16872#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:41,788 INFO L272 TraceCheckUtils]: 0: Hoare triple {16828#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:46:41,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {16878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16828#true} is VALID [2022-04-07 22:46:41,788 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,788 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16828#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,788 INFO L272 TraceCheckUtils]: 4: Hoare triple {16828#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,788 INFO L290 TraceCheckUtils]: 5: Hoare triple {16828#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16828#true} is VALID [2022-04-07 22:46:41,788 INFO L290 TraceCheckUtils]: 6: Hoare triple {16828#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16833#(= main_~i~0 0)} is VALID [2022-04-07 22:46:41,789 INFO L290 TraceCheckUtils]: 7: Hoare triple {16833#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16833#(= main_~i~0 0)} is VALID [2022-04-07 22:46:41,789 INFO L290 TraceCheckUtils]: 8: Hoare triple {16833#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:41,789 INFO L290 TraceCheckUtils]: 9: Hoare triple {16834#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:41,790 INFO L290 TraceCheckUtils]: 10: Hoare triple {16834#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:41,790 INFO L290 TraceCheckUtils]: 11: Hoare triple {16835#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:41,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {16835#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:41,791 INFO L290 TraceCheckUtils]: 13: Hoare triple {16836#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:41,791 INFO L290 TraceCheckUtils]: 14: Hoare triple {16836#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:41,792 INFO L290 TraceCheckUtils]: 15: Hoare triple {16837#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:41,792 INFO L290 TraceCheckUtils]: 16: Hoare triple {16837#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:41,793 INFO L290 TraceCheckUtils]: 17: Hoare triple {16838#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:41,793 INFO L290 TraceCheckUtils]: 18: Hoare triple {16838#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:41,793 INFO L290 TraceCheckUtils]: 19: Hoare triple {16839#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:41,794 INFO L290 TraceCheckUtils]: 20: Hoare triple {16839#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16840#(<= main_~i~0 7)} is VALID [2022-04-07 22:46:41,794 INFO L290 TraceCheckUtils]: 21: Hoare triple {16840#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16841#(<= main_~n~0 7)} is VALID [2022-04-07 22:46:41,795 INFO L290 TraceCheckUtils]: 22: Hoare triple {16841#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 22:46:41,795 INFO L290 TraceCheckUtils]: 23: Hoare triple {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 22:46:41,796 INFO L272 TraceCheckUtils]: 24: Hoare triple {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,796 INFO L290 TraceCheckUtils]: 25: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,796 INFO L290 TraceCheckUtils]: 26: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,796 INFO L290 TraceCheckUtils]: 27: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,797 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {16828#true} {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 22:46:41,797 INFO L290 TraceCheckUtils]: 29: Hoare triple {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 22:46:41,798 INFO L290 TraceCheckUtils]: 30: Hoare triple {16842#(and (<= main_~n~0 7) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:41,798 INFO L290 TraceCheckUtils]: 31: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:41,798 INFO L272 TraceCheckUtils]: 32: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,798 INFO L290 TraceCheckUtils]: 33: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,798 INFO L290 TraceCheckUtils]: 34: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,798 INFO L290 TraceCheckUtils]: 35: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,799 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {16828#true} {16847#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:41,799 INFO L290 TraceCheckUtils]: 37: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:41,800 INFO L290 TraceCheckUtils]: 38: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:41,800 INFO L290 TraceCheckUtils]: 39: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:41,800 INFO L272 TraceCheckUtils]: 40: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,801 INFO L290 TraceCheckUtils]: 41: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,801 INFO L290 TraceCheckUtils]: 42: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,801 INFO L290 TraceCheckUtils]: 43: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,801 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {16828#true} {16852#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:41,801 INFO L290 TraceCheckUtils]: 45: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:41,802 INFO L290 TraceCheckUtils]: 46: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:41,802 INFO L290 TraceCheckUtils]: 47: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:41,802 INFO L272 TraceCheckUtils]: 48: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,803 INFO L290 TraceCheckUtils]: 49: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,803 INFO L290 TraceCheckUtils]: 50: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,803 INFO L290 TraceCheckUtils]: 51: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,803 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {16828#true} {16857#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:41,804 INFO L290 TraceCheckUtils]: 53: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:41,804 INFO L290 TraceCheckUtils]: 54: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:41,804 INFO L290 TraceCheckUtils]: 55: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:41,805 INFO L272 TraceCheckUtils]: 56: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,805 INFO L290 TraceCheckUtils]: 57: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,805 INFO L290 TraceCheckUtils]: 58: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,805 INFO L290 TraceCheckUtils]: 59: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,805 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {16828#true} {16862#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:41,806 INFO L290 TraceCheckUtils]: 61: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:41,806 INFO L290 TraceCheckUtils]: 62: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:41,806 INFO L290 TraceCheckUtils]: 63: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:41,807 INFO L272 TraceCheckUtils]: 64: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,807 INFO L290 TraceCheckUtils]: 65: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,807 INFO L290 TraceCheckUtils]: 66: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,807 INFO L290 TraceCheckUtils]: 67: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,807 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {16828#true} {16867#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:41,808 INFO L290 TraceCheckUtils]: 69: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:41,808 INFO L290 TraceCheckUtils]: 70: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:41,809 INFO L290 TraceCheckUtils]: 71: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:41,809 INFO L272 TraceCheckUtils]: 72: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:41,809 INFO L290 TraceCheckUtils]: 73: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:41,809 INFO L290 TraceCheckUtils]: 74: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,809 INFO L290 TraceCheckUtils]: 75: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:41,810 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {16828#true} {16872#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:41,810 INFO L290 TraceCheckUtils]: 77: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:41,810 INFO L290 TraceCheckUtils]: 78: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16877#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:46:41,811 INFO L290 TraceCheckUtils]: 79: Hoare triple {16877#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:41,811 INFO L272 TraceCheckUtils]: 80: Hoare triple {16829#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:41,811 INFO L290 TraceCheckUtils]: 81: Hoare triple {16829#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16829#false} is VALID [2022-04-07 22:46:41,811 INFO L290 TraceCheckUtils]: 82: Hoare triple {16829#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:41,811 INFO L290 TraceCheckUtils]: 83: Hoare triple {16829#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:41,812 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 87 proven. 74 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:46:41,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:46:41,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141023599] [2022-04-07 22:46:41,812 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1141023599] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:46:41,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1713121857] [2022-04-07 22:46:41,812 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:46:41,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:46:41,812 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:46:41,815 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:46:41,816 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 22:46:41,897 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:46:41,897 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:46:41,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 22:46:41,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:41,916 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:46:42,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {16828#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16828#true} is VALID [2022-04-07 22:46:42,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16828#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {16828#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {16828#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16828#true} is VALID [2022-04-07 22:46:42,446 INFO L290 TraceCheckUtils]: 6: Hoare triple {16828#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16900#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:42,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {16900#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16900#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:42,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {16900#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:42,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {16834#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:42,447 INFO L290 TraceCheckUtils]: 10: Hoare triple {16834#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:42,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {16835#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:42,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {16835#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:42,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {16836#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:42,449 INFO L290 TraceCheckUtils]: 14: Hoare triple {16836#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:42,449 INFO L290 TraceCheckUtils]: 15: Hoare triple {16837#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:42,449 INFO L290 TraceCheckUtils]: 16: Hoare triple {16837#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:42,450 INFO L290 TraceCheckUtils]: 17: Hoare triple {16838#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:42,450 INFO L290 TraceCheckUtils]: 18: Hoare triple {16838#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:42,450 INFO L290 TraceCheckUtils]: 19: Hoare triple {16839#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:42,451 INFO L290 TraceCheckUtils]: 20: Hoare triple {16839#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16840#(<= main_~i~0 7)} is VALID [2022-04-07 22:46:42,451 INFO L290 TraceCheckUtils]: 21: Hoare triple {16840#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16841#(<= main_~n~0 7)} is VALID [2022-04-07 22:46:42,451 INFO L290 TraceCheckUtils]: 22: Hoare triple {16841#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,452 INFO L290 TraceCheckUtils]: 23: Hoare triple {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,452 INFO L272 TraceCheckUtils]: 24: Hoare triple {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,452 INFO L290 TraceCheckUtils]: 25: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,452 INFO L290 TraceCheckUtils]: 26: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,452 INFO L290 TraceCheckUtils]: 27: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,452 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {16828#true} {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,453 INFO L290 TraceCheckUtils]: 29: Hoare triple {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,453 INFO L290 TraceCheckUtils]: 30: Hoare triple {16949#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,453 INFO L290 TraceCheckUtils]: 31: Hoare triple {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,453 INFO L272 TraceCheckUtils]: 32: Hoare triple {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,453 INFO L290 TraceCheckUtils]: 33: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,454 INFO L290 TraceCheckUtils]: 34: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,454 INFO L290 TraceCheckUtils]: 35: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,454 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {16828#true} {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,454 INFO L290 TraceCheckUtils]: 37: Hoare triple {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,455 INFO L290 TraceCheckUtils]: 38: Hoare triple {16974#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 22:46:42,455 INFO L290 TraceCheckUtils]: 39: Hoare triple {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 22:46:42,455 INFO L272 TraceCheckUtils]: 40: Hoare triple {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,455 INFO L290 TraceCheckUtils]: 41: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,455 INFO L290 TraceCheckUtils]: 42: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,455 INFO L290 TraceCheckUtils]: 43: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,456 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {16828#true} {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 22:46:42,456 INFO L290 TraceCheckUtils]: 45: Hoare triple {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 22:46:42,456 INFO L290 TraceCheckUtils]: 46: Hoare triple {16999#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 22:46:42,457 INFO L290 TraceCheckUtils]: 47: Hoare triple {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 22:46:42,457 INFO L272 TraceCheckUtils]: 48: Hoare triple {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,457 INFO L290 TraceCheckUtils]: 49: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,457 INFO L290 TraceCheckUtils]: 50: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,457 INFO L290 TraceCheckUtils]: 51: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,458 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {16828#true} {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 22:46:42,458 INFO L290 TraceCheckUtils]: 53: Hoare triple {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 22:46:42,458 INFO L290 TraceCheckUtils]: 54: Hoare triple {17024#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 22:46:42,459 INFO L290 TraceCheckUtils]: 55: Hoare triple {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 22:46:42,459 INFO L272 TraceCheckUtils]: 56: Hoare triple {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,459 INFO L290 TraceCheckUtils]: 57: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,459 INFO L290 TraceCheckUtils]: 58: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,459 INFO L290 TraceCheckUtils]: 59: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,459 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {16828#true} {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 22:46:42,460 INFO L290 TraceCheckUtils]: 61: Hoare triple {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 22:46:42,460 INFO L290 TraceCheckUtils]: 62: Hoare triple {17049#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,460 INFO L290 TraceCheckUtils]: 63: Hoare triple {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,461 INFO L272 TraceCheckUtils]: 64: Hoare triple {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,461 INFO L290 TraceCheckUtils]: 65: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,461 INFO L290 TraceCheckUtils]: 66: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,461 INFO L290 TraceCheckUtils]: 67: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,461 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {16828#true} {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,461 INFO L290 TraceCheckUtils]: 69: Hoare triple {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,462 INFO L290 TraceCheckUtils]: 70: Hoare triple {17074#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,462 INFO L290 TraceCheckUtils]: 71: Hoare triple {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,462 INFO L272 TraceCheckUtils]: 72: Hoare triple {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,462 INFO L290 TraceCheckUtils]: 73: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,462 INFO L290 TraceCheckUtils]: 74: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,462 INFO L290 TraceCheckUtils]: 75: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,463 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {16828#true} {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,463 INFO L290 TraceCheckUtils]: 77: Hoare triple {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,464 INFO L290 TraceCheckUtils]: 78: Hoare triple {17099#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17124#(and (<= 7 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 22:46:42,464 INFO L290 TraceCheckUtils]: 79: Hoare triple {17124#(and (<= 7 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:42,464 INFO L272 TraceCheckUtils]: 80: Hoare triple {16829#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:42,464 INFO L290 TraceCheckUtils]: 81: Hoare triple {16829#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16829#false} is VALID [2022-04-07 22:46:42,464 INFO L290 TraceCheckUtils]: 82: Hoare triple {16829#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:42,464 INFO L290 TraceCheckUtils]: 83: Hoare triple {16829#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:42,465 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:46:42,465 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:46:42,804 INFO L290 TraceCheckUtils]: 83: Hoare triple {16829#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:42,804 INFO L290 TraceCheckUtils]: 82: Hoare triple {16829#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16829#false} is VALID [2022-04-07 22:46:42,804 INFO L290 TraceCheckUtils]: 81: Hoare triple {16829#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16829#false} is VALID [2022-04-07 22:46:42,805 INFO L272 TraceCheckUtils]: 80: Hoare triple {16829#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:42,805 INFO L290 TraceCheckUtils]: 79: Hoare triple {16877#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16829#false} is VALID [2022-04-07 22:46:42,805 INFO L290 TraceCheckUtils]: 78: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16877#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 22:46:42,806 INFO L290 TraceCheckUtils]: 77: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:42,806 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {16828#true} {16872#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:42,806 INFO L290 TraceCheckUtils]: 75: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,806 INFO L290 TraceCheckUtils]: 74: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,806 INFO L290 TraceCheckUtils]: 73: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,806 INFO L272 TraceCheckUtils]: 72: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,807 INFO L290 TraceCheckUtils]: 71: Hoare triple {16872#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:42,807 INFO L290 TraceCheckUtils]: 70: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16872#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 22:46:42,807 INFO L290 TraceCheckUtils]: 69: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:42,808 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {16828#true} {16867#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:42,808 INFO L290 TraceCheckUtils]: 67: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,808 INFO L290 TraceCheckUtils]: 66: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,808 INFO L290 TraceCheckUtils]: 65: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,808 INFO L272 TraceCheckUtils]: 64: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,808 INFO L290 TraceCheckUtils]: 63: Hoare triple {16867#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:42,809 INFO L290 TraceCheckUtils]: 62: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16867#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 22:46:42,809 INFO L290 TraceCheckUtils]: 61: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:42,809 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {16828#true} {16862#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:42,810 INFO L290 TraceCheckUtils]: 59: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,810 INFO L290 TraceCheckUtils]: 58: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,810 INFO L290 TraceCheckUtils]: 57: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,810 INFO L272 TraceCheckUtils]: 56: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,810 INFO L290 TraceCheckUtils]: 55: Hoare triple {16862#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:42,810 INFO L290 TraceCheckUtils]: 54: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16862#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 22:46:42,811 INFO L290 TraceCheckUtils]: 53: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:42,811 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {16828#true} {16857#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:42,811 INFO L290 TraceCheckUtils]: 51: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,816 INFO L290 TraceCheckUtils]: 50: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,816 INFO L290 TraceCheckUtils]: 49: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,816 INFO L272 TraceCheckUtils]: 48: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,816 INFO L290 TraceCheckUtils]: 47: Hoare triple {16857#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:42,817 INFO L290 TraceCheckUtils]: 46: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16857#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 22:46:42,817 INFO L290 TraceCheckUtils]: 45: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:42,818 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {16828#true} {16852#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:42,818 INFO L290 TraceCheckUtils]: 43: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,818 INFO L290 TraceCheckUtils]: 42: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,818 INFO L290 TraceCheckUtils]: 41: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,818 INFO L272 TraceCheckUtils]: 40: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,818 INFO L290 TraceCheckUtils]: 39: Hoare triple {16852#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:42,819 INFO L290 TraceCheckUtils]: 38: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16852#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 22:46:42,819 INFO L290 TraceCheckUtils]: 37: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:42,819 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {16828#true} {16847#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:42,819 INFO L290 TraceCheckUtils]: 35: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,819 INFO L290 TraceCheckUtils]: 34: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,819 INFO L290 TraceCheckUtils]: 33: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,820 INFO L272 TraceCheckUtils]: 32: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,820 INFO L290 TraceCheckUtils]: 31: Hoare triple {16847#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:42,820 INFO L290 TraceCheckUtils]: 30: Hoare triple {17299#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16847#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 22:46:42,821 INFO L290 TraceCheckUtils]: 29: Hoare triple {17299#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17299#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 22:46:42,821 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {16828#true} {17299#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17299#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 22:46:42,821 INFO L290 TraceCheckUtils]: 27: Hoare triple {16828#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,821 INFO L290 TraceCheckUtils]: 26: Hoare triple {16828#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,821 INFO L290 TraceCheckUtils]: 25: Hoare triple {16828#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16828#true} is VALID [2022-04-07 22:46:42,821 INFO L272 TraceCheckUtils]: 24: Hoare triple {17299#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16828#true} is VALID [2022-04-07 22:46:42,821 INFO L290 TraceCheckUtils]: 23: Hoare triple {17299#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17299#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 22:46:42,822 INFO L290 TraceCheckUtils]: 22: Hoare triple {16841#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {17299#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 22:46:42,822 INFO L290 TraceCheckUtils]: 21: Hoare triple {16840#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16841#(<= main_~n~0 7)} is VALID [2022-04-07 22:46:42,823 INFO L290 TraceCheckUtils]: 20: Hoare triple {16839#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16840#(<= main_~i~0 7)} is VALID [2022-04-07 22:46:42,823 INFO L290 TraceCheckUtils]: 19: Hoare triple {16839#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:42,823 INFO L290 TraceCheckUtils]: 18: Hoare triple {16838#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16839#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:42,823 INFO L290 TraceCheckUtils]: 17: Hoare triple {16838#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:42,824 INFO L290 TraceCheckUtils]: 16: Hoare triple {16837#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16838#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:42,824 INFO L290 TraceCheckUtils]: 15: Hoare triple {16837#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:42,824 INFO L290 TraceCheckUtils]: 14: Hoare triple {16836#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16837#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:42,825 INFO L290 TraceCheckUtils]: 13: Hoare triple {16836#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:42,825 INFO L290 TraceCheckUtils]: 12: Hoare triple {16835#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16836#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:42,825 INFO L290 TraceCheckUtils]: 11: Hoare triple {16835#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:42,826 INFO L290 TraceCheckUtils]: 10: Hoare triple {16834#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16835#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:42,826 INFO L290 TraceCheckUtils]: 9: Hoare triple {16834#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:42,826 INFO L290 TraceCheckUtils]: 8: Hoare triple {16900#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16834#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:42,827 INFO L290 TraceCheckUtils]: 7: Hoare triple {16900#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16900#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:42,827 INFO L290 TraceCheckUtils]: 6: Hoare triple {16828#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16900#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:42,827 INFO L290 TraceCheckUtils]: 5: Hoare triple {16828#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16828#true} is VALID [2022-04-07 22:46:42,827 INFO L272 TraceCheckUtils]: 4: Hoare triple {16828#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,827 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16828#true} {16828#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,827 INFO L290 TraceCheckUtils]: 2: Hoare triple {16828#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {16828#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16828#true} is VALID [2022-04-07 22:46:42,828 INFO L272 TraceCheckUtils]: 0: Hoare triple {16828#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16828#true} is VALID [2022-04-07 22:46:42,828 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:46:42,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1713121857] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:46:42,828 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:46:42,828 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 30 [2022-04-07 22:46:42,828 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414870502] [2022-04-07 22:46:42,828 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:46:42,829 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-07 22:46:42,829 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:46:42,829 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:46:42,893 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:46:42,894 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-07 22:46:42,894 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:46:42,894 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-07 22:46:42,895 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=674, Unknown=0, NotChecked=0, Total=870 [2022-04-07 22:46:42,895 INFO L87 Difference]: Start difference. First operand 161 states and 170 transitions. Second operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:46:43,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:43,746 INFO L93 Difference]: Finished difference Result 178 states and 188 transitions. [2022-04-07 22:46:43,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-07 22:46:43,746 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-07 22:46:43,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:46:43,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:46:43,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 85 transitions. [2022-04-07 22:46:43,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:46:43,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 85 transitions. [2022-04-07 22:46:43,748 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 85 transitions. [2022-04-07 22:46:43,824 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:46:43,826 INFO L225 Difference]: With dead ends: 178 [2022-04-07 22:46:43,826 INFO L226 Difference]: Without dead ends: 134 [2022-04-07 22:46:43,826 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 173 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=441, Invalid=1721, Unknown=0, NotChecked=0, Total=2162 [2022-04-07 22:46:43,827 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 45 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 361 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 361 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:46:43,827 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 64 Invalid, 404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 361 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:46:43,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2022-04-07 22:46:43,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2022-04-07 22:46:43,878 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:46:43,879 INFO L82 GeneralOperation]: Start isEquivalent. First operand 134 states. Second operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:43,879 INFO L74 IsIncluded]: Start isIncluded. First operand 134 states. Second operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:43,879 INFO L87 Difference]: Start difference. First operand 134 states. Second operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:43,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:43,881 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2022-04-07 22:46:43,881 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2022-04-07 22:46:43,881 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:46:43,881 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:46:43,881 INFO L74 IsIncluded]: Start isIncluded. First operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) Second operand 134 states. [2022-04-07 22:46:43,882 INFO L87 Difference]: Start difference. First operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) Second operand 134 states. [2022-04-07 22:46:43,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:43,883 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2022-04-07 22:46:43,883 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2022-04-07 22:46:43,883 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:46:43,883 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:46:43,884 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:46:43,884 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:46:43,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 103 states have (on average 1.029126213592233) internal successors, (106), 105 states have internal predecessors, (106), 16 states have call successors, (16), 15 states have call predecessors, (16), 14 states have return successors, (15), 13 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:43,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2022-04-07 22:46:43,885 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 84 [2022-04-07 22:46:43,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:46:43,885 INFO L478 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2022-04-07 22:46:43,886 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 22:46:43,886 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2022-04-07 22:46:43,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-07 22:46:43,887 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:46:43,887 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:46:43,917 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-07 22:46:44,100 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-07 22:46:44,100 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:46:44,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:46:44,100 INFO L85 PathProgramCache]: Analyzing trace with hash -160730255, now seen corresponding path program 21 times [2022-04-07 22:46:44,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:46:44,100 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168317703] [2022-04-07 22:46:44,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:46:44,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:46:44,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:46:44,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {18189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18135#true} is VALID [2022-04-07 22:46:44,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18135#true} {18135#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 22:46:44,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,375 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,375 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,375 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,376 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:46:44,376 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 22:46:44,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,378 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,378 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,378 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,379 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:44,379 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 22:46:44,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,381 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,394 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:44,394 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 22:46:44,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,397 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,397 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,397 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,397 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,397 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 22:46:44,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,416 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,416 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,423 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:44,423 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-07 22:46:44,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:44,426 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-07 22:46:44,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,428 INFO L290 TraceCheckUtils]: 0: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:44,429 INFO L272 TraceCheckUtils]: 0: Hoare triple {18135#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:46:44,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {18189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18135#true} is VALID [2022-04-07 22:46:44,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18135#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,429 INFO L272 TraceCheckUtils]: 4: Hoare triple {18135#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,429 INFO L290 TraceCheckUtils]: 5: Hoare triple {18135#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18135#true} is VALID [2022-04-07 22:46:44,430 INFO L290 TraceCheckUtils]: 6: Hoare triple {18135#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18140#(= main_~i~0 0)} is VALID [2022-04-07 22:46:44,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {18140#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18140#(= main_~i~0 0)} is VALID [2022-04-07 22:46:44,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {18140#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18141#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:44,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {18141#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18141#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:46:44,431 INFO L290 TraceCheckUtils]: 10: Hoare triple {18141#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18142#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:44,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {18142#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18142#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:46:44,432 INFO L290 TraceCheckUtils]: 12: Hoare triple {18142#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18143#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:44,432 INFO L290 TraceCheckUtils]: 13: Hoare triple {18143#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18143#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:46:44,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {18143#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18144#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:44,433 INFO L290 TraceCheckUtils]: 15: Hoare triple {18144#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18144#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:46:44,433 INFO L290 TraceCheckUtils]: 16: Hoare triple {18144#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18145#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:44,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {18145#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18145#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:46:44,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {18145#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18146#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:46:44,434 INFO L290 TraceCheckUtils]: 19: Hoare triple {18146#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18146#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:46:44,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {18146#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18147#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:46:44,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {18147#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18148#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:46:44,436 INFO L290 TraceCheckUtils]: 22: Hoare triple {18148#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:46:44,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {18149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:46:44,436 INFO L290 TraceCheckUtils]: 24: Hoare triple {18149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:46:44,437 INFO L290 TraceCheckUtils]: 25: Hoare triple {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:46:44,437 INFO L272 TraceCheckUtils]: 26: Hoare triple {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,437 INFO L290 TraceCheckUtils]: 27: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,437 INFO L290 TraceCheckUtils]: 28: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,437 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18135#true} {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:46:44,438 INFO L290 TraceCheckUtils]: 31: Hoare triple {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:46:44,438 INFO L290 TraceCheckUtils]: 32: Hoare triple {18150#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:44,438 INFO L290 TraceCheckUtils]: 33: Hoare triple {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:44,438 INFO L272 TraceCheckUtils]: 34: Hoare triple {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,439 INFO L290 TraceCheckUtils]: 35: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,439 INFO L290 TraceCheckUtils]: 36: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,439 INFO L290 TraceCheckUtils]: 37: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,439 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18135#true} {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:44,439 INFO L290 TraceCheckUtils]: 39: Hoare triple {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:46:44,440 INFO L290 TraceCheckUtils]: 40: Hoare triple {18155#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:44,440 INFO L290 TraceCheckUtils]: 41: Hoare triple {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:44,440 INFO L272 TraceCheckUtils]: 42: Hoare triple {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,440 INFO L290 TraceCheckUtils]: 43: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,440 INFO L290 TraceCheckUtils]: 44: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,441 INFO L290 TraceCheckUtils]: 45: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,441 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18135#true} {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:44,441 INFO L290 TraceCheckUtils]: 47: Hoare triple {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:46:44,442 INFO L290 TraceCheckUtils]: 48: Hoare triple {18160#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,442 INFO L290 TraceCheckUtils]: 49: Hoare triple {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,442 INFO L272 TraceCheckUtils]: 50: Hoare triple {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,442 INFO L290 TraceCheckUtils]: 51: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,442 INFO L290 TraceCheckUtils]: 52: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,442 INFO L290 TraceCheckUtils]: 53: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,443 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18135#true} {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,443 INFO L290 TraceCheckUtils]: 55: Hoare triple {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,444 INFO L290 TraceCheckUtils]: 56: Hoare triple {18165#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:44,444 INFO L290 TraceCheckUtils]: 57: Hoare triple {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:44,444 INFO L272 TraceCheckUtils]: 58: Hoare triple {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,444 INFO L290 TraceCheckUtils]: 59: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,444 INFO L290 TraceCheckUtils]: 60: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,444 INFO L290 TraceCheckUtils]: 61: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,445 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18135#true} {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:44,445 INFO L290 TraceCheckUtils]: 63: Hoare triple {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:46:44,446 INFO L290 TraceCheckUtils]: 64: Hoare triple {18170#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:44,446 INFO L290 TraceCheckUtils]: 65: Hoare triple {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:44,446 INFO L272 TraceCheckUtils]: 66: Hoare triple {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,446 INFO L290 TraceCheckUtils]: 67: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,446 INFO L290 TraceCheckUtils]: 68: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,446 INFO L290 TraceCheckUtils]: 69: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,447 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18135#true} {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:44,447 INFO L290 TraceCheckUtils]: 71: Hoare triple {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:46:44,448 INFO L290 TraceCheckUtils]: 72: Hoare triple {18175#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:44,448 INFO L290 TraceCheckUtils]: 73: Hoare triple {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:44,448 INFO L272 TraceCheckUtils]: 74: Hoare triple {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18135#true} is VALID [2022-04-07 22:46:44,448 INFO L290 TraceCheckUtils]: 75: Hoare triple {18135#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18135#true} is VALID [2022-04-07 22:46:44,448 INFO L290 TraceCheckUtils]: 76: Hoare triple {18135#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,448 INFO L290 TraceCheckUtils]: 77: Hoare triple {18135#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:44,449 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18135#true} {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:44,449 INFO L290 TraceCheckUtils]: 79: Hoare triple {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:46:44,450 INFO L290 TraceCheckUtils]: 80: Hoare triple {18180#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18185#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:46:44,450 INFO L290 TraceCheckUtils]: 81: Hoare triple {18185#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18186#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:46:44,450 INFO L272 TraceCheckUtils]: 82: Hoare triple {18186#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18187#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:46:44,451 INFO L290 TraceCheckUtils]: 83: Hoare triple {18187#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18188#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:46:44,451 INFO L290 TraceCheckUtils]: 84: Hoare triple {18188#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18136#false} is VALID [2022-04-07 22:46:44,451 INFO L290 TraceCheckUtils]: 85: Hoare triple {18136#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18136#false} is VALID [2022-04-07 22:46:44,451 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:46:44,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:46:44,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168317703] [2022-04-07 22:46:44,452 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1168317703] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:46:44,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1752351268] [2022-04-07 22:46:44,452 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:46:44,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:46:44,452 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:46:44,453 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:46:44,453 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 22:46:44,550 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-07 22:46:44,550 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:46:44,551 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-07 22:46:44,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:46:44,570 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:46:44,788 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:46:50,315 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-07 22:46:50,315 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-07 22:46:50,399 INFO L272 TraceCheckUtils]: 0: Hoare triple {18135#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:50,399 INFO L290 TraceCheckUtils]: 1: Hoare triple {18135#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18135#true} is VALID [2022-04-07 22:46:50,399 INFO L290 TraceCheckUtils]: 2: Hoare triple {18135#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:50,399 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18135#true} {18135#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:50,400 INFO L272 TraceCheckUtils]: 4: Hoare triple {18135#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18135#true} is VALID [2022-04-07 22:46:50,400 INFO L290 TraceCheckUtils]: 5: Hoare triple {18135#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18135#true} is VALID [2022-04-07 22:46:50,400 INFO L290 TraceCheckUtils]: 6: Hoare triple {18135#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18211#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:50,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {18211#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18211#(<= main_~i~0 0)} is VALID [2022-04-07 22:46:50,401 INFO L290 TraceCheckUtils]: 8: Hoare triple {18211#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18218#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:50,401 INFO L290 TraceCheckUtils]: 9: Hoare triple {18218#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18218#(<= main_~i~0 1)} is VALID [2022-04-07 22:46:50,401 INFO L290 TraceCheckUtils]: 10: Hoare triple {18218#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18225#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:50,402 INFO L290 TraceCheckUtils]: 11: Hoare triple {18225#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18225#(<= main_~i~0 2)} is VALID [2022-04-07 22:46:50,402 INFO L290 TraceCheckUtils]: 12: Hoare triple {18225#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18232#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:50,402 INFO L290 TraceCheckUtils]: 13: Hoare triple {18232#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18232#(<= main_~i~0 3)} is VALID [2022-04-07 22:46:50,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {18232#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18239#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:50,403 INFO L290 TraceCheckUtils]: 15: Hoare triple {18239#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18239#(<= main_~i~0 4)} is VALID [2022-04-07 22:46:50,403 INFO L290 TraceCheckUtils]: 16: Hoare triple {18239#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18246#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:50,403 INFO L290 TraceCheckUtils]: 17: Hoare triple {18246#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18246#(<= main_~i~0 5)} is VALID [2022-04-07 22:46:50,404 INFO L290 TraceCheckUtils]: 18: Hoare triple {18246#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18253#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:50,404 INFO L290 TraceCheckUtils]: 19: Hoare triple {18253#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18253#(<= main_~i~0 6)} is VALID [2022-04-07 22:46:50,404 INFO L290 TraceCheckUtils]: 20: Hoare triple {18253#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18260#(<= main_~i~0 7)} is VALID [2022-04-07 22:46:50,405 INFO L290 TraceCheckUtils]: 21: Hoare triple {18260#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18264#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0))} is VALID [2022-04-07 22:46:50,406 INFO L290 TraceCheckUtils]: 22: Hoare triple {18264#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18268#(exists ((v_main_~i~0_228 Int)) (and (<= main_~i~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,407 INFO L290 TraceCheckUtils]: 23: Hoare triple {18268#(exists ((v_main_~i~0_228 Int)) (and (<= main_~i~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18272#(exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,407 INFO L290 TraceCheckUtils]: 24: Hoare triple {18272#(exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,408 INFO L290 TraceCheckUtils]: 25: Hoare triple {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,411 INFO L272 TraceCheckUtils]: 26: Hoare triple {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,412 INFO L290 TraceCheckUtils]: 27: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,412 INFO L290 TraceCheckUtils]: 28: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,412 INFO L290 TraceCheckUtils]: 29: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,413 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,413 INFO L290 TraceCheckUtils]: 31: Hoare triple {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,414 INFO L290 TraceCheckUtils]: 32: Hoare triple {18276#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,415 INFO L290 TraceCheckUtils]: 33: Hoare triple {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,421 INFO L272 TraceCheckUtils]: 34: Hoare triple {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,421 INFO L290 TraceCheckUtils]: 35: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,421 INFO L290 TraceCheckUtils]: 36: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,422 INFO L290 TraceCheckUtils]: 37: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,422 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,423 INFO L290 TraceCheckUtils]: 39: Hoare triple {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,423 INFO L290 TraceCheckUtils]: 40: Hoare triple {18302#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,424 INFO L290 TraceCheckUtils]: 41: Hoare triple {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,430 INFO L272 TraceCheckUtils]: 42: Hoare triple {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,430 INFO L290 TraceCheckUtils]: 43: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,430 INFO L290 TraceCheckUtils]: 44: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,430 INFO L290 TraceCheckUtils]: 45: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,431 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,432 INFO L290 TraceCheckUtils]: 47: Hoare triple {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,432 INFO L290 TraceCheckUtils]: 48: Hoare triple {18327#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,433 INFO L290 TraceCheckUtils]: 49: Hoare triple {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,436 INFO L272 TraceCheckUtils]: 50: Hoare triple {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,436 INFO L290 TraceCheckUtils]: 51: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,437 INFO L290 TraceCheckUtils]: 52: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,437 INFO L290 TraceCheckUtils]: 53: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,437 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,438 INFO L290 TraceCheckUtils]: 55: Hoare triple {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,439 INFO L290 TraceCheckUtils]: 56: Hoare triple {18352#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,439 INFO L290 TraceCheckUtils]: 57: Hoare triple {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,442 INFO L272 TraceCheckUtils]: 58: Hoare triple {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,443 INFO L290 TraceCheckUtils]: 59: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,443 INFO L290 TraceCheckUtils]: 60: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,443 INFO L290 TraceCheckUtils]: 61: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,444 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,444 INFO L290 TraceCheckUtils]: 63: Hoare triple {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,445 INFO L290 TraceCheckUtils]: 64: Hoare triple {18377#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,446 INFO L290 TraceCheckUtils]: 65: Hoare triple {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,451 INFO L272 TraceCheckUtils]: 66: Hoare triple {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,451 INFO L290 TraceCheckUtils]: 67: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,451 INFO L290 TraceCheckUtils]: 68: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,452 INFO L290 TraceCheckUtils]: 69: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,452 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,453 INFO L290 TraceCheckUtils]: 71: Hoare triple {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,454 INFO L290 TraceCheckUtils]: 72: Hoare triple {18402#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,454 INFO L290 TraceCheckUtils]: 73: Hoare triple {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,457 INFO L272 TraceCheckUtils]: 74: Hoare triple {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,457 INFO L290 TraceCheckUtils]: 75: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,458 INFO L290 TraceCheckUtils]: 76: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,458 INFO L290 TraceCheckUtils]: 77: Hoare triple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} is VALID [2022-04-07 22:46:50,458 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18283#(exists ((v_main_~x~0.offset_BEFORE_CALL_105 Int) (v_main_~x~0.base_BEFORE_CALL_105 Int) (v_main_~i~0_228 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_105) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_105)) 0) (<= v_main_~i~0_228 7)))} {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,459 INFO L290 TraceCheckUtils]: 79: Hoare triple {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,460 INFO L290 TraceCheckUtils]: 80: Hoare triple {18427#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18452#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} is VALID [2022-04-07 22:46:50,460 INFO L290 TraceCheckUtils]: 81: Hoare triple {18452#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0) (<= v_main_~i~0_228 7))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18186#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:46:50,461 INFO L272 TraceCheckUtils]: 82: Hoare triple {18186#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18459#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:46:50,461 INFO L290 TraceCheckUtils]: 83: Hoare triple {18459#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18463#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:46:50,461 INFO L290 TraceCheckUtils]: 84: Hoare triple {18463#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18136#false} is VALID [2022-04-07 22:46:50,462 INFO L290 TraceCheckUtils]: 85: Hoare triple {18136#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18136#false} is VALID [2022-04-07 22:46:50,462 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 91 proven. 85 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:46:50,462 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:46:50,773 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1752351268] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:46:50,773 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 22:46:50,774 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 25] total 46 [2022-04-07 22:46:50,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050297977] [2022-04-07 22:46:50,774 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 22:46:50,775 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) Word has length 86 [2022-04-07 22:46:50,775 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:46:50,775 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:50,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:46:50,933 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-04-07 22:46:50,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:46:50,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-04-07 22:46:50,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=228, Invalid=2028, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 22:46:50,934 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:52,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:46:52,355 INFO L93 Difference]: Finished difference Result 159 states and 161 transitions. [2022-04-07 22:46:52,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-07 22:46:52,355 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) Word has length 86 [2022-04-07 22:46:52,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:46:52,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:52,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 93 transitions. [2022-04-07 22:46:52,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:46:52,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 93 transitions. [2022-04-07 22:46:52,358 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 93 transitions. [2022-04-07 22:47:03,507 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 88 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-07 22:47:03,509 INFO L225 Difference]: With dead ends: 159 [2022-04-07 22:47:03,509 INFO L226 Difference]: Without dead ends: 91 [2022-04-07 22:47:03,513 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 85 SyntacticMatches, 14 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1379 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=537, Invalid=5625, Unknown=0, NotChecked=0, Total=6162 [2022-04-07 22:47:03,513 INFO L913 BasicCegarLoop]: 38 mSDtfsCounter, 31 mSDsluCounter, 280 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 318 SdHoareTripleChecker+Invalid, 589 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 306 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:47:03,513 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 318 Invalid, 589 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 266 Invalid, 0 Unknown, 306 Unchecked, 0.2s Time] [2022-04-07 22:47:03,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-07 22:47:03,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2022-04-07 22:47:03,565 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:47:03,565 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:47:03,565 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:47:03,566 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:47:03,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:47:03,567 INFO L93 Difference]: Finished difference Result 91 states and 92 transitions. [2022-04-07 22:47:03,567 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 92 transitions. [2022-04-07 22:47:03,567 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:47:03,567 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:47:03,567 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 91 states. [2022-04-07 22:47:03,567 INFO L87 Difference]: Start difference. First operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 91 states. [2022-04-07 22:47:03,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:47:03,569 INFO L93 Difference]: Finished difference Result 91 states and 92 transitions. [2022-04-07 22:47:03,569 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 92 transitions. [2022-04-07 22:47:03,569 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:47:03,569 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:47:03,569 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:47:03,569 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:47:03,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 71 states have (on average 1.028169014084507) internal successors, (73), 72 states have internal predecessors, (73), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 22:47:03,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 92 transitions. [2022-04-07 22:47:03,570 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 92 transitions. Word has length 86 [2022-04-07 22:47:03,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:47:03,570 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 92 transitions. [2022-04-07 22:47:03,570 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 45 states have (on average 2.1555555555555554) internal successors, (97), 43 states have internal predecessors, (97), 16 states have call successors, (19), 5 states have call predecessors, (19), 2 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-07 22:47:03,571 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 92 transitions. [2022-04-07 22:47:03,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-04-07 22:47:03,571 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:47:03,571 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:47:03,589 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 22:47:03,787 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:47:03,787 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:47:03,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:47:03,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1942284719, now seen corresponding path program 22 times [2022-04-07 22:47:03,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:47:03,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646151103] [2022-04-07 22:47:03,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:47:03,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:47:03,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,118 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:47:04,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {19158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19103#true} is VALID [2022-04-07 22:47:04,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,149 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19103#true} {19103#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,149 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 22:47:04,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,152 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,152 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,153 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,153 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:47:04,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 22:47:04,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,157 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,157 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,158 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:47:04,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 22:47:04,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,161 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,162 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:47:04,162 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-07 22:47:04,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,166 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,166 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-07 22:47:04,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,169 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,170 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,171 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:47:04,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-07 22:47:04,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,176 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,177 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,177 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,177 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:47:04,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-07 22:47:04,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,181 INFO L290 TraceCheckUtils]: 0: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,181 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,182 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:47:04,183 INFO L272 TraceCheckUtils]: 0: Hoare triple {19103#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:47:04,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {19158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19103#true} is VALID [2022-04-07 22:47:04,183 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,183 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19103#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,183 INFO L272 TraceCheckUtils]: 4: Hoare triple {19103#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,183 INFO L290 TraceCheckUtils]: 5: Hoare triple {19103#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19103#true} is VALID [2022-04-07 22:47:04,184 INFO L290 TraceCheckUtils]: 6: Hoare triple {19103#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:47:04,184 INFO L290 TraceCheckUtils]: 7: Hoare triple {19108#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:47:04,184 INFO L290 TraceCheckUtils]: 8: Hoare triple {19108#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:47:04,185 INFO L290 TraceCheckUtils]: 9: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:47:04,186 INFO L290 TraceCheckUtils]: 10: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:47:04,186 INFO L290 TraceCheckUtils]: 11: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:47:04,187 INFO L290 TraceCheckUtils]: 12: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:47:04,187 INFO L290 TraceCheckUtils]: 13: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:47:04,188 INFO L290 TraceCheckUtils]: 14: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:47:04,188 INFO L290 TraceCheckUtils]: 15: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:47:04,189 INFO L290 TraceCheckUtils]: 16: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:47:04,190 INFO L290 TraceCheckUtils]: 17: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:47:04,190 INFO L290 TraceCheckUtils]: 18: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:47:04,191 INFO L290 TraceCheckUtils]: 19: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:47:04,191 INFO L290 TraceCheckUtils]: 20: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:47:04,192 INFO L290 TraceCheckUtils]: 21: Hoare triple {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19116#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:47:04,193 INFO L290 TraceCheckUtils]: 22: Hoare triple {19116#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19117#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:47:04,193 INFO L290 TraceCheckUtils]: 23: Hoare triple {19117#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:47:04,194 INFO L290 TraceCheckUtils]: 24: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:47:04,194 INFO L290 TraceCheckUtils]: 25: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:47:04,195 INFO L290 TraceCheckUtils]: 26: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:47:04,195 INFO L290 TraceCheckUtils]: 27: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:47:04,195 INFO L272 TraceCheckUtils]: 28: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,195 INFO L290 TraceCheckUtils]: 29: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,196 INFO L290 TraceCheckUtils]: 30: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,196 INFO L290 TraceCheckUtils]: 31: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,196 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19103#true} {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:47:04,197 INFO L290 TraceCheckUtils]: 33: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:47:04,197 INFO L290 TraceCheckUtils]: 34: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:47:04,198 INFO L290 TraceCheckUtils]: 35: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:47:04,198 INFO L272 TraceCheckUtils]: 36: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,198 INFO L290 TraceCheckUtils]: 37: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,198 INFO L290 TraceCheckUtils]: 38: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,198 INFO L290 TraceCheckUtils]: 39: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,199 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19103#true} {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:47:04,199 INFO L290 TraceCheckUtils]: 41: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:47:04,200 INFO L290 TraceCheckUtils]: 42: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:47:04,200 INFO L290 TraceCheckUtils]: 43: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:47:04,200 INFO L272 TraceCheckUtils]: 44: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,201 INFO L290 TraceCheckUtils]: 45: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,201 INFO L290 TraceCheckUtils]: 46: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,201 INFO L290 TraceCheckUtils]: 47: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,201 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19103#true} {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:47:04,202 INFO L290 TraceCheckUtils]: 49: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:47:04,203 INFO L290 TraceCheckUtils]: 50: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,203 INFO L290 TraceCheckUtils]: 51: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,203 INFO L272 TraceCheckUtils]: 52: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,203 INFO L290 TraceCheckUtils]: 53: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,203 INFO L290 TraceCheckUtils]: 54: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,203 INFO L290 TraceCheckUtils]: 55: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,204 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19103#true} {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,205 INFO L290 TraceCheckUtils]: 57: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,205 INFO L290 TraceCheckUtils]: 58: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:47:04,206 INFO L290 TraceCheckUtils]: 59: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:47:04,206 INFO L272 TraceCheckUtils]: 60: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,206 INFO L290 TraceCheckUtils]: 61: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,206 INFO L290 TraceCheckUtils]: 62: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,206 INFO L290 TraceCheckUtils]: 63: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,207 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19103#true} {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:47:04,207 INFO L290 TraceCheckUtils]: 65: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:47:04,208 INFO L290 TraceCheckUtils]: 66: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:47:04,208 INFO L290 TraceCheckUtils]: 67: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:47:04,208 INFO L272 TraceCheckUtils]: 68: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,209 INFO L290 TraceCheckUtils]: 69: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,209 INFO L290 TraceCheckUtils]: 70: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,209 INFO L290 TraceCheckUtils]: 71: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,209 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19103#true} {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:47:04,210 INFO L290 TraceCheckUtils]: 73: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:47:04,211 INFO L290 TraceCheckUtils]: 74: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:47:04,219 INFO L290 TraceCheckUtils]: 75: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:47:04,219 INFO L272 TraceCheckUtils]: 76: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:47:04,219 INFO L290 TraceCheckUtils]: 77: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:47:04,220 INFO L290 TraceCheckUtils]: 78: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,220 INFO L290 TraceCheckUtils]: 79: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:47:04,220 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19103#true} {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:47:04,221 INFO L290 TraceCheckUtils]: 81: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:47:04,222 INFO L290 TraceCheckUtils]: 82: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:47:04,222 INFO L290 TraceCheckUtils]: 83: Hoare triple {19154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19155#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:47:04,223 INFO L272 TraceCheckUtils]: 84: Hoare triple {19155#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19156#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:47:04,223 INFO L290 TraceCheckUtils]: 85: Hoare triple {19156#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19157#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:47:04,223 INFO L290 TraceCheckUtils]: 86: Hoare triple {19157#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:47:04,224 INFO L290 TraceCheckUtils]: 87: Hoare triple {19104#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:47:04,224 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:47:04,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:47:04,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1646151103] [2022-04-07 22:47:04,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1646151103] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:47:04,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1046212655] [2022-04-07 22:47:04,225 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:47:04,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:47:04,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:47:04,240 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:47:04,296 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 22:47:04,460 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:47:04,461 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:47:04,462 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-07 22:47:04,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:47:04,483 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:47:04,616 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:47:04,820 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 22:47:04,820 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 22:48:39,769 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:48:39,821 INFO L272 TraceCheckUtils]: 0: Hoare triple {19103#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19103#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L272 TraceCheckUtils]: 4: Hoare triple {19103#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L290 TraceCheckUtils]: 5: Hoare triple {19103#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19103#true} is VALID [2022-04-07 22:48:39,822 INFO L290 TraceCheckUtils]: 6: Hoare triple {19103#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:48:39,822 INFO L290 TraceCheckUtils]: 7: Hoare triple {19108#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:48:39,823 INFO L290 TraceCheckUtils]: 8: Hoare triple {19108#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:39,823 INFO L290 TraceCheckUtils]: 9: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:39,824 INFO L290 TraceCheckUtils]: 10: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:39,824 INFO L290 TraceCheckUtils]: 11: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:39,824 INFO L290 TraceCheckUtils]: 12: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:39,825 INFO L290 TraceCheckUtils]: 13: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:39,825 INFO L290 TraceCheckUtils]: 14: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:39,825 INFO L290 TraceCheckUtils]: 15: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:39,826 INFO L290 TraceCheckUtils]: 16: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:39,826 INFO L290 TraceCheckUtils]: 17: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:39,827 INFO L290 TraceCheckUtils]: 18: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:39,827 INFO L290 TraceCheckUtils]: 19: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:39,827 INFO L290 TraceCheckUtils]: 20: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:48:39,828 INFO L290 TraceCheckUtils]: 21: Hoare triple {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19116#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:48:39,829 INFO L290 TraceCheckUtils]: 22: Hoare triple {19116#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19228#(exists ((v_main_~i~0_236 Int)) (and (<= 7 v_main_~i~0_236) (<= v_main_~i~0_236 7) (<= (+ v_main_~i~0_236 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_236))) 0)))} is VALID [2022-04-07 22:48:39,830 INFO L290 TraceCheckUtils]: 23: Hoare triple {19228#(exists ((v_main_~i~0_236 Int)) (and (<= 7 v_main_~i~0_236) (<= v_main_~i~0_236 7) (<= (+ v_main_~i~0_236 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_236))) 0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:39,830 INFO L290 TraceCheckUtils]: 24: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:39,830 INFO L290 TraceCheckUtils]: 25: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:39,831 INFO L290 TraceCheckUtils]: 26: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:39,831 INFO L290 TraceCheckUtils]: 27: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:39,832 INFO L272 TraceCheckUtils]: 28: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,832 INFO L290 TraceCheckUtils]: 29: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,832 INFO L290 TraceCheckUtils]: 30: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,833 INFO L290 TraceCheckUtils]: 31: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,833 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:39,833 INFO L290 TraceCheckUtils]: 33: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:39,834 INFO L290 TraceCheckUtils]: 34: Hoare triple {19119#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:48:39,834 INFO L290 TraceCheckUtils]: 35: Hoare triple {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:48:39,835 INFO L272 TraceCheckUtils]: 36: Hoare triple {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,835 INFO L290 TraceCheckUtils]: 37: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,835 INFO L290 TraceCheckUtils]: 38: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,836 INFO L290 TraceCheckUtils]: 39: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,836 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:48:39,836 INFO L290 TraceCheckUtils]: 41: Hoare triple {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} is VALID [2022-04-07 22:48:39,837 INFO L290 TraceCheckUtils]: 42: Hoare triple {19266#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,837 INFO L290 TraceCheckUtils]: 43: Hoare triple {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,838 INFO L272 TraceCheckUtils]: 44: Hoare triple {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,838 INFO L290 TraceCheckUtils]: 45: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,838 INFO L290 TraceCheckUtils]: 46: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,839 INFO L290 TraceCheckUtils]: 47: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,839 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,840 INFO L290 TraceCheckUtils]: 49: Hoare triple {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,840 INFO L290 TraceCheckUtils]: 50: Hoare triple {19291#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 1 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} is VALID [2022-04-07 22:48:39,840 INFO L290 TraceCheckUtils]: 51: Hoare triple {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} is VALID [2022-04-07 22:48:39,841 INFO L272 TraceCheckUtils]: 52: Hoare triple {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,841 INFO L290 TraceCheckUtils]: 53: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,842 INFO L290 TraceCheckUtils]: 54: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,842 INFO L290 TraceCheckUtils]: 55: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,842 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} is VALID [2022-04-07 22:48:39,843 INFO L290 TraceCheckUtils]: 57: Hoare triple {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} is VALID [2022-04-07 22:48:39,843 INFO L290 TraceCheckUtils]: 58: Hoare triple {19316#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:48:39,843 INFO L290 TraceCheckUtils]: 59: Hoare triple {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:48:39,844 INFO L272 TraceCheckUtils]: 60: Hoare triple {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,844 INFO L290 TraceCheckUtils]: 61: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,845 INFO L290 TraceCheckUtils]: 62: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,845 INFO L290 TraceCheckUtils]: 63: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,845 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:48:39,846 INFO L290 TraceCheckUtils]: 65: Hoare triple {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-07 22:48:39,846 INFO L290 TraceCheckUtils]: 66: Hoare triple {19341#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,846 INFO L290 TraceCheckUtils]: 67: Hoare triple {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,847 INFO L272 TraceCheckUtils]: 68: Hoare triple {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,847 INFO L290 TraceCheckUtils]: 69: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,848 INFO L290 TraceCheckUtils]: 70: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,848 INFO L290 TraceCheckUtils]: 71: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,848 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,849 INFO L290 TraceCheckUtils]: 73: Hoare triple {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:48:39,849 INFO L290 TraceCheckUtils]: 74: Hoare triple {19366#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-07 22:48:39,850 INFO L290 TraceCheckUtils]: 75: Hoare triple {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-07 22:48:39,850 INFO L272 TraceCheckUtils]: 76: Hoare triple {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,851 INFO L290 TraceCheckUtils]: 77: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,851 INFO L290 TraceCheckUtils]: 78: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,851 INFO L290 TraceCheckUtils]: 79: Hoare triple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} is VALID [2022-04-07 22:48:39,852 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19247#(exists ((v_main_~x~0.offset_BEFORE_CALL_112 Int) (v_main_~x~0.base_BEFORE_CALL_112 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_112) (+ v_main_~x~0.offset_BEFORE_CALL_112 28)) 0))} {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-07 22:48:39,852 INFO L290 TraceCheckUtils]: 81: Hoare triple {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-07 22:48:39,852 INFO L290 TraceCheckUtils]: 82: Hoare triple {19391#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19416#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 4))} is VALID [2022-04-07 22:48:39,853 INFO L290 TraceCheckUtils]: 83: Hoare triple {19416#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19155#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:48:39,853 INFO L272 TraceCheckUtils]: 84: Hoare triple {19155#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19423#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:48:39,853 INFO L290 TraceCheckUtils]: 85: Hoare triple {19423#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19427#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:48:39,854 INFO L290 TraceCheckUtils]: 86: Hoare triple {19427#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:48:39,854 INFO L290 TraceCheckUtils]: 87: Hoare triple {19104#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:48:39,854 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 0 proven. 193 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:48:39,854 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:48:42,184 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:48:42,187 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:48:42,298 INFO L290 TraceCheckUtils]: 87: Hoare triple {19104#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:48:42,298 INFO L290 TraceCheckUtils]: 86: Hoare triple {19427#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19104#false} is VALID [2022-04-07 22:48:42,299 INFO L290 TraceCheckUtils]: 85: Hoare triple {19423#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19427#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:48:42,299 INFO L272 TraceCheckUtils]: 84: Hoare triple {19155#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19423#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:48:42,299 INFO L290 TraceCheckUtils]: 83: Hoare triple {19154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19155#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:48:42,300 INFO L290 TraceCheckUtils]: 82: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:42,300 INFO L290 TraceCheckUtils]: 81: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:42,301 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19103#true} {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:42,301 INFO L290 TraceCheckUtils]: 79: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,301 INFO L290 TraceCheckUtils]: 78: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,301 INFO L290 TraceCheckUtils]: 77: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,301 INFO L272 TraceCheckUtils]: 76: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,301 INFO L290 TraceCheckUtils]: 75: Hoare triple {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:42,302 INFO L290 TraceCheckUtils]: 74: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19149#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:42,302 INFO L290 TraceCheckUtils]: 73: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:42,303 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19103#true} {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:42,303 INFO L290 TraceCheckUtils]: 71: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,303 INFO L290 TraceCheckUtils]: 70: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,303 INFO L290 TraceCheckUtils]: 69: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,303 INFO L272 TraceCheckUtils]: 68: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,303 INFO L290 TraceCheckUtils]: 67: Hoare triple {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:42,304 INFO L290 TraceCheckUtils]: 66: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19144#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:42,304 INFO L290 TraceCheckUtils]: 65: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:42,305 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19103#true} {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:42,305 INFO L290 TraceCheckUtils]: 63: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,305 INFO L290 TraceCheckUtils]: 62: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,305 INFO L290 TraceCheckUtils]: 61: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,305 INFO L272 TraceCheckUtils]: 60: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,305 INFO L290 TraceCheckUtils]: 59: Hoare triple {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:42,306 INFO L290 TraceCheckUtils]: 58: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19139#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:42,306 INFO L290 TraceCheckUtils]: 57: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:42,307 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19103#true} {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:42,307 INFO L290 TraceCheckUtils]: 55: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,307 INFO L290 TraceCheckUtils]: 54: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,307 INFO L290 TraceCheckUtils]: 53: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,307 INFO L272 TraceCheckUtils]: 52: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,307 INFO L290 TraceCheckUtils]: 51: Hoare triple {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:42,308 INFO L290 TraceCheckUtils]: 50: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19134#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:42,308 INFO L290 TraceCheckUtils]: 49: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:42,309 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19103#true} {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:42,309 INFO L290 TraceCheckUtils]: 47: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,309 INFO L290 TraceCheckUtils]: 46: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,309 INFO L290 TraceCheckUtils]: 45: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,309 INFO L272 TraceCheckUtils]: 44: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,309 INFO L290 TraceCheckUtils]: 43: Hoare triple {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:42,310 INFO L290 TraceCheckUtils]: 42: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19129#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:42,310 INFO L290 TraceCheckUtils]: 41: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:42,310 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19103#true} {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:42,311 INFO L290 TraceCheckUtils]: 39: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,311 INFO L290 TraceCheckUtils]: 38: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,311 INFO L290 TraceCheckUtils]: 37: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,311 INFO L272 TraceCheckUtils]: 36: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,311 INFO L290 TraceCheckUtils]: 35: Hoare triple {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:42,312 INFO L290 TraceCheckUtils]: 34: Hoare triple {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19124#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:42,312 INFO L290 TraceCheckUtils]: 33: Hoare triple {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:48:42,312 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19103#true} {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:48:42,312 INFO L290 TraceCheckUtils]: 31: Hoare triple {19103#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,313 INFO L290 TraceCheckUtils]: 30: Hoare triple {19103#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,313 INFO L290 TraceCheckUtils]: 29: Hoare triple {19103#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19103#true} is VALID [2022-04-07 22:48:42,313 INFO L272 TraceCheckUtils]: 28: Hoare triple {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19103#true} is VALID [2022-04-07 22:48:42,313 INFO L290 TraceCheckUtils]: 27: Hoare triple {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:48:42,313 INFO L290 TraceCheckUtils]: 26: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:48:42,314 INFO L290 TraceCheckUtils]: 25: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:42,314 INFO L290 TraceCheckUtils]: 24: Hoare triple {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:42,314 INFO L290 TraceCheckUtils]: 23: Hoare triple {19117#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19118#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:42,315 INFO L290 TraceCheckUtils]: 22: Hoare triple {19630#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19117#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:48:42,315 INFO L290 TraceCheckUtils]: 21: Hoare triple {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19630#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 22:48:42,316 INFO L290 TraceCheckUtils]: 20: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19115#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:48:42,316 INFO L290 TraceCheckUtils]: 19: Hoare triple {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:42,317 INFO L290 TraceCheckUtils]: 18: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19114#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:42,318 INFO L290 TraceCheckUtils]: 17: Hoare triple {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:42,318 INFO L290 TraceCheckUtils]: 16: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19113#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:42,319 INFO L290 TraceCheckUtils]: 15: Hoare triple {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:42,319 INFO L290 TraceCheckUtils]: 14: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19112#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:42,320 INFO L290 TraceCheckUtils]: 13: Hoare triple {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:42,320 INFO L290 TraceCheckUtils]: 12: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19111#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:42,320 INFO L290 TraceCheckUtils]: 11: Hoare triple {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:42,321 INFO L290 TraceCheckUtils]: 10: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19110#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:42,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 8: Hoare triple {19108#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19109#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 7: Hoare triple {19108#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 6: Hoare triple {19103#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19108#(= main_~i~0 0)} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {19103#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19103#true} is VALID [2022-04-07 22:48:42,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {19103#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19103#true} {19103#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {19103#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {19103#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19103#true} is VALID [2022-04-07 22:48:42,323 INFO L272 TraceCheckUtils]: 0: Hoare triple {19103#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19103#true} is VALID [2022-04-07 22:48:42,323 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:48:42,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1046212655] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:48:42,323 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:48:42,323 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 24] total 38 [2022-04-07 22:48:42,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007356226] [2022-04-07 22:48:42,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:48:42,324 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-07 22:48:42,324 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:48:42,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:48:42,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:48:42,438 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 22:48:42,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:48:42,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 22:48:42,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1286, Unknown=8, NotChecked=0, Total=1406 [2022-04-07 22:48:42,438 INFO L87 Difference]: Start difference. First operand 91 states and 92 transitions. Second operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:48:44,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:48:44,756 INFO L93 Difference]: Finished difference Result 159 states and 162 transitions. [2022-04-07 22:48:44,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-07 22:48:44,757 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-07 22:48:44,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:48:44,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:48:44,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 90 transitions. [2022-04-07 22:48:44,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:48:44,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 90 transitions. [2022-04-07 22:48:44,758 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 90 transitions. [2022-04-07 22:48:44,825 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:48:44,828 INFO L225 Difference]: With dead ends: 159 [2022-04-07 22:48:44,828 INFO L226 Difference]: Without dead ends: 157 [2022-04-07 22:48:44,829 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 167 SyntacticMatches, 19 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 96.8s TimeCoverageRelationStatistics Valid=271, Invalid=3381, Unknown=8, NotChecked=0, Total=3660 [2022-04-07 22:48:44,829 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 64 mSDsluCounter, 303 mSDsCounter, 0 mSdLazyCounter, 1332 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 334 SdHoareTripleChecker+Invalid, 1523 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 1332 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 166 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 22:48:44,829 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [65 Valid, 334 Invalid, 1523 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 1332 Invalid, 0 Unknown, 166 Unchecked, 0.9s Time] [2022-04-07 22:48:44,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2022-04-07 22:48:44,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 154. [2022-04-07 22:48:44,902 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:48:44,903 INFO L82 GeneralOperation]: Start isEquivalent. First operand 157 states. Second operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 22:48:44,903 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 22:48:44,903 INFO L87 Difference]: Start difference. First operand 157 states. Second operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 22:48:44,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:48:44,905 INFO L93 Difference]: Finished difference Result 157 states and 160 transitions. [2022-04-07 22:48:44,905 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 160 transitions. [2022-04-07 22:48:44,905 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:48:44,905 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:48:44,905 INFO L74 IsIncluded]: Start isIncluded. First operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 157 states. [2022-04-07 22:48:44,905 INFO L87 Difference]: Start difference. First operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 157 states. [2022-04-07 22:48:44,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:48:44,907 INFO L93 Difference]: Finished difference Result 157 states and 160 transitions. [2022-04-07 22:48:44,907 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 160 transitions. [2022-04-07 22:48:44,907 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:48:44,907 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:48:44,907 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:48:44,907 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:48:44,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 120 states have internal predecessors, (122), 18 states have call successors, (18), 18 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 22:48:44,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 157 transitions. [2022-04-07 22:48:44,909 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 157 transitions. Word has length 88 [2022-04-07 22:48:44,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:48:44,909 INFO L478 AbstractCegarLoop]: Abstraction has 154 states and 157 transitions. [2022-04-07 22:48:44,909 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:48:44,909 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 157 transitions. [2022-04-07 22:48:44,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-04-07 22:48:44,910 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:48:44,910 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:48:44,928 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-04-07 22:48:45,126 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:48:45,127 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:48:45,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:48:45,127 INFO L85 PathProgramCache]: Analyzing trace with hash 10078317, now seen corresponding path program 23 times [2022-04-07 22:48:45,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:48:45,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908988971] [2022-04-07 22:48:45,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:48:45,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:48:45,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:48:45,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,459 INFO L290 TraceCheckUtils]: 0: Hoare triple {20561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20505#true} is VALID [2022-04-07 22:48:45,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,459 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20505#true} {20505#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,459 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 22:48:45,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,480 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,480 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,480 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:45,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 22:48:45,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,483 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,483 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:45,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 22:48:45,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,485 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,485 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,486 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:45,486 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 22:48:45,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,491 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,491 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-07 22:48:45,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,494 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:45,494 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-07 22:48:45,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,495 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,496 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:45,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-07 22:48:45,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,504 INFO L290 TraceCheckUtils]: 0: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:45,504 INFO L272 TraceCheckUtils]: 0: Hoare triple {20505#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:48:45,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {20561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20505#true} is VALID [2022-04-07 22:48:45,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,505 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20505#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,505 INFO L272 TraceCheckUtils]: 4: Hoare triple {20505#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,505 INFO L290 TraceCheckUtils]: 5: Hoare triple {20505#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {20505#true} is VALID [2022-04-07 22:48:45,505 INFO L290 TraceCheckUtils]: 6: Hoare triple {20505#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:48:45,505 INFO L290 TraceCheckUtils]: 7: Hoare triple {20510#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:48:45,506 INFO L290 TraceCheckUtils]: 8: Hoare triple {20510#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:45,506 INFO L290 TraceCheckUtils]: 9: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:48:45,506 INFO L290 TraceCheckUtils]: 10: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:45,507 INFO L290 TraceCheckUtils]: 11: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:48:45,507 INFO L290 TraceCheckUtils]: 12: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:45,508 INFO L290 TraceCheckUtils]: 13: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:48:45,508 INFO L290 TraceCheckUtils]: 14: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:45,508 INFO L290 TraceCheckUtils]: 15: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:48:45,509 INFO L290 TraceCheckUtils]: 16: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:45,509 INFO L290 TraceCheckUtils]: 17: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:48:45,509 INFO L290 TraceCheckUtils]: 18: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:45,510 INFO L290 TraceCheckUtils]: 19: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:48:45,510 INFO L290 TraceCheckUtils]: 20: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:48:45,511 INFO L290 TraceCheckUtils]: 21: Hoare triple {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20518#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:48:45,511 INFO L290 TraceCheckUtils]: 22: Hoare triple {20518#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 22:48:45,512 INFO L290 TraceCheckUtils]: 23: Hoare triple {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 22:48:45,512 INFO L290 TraceCheckUtils]: 24: Hoare triple {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20520#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:48:45,513 INFO L290 TraceCheckUtils]: 25: Hoare triple {20520#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:45,513 INFO L290 TraceCheckUtils]: 26: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:45,513 INFO L290 TraceCheckUtils]: 27: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:48:45,513 INFO L290 TraceCheckUtils]: 28: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:45,514 INFO L290 TraceCheckUtils]: 29: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:45,514 INFO L272 TraceCheckUtils]: 30: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,514 INFO L290 TraceCheckUtils]: 31: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,514 INFO L290 TraceCheckUtils]: 32: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,514 INFO L290 TraceCheckUtils]: 33: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,514 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {20505#true} {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:45,515 INFO L290 TraceCheckUtils]: 35: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:48:45,515 INFO L290 TraceCheckUtils]: 36: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:45,515 INFO L290 TraceCheckUtils]: 37: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:45,515 INFO L272 TraceCheckUtils]: 38: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,515 INFO L290 TraceCheckUtils]: 39: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,515 INFO L290 TraceCheckUtils]: 40: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,516 INFO L290 TraceCheckUtils]: 41: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,516 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {20505#true} {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:45,516 INFO L290 TraceCheckUtils]: 43: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:48:45,517 INFO L290 TraceCheckUtils]: 44: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:45,517 INFO L290 TraceCheckUtils]: 45: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:45,517 INFO L272 TraceCheckUtils]: 46: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,517 INFO L290 TraceCheckUtils]: 47: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,517 INFO L290 TraceCheckUtils]: 48: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,517 INFO L290 TraceCheckUtils]: 49: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,518 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {20505#true} {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:45,518 INFO L290 TraceCheckUtils]: 51: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:48:45,518 INFO L290 TraceCheckUtils]: 52: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,519 INFO L290 TraceCheckUtils]: 53: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,519 INFO L272 TraceCheckUtils]: 54: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,519 INFO L290 TraceCheckUtils]: 55: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,519 INFO L290 TraceCheckUtils]: 56: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,519 INFO L290 TraceCheckUtils]: 57: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,519 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {20505#true} {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,520 INFO L290 TraceCheckUtils]: 59: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,520 INFO L290 TraceCheckUtils]: 60: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:45,521 INFO L290 TraceCheckUtils]: 61: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:45,521 INFO L272 TraceCheckUtils]: 62: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,521 INFO L290 TraceCheckUtils]: 63: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,521 INFO L290 TraceCheckUtils]: 64: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,521 INFO L290 TraceCheckUtils]: 65: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,521 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {20505#true} {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:45,522 INFO L290 TraceCheckUtils]: 67: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:48:45,522 INFO L290 TraceCheckUtils]: 68: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:45,522 INFO L290 TraceCheckUtils]: 69: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:45,522 INFO L272 TraceCheckUtils]: 70: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,522 INFO L290 TraceCheckUtils]: 71: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,523 INFO L290 TraceCheckUtils]: 72: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,523 INFO L290 TraceCheckUtils]: 73: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,523 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {20505#true} {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:45,523 INFO L290 TraceCheckUtils]: 75: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:48:45,524 INFO L290 TraceCheckUtils]: 76: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:45,524 INFO L290 TraceCheckUtils]: 77: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:45,524 INFO L272 TraceCheckUtils]: 78: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:48:45,524 INFO L290 TraceCheckUtils]: 79: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:48:45,524 INFO L290 TraceCheckUtils]: 80: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,524 INFO L290 TraceCheckUtils]: 81: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:48:45,525 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {20505#true} {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:45,525 INFO L290 TraceCheckUtils]: 83: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:48:45,526 INFO L290 TraceCheckUtils]: 84: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20557#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:48:45,526 INFO L290 TraceCheckUtils]: 85: Hoare triple {20557#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20558#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:48:45,526 INFO L272 TraceCheckUtils]: 86: Hoare triple {20558#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20559#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:48:45,527 INFO L290 TraceCheckUtils]: 87: Hoare triple {20559#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20560#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:48:45,527 INFO L290 TraceCheckUtils]: 88: Hoare triple {20560#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:48:45,527 INFO L290 TraceCheckUtils]: 89: Hoare triple {20506#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:48:45,527 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 198 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:48:45,527 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:48:45,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908988971] [2022-04-07 22:48:45,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [908988971] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:48:45,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057556140] [2022-04-07 22:48:45,528 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:48:45,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:48:45,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:48:45,528 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:48:45,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 22:48:45,635 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2022-04-07 22:48:45,635 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:48:45,637 INFO L263 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-07 22:48:45,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:48:45,650 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:48:45,761 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 22:48:45,855 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:48:45,855 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:48:45,923 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 22:48:45,924 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 22:50:17,694 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 22:50:17,747 INFO L272 TraceCheckUtils]: 0: Hoare triple {20505#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:17,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20505#true} is VALID [2022-04-07 22:50:17,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:17,747 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20505#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:17,747 INFO L272 TraceCheckUtils]: 4: Hoare triple {20505#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:17,747 INFO L290 TraceCheckUtils]: 5: Hoare triple {20505#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {20505#true} is VALID [2022-04-07 22:50:17,748 INFO L290 TraceCheckUtils]: 6: Hoare triple {20505#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:50:17,748 INFO L290 TraceCheckUtils]: 7: Hoare triple {20510#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:50:17,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {20510#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:50:17,749 INFO L290 TraceCheckUtils]: 9: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:50:17,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:50:17,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:50:17,750 INFO L290 TraceCheckUtils]: 12: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:50:17,750 INFO L290 TraceCheckUtils]: 13: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:50:17,751 INFO L290 TraceCheckUtils]: 14: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:50:17,751 INFO L290 TraceCheckUtils]: 15: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:50:17,751 INFO L290 TraceCheckUtils]: 16: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:50:17,752 INFO L290 TraceCheckUtils]: 17: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:50:17,752 INFO L290 TraceCheckUtils]: 18: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:50:17,753 INFO L290 TraceCheckUtils]: 19: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:50:17,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:50:17,754 INFO L290 TraceCheckUtils]: 21: Hoare triple {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20518#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 22:50:17,754 INFO L290 TraceCheckUtils]: 22: Hoare triple {20518#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 22:50:17,755 INFO L290 TraceCheckUtils]: 23: Hoare triple {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 22:50:17,755 INFO L290 TraceCheckUtils]: 24: Hoare triple {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20637#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} is VALID [2022-04-07 22:50:17,756 INFO L290 TraceCheckUtils]: 25: Hoare triple {20637#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:17,756 INFO L290 TraceCheckUtils]: 26: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:17,756 INFO L290 TraceCheckUtils]: 27: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:17,757 INFO L290 TraceCheckUtils]: 28: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:50:17,757 INFO L290 TraceCheckUtils]: 29: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:50:17,758 INFO L272 TraceCheckUtils]: 30: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,758 INFO L290 TraceCheckUtils]: 31: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,758 INFO L290 TraceCheckUtils]: 32: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,759 INFO L290 TraceCheckUtils]: 33: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,759 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:50:17,760 INFO L290 TraceCheckUtils]: 35: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 22:50:17,760 INFO L290 TraceCheckUtils]: 36: Hoare triple {20522#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,760 INFO L290 TraceCheckUtils]: 37: Hoare triple {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,761 INFO L272 TraceCheckUtils]: 38: Hoare triple {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,761 INFO L290 TraceCheckUtils]: 39: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,762 INFO L290 TraceCheckUtils]: 40: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,762 INFO L290 TraceCheckUtils]: 41: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,762 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,763 INFO L290 TraceCheckUtils]: 43: Hoare triple {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,763 INFO L290 TraceCheckUtils]: 44: Hoare triple {20675#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:50:17,763 INFO L290 TraceCheckUtils]: 45: Hoare triple {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:50:17,764 INFO L272 TraceCheckUtils]: 46: Hoare triple {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,764 INFO L290 TraceCheckUtils]: 47: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,765 INFO L290 TraceCheckUtils]: 48: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,765 INFO L290 TraceCheckUtils]: 49: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,765 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:50:17,766 INFO L290 TraceCheckUtils]: 51: Hoare triple {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 22:50:17,766 INFO L290 TraceCheckUtils]: 52: Hoare triple {20700#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 22:50:17,767 INFO L290 TraceCheckUtils]: 53: Hoare triple {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 22:50:17,767 INFO L272 TraceCheckUtils]: 54: Hoare triple {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,767 INFO L290 TraceCheckUtils]: 55: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,768 INFO L290 TraceCheckUtils]: 56: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,768 INFO L290 TraceCheckUtils]: 57: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,768 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 22:50:17,769 INFO L290 TraceCheckUtils]: 59: Hoare triple {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 22:50:17,769 INFO L290 TraceCheckUtils]: 60: Hoare triple {20725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,770 INFO L290 TraceCheckUtils]: 61: Hoare triple {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,770 INFO L272 TraceCheckUtils]: 62: Hoare triple {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,771 INFO L290 TraceCheckUtils]: 63: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,771 INFO L290 TraceCheckUtils]: 64: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,771 INFO L290 TraceCheckUtils]: 65: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,779 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,779 INFO L290 TraceCheckUtils]: 67: Hoare triple {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 22:50:17,779 INFO L290 TraceCheckUtils]: 68: Hoare triple {20750#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-07 22:50:17,780 INFO L290 TraceCheckUtils]: 69: Hoare triple {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-07 22:50:17,781 INFO L272 TraceCheckUtils]: 70: Hoare triple {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,781 INFO L290 TraceCheckUtils]: 71: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,781 INFO L290 TraceCheckUtils]: 72: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,782 INFO L290 TraceCheckUtils]: 73: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,782 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-07 22:50:17,782 INFO L290 TraceCheckUtils]: 75: Hoare triple {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-07 22:50:17,783 INFO L290 TraceCheckUtils]: 76: Hoare triple {20775#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 22:50:17,783 INFO L290 TraceCheckUtils]: 77: Hoare triple {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 22:50:17,784 INFO L272 TraceCheckUtils]: 78: Hoare triple {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,784 INFO L290 TraceCheckUtils]: 79: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,784 INFO L290 TraceCheckUtils]: 80: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,785 INFO L290 TraceCheckUtils]: 81: Hoare triple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} is VALID [2022-04-07 22:50:17,785 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {20656#(exists ((v_main_~x~0.offset_BEFORE_CALL_126 Int) (v_main_~x~0.base_BEFORE_CALL_126 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_126) (+ v_main_~x~0.offset_BEFORE_CALL_126 28)) 0))} {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 22:50:17,786 INFO L290 TraceCheckUtils]: 83: Hoare triple {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 22:50:17,786 INFO L290 TraceCheckUtils]: 84: Hoare triple {20800#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20825#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 7 main_~i~1))} is VALID [2022-04-07 22:50:17,786 INFO L290 TraceCheckUtils]: 85: Hoare triple {20825#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20558#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:50:17,787 INFO L272 TraceCheckUtils]: 86: Hoare triple {20558#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20832#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:50:17,787 INFO L290 TraceCheckUtils]: 87: Hoare triple {20832#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20836#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:50:17,787 INFO L290 TraceCheckUtils]: 88: Hoare triple {20836#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:50:17,787 INFO L290 TraceCheckUtils]: 89: Hoare triple {20506#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:50:17,788 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 1 proven. 211 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 22:50:17,788 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:50:20,190 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 22:50:20,193 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 22:50:20,303 INFO L290 TraceCheckUtils]: 89: Hoare triple {20506#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:50:20,304 INFO L290 TraceCheckUtils]: 88: Hoare triple {20836#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {20506#false} is VALID [2022-04-07 22:50:20,304 INFO L290 TraceCheckUtils]: 87: Hoare triple {20832#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20836#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:50:20,305 INFO L272 TraceCheckUtils]: 86: Hoare triple {20558#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20832#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:50:20,305 INFO L290 TraceCheckUtils]: 85: Hoare triple {20557#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20558#(= |main_#t~mem5| 0)} is VALID [2022-04-07 22:50:20,305 INFO L290 TraceCheckUtils]: 84: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20557#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:50:20,306 INFO L290 TraceCheckUtils]: 83: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:50:20,306 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {20505#true} {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:50:20,306 INFO L290 TraceCheckUtils]: 81: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,306 INFO L290 TraceCheckUtils]: 80: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,306 INFO L290 TraceCheckUtils]: 79: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,307 INFO L272 TraceCheckUtils]: 78: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,307 INFO L290 TraceCheckUtils]: 77: Hoare triple {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:50:20,307 INFO L290 TraceCheckUtils]: 76: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20552#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 22:50:20,308 INFO L290 TraceCheckUtils]: 75: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:50:20,308 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {20505#true} {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:50:20,308 INFO L290 TraceCheckUtils]: 73: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,308 INFO L290 TraceCheckUtils]: 72: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,308 INFO L290 TraceCheckUtils]: 71: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,308 INFO L272 TraceCheckUtils]: 70: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,309 INFO L290 TraceCheckUtils]: 69: Hoare triple {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:50:20,309 INFO L290 TraceCheckUtils]: 68: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20547#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 22:50:20,310 INFO L290 TraceCheckUtils]: 67: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:50:20,310 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {20505#true} {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:50:20,310 INFO L290 TraceCheckUtils]: 65: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,310 INFO L290 TraceCheckUtils]: 64: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,310 INFO L290 TraceCheckUtils]: 63: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,310 INFO L272 TraceCheckUtils]: 62: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,311 INFO L290 TraceCheckUtils]: 61: Hoare triple {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:50:20,311 INFO L290 TraceCheckUtils]: 60: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20542#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 22:50:20,312 INFO L290 TraceCheckUtils]: 59: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:50:20,312 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {20505#true} {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:50:20,312 INFO L290 TraceCheckUtils]: 57: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,312 INFO L290 TraceCheckUtils]: 56: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,312 INFO L290 TraceCheckUtils]: 55: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,312 INFO L272 TraceCheckUtils]: 54: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,313 INFO L290 TraceCheckUtils]: 53: Hoare triple {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:50:20,313 INFO L290 TraceCheckUtils]: 52: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20537#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 22:50:20,314 INFO L290 TraceCheckUtils]: 51: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:50:20,314 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {20505#true} {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:50:20,314 INFO L290 TraceCheckUtils]: 49: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,314 INFO L290 TraceCheckUtils]: 48: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,314 INFO L290 TraceCheckUtils]: 47: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,314 INFO L272 TraceCheckUtils]: 46: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,315 INFO L290 TraceCheckUtils]: 45: Hoare triple {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:50:20,315 INFO L290 TraceCheckUtils]: 44: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20532#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 22:50:20,315 INFO L290 TraceCheckUtils]: 43: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:50:20,316 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {20505#true} {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:50:20,316 INFO L290 TraceCheckUtils]: 41: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,316 INFO L290 TraceCheckUtils]: 40: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,316 INFO L290 TraceCheckUtils]: 39: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,316 INFO L272 TraceCheckUtils]: 38: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,316 INFO L290 TraceCheckUtils]: 37: Hoare triple {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:50:20,317 INFO L290 TraceCheckUtils]: 36: Hoare triple {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20527#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 22:50:20,317 INFO L290 TraceCheckUtils]: 35: Hoare triple {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:50:20,318 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {20505#true} {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:50:20,318 INFO L290 TraceCheckUtils]: 33: Hoare triple {20505#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,318 INFO L290 TraceCheckUtils]: 32: Hoare triple {20505#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,318 INFO L290 TraceCheckUtils]: 31: Hoare triple {20505#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20505#true} is VALID [2022-04-07 22:50:20,318 INFO L272 TraceCheckUtils]: 30: Hoare triple {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20505#true} is VALID [2022-04-07 22:50:20,318 INFO L290 TraceCheckUtils]: 29: Hoare triple {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:50:20,319 INFO L290 TraceCheckUtils]: 28: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {21002#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 22:50:20,319 INFO L290 TraceCheckUtils]: 27: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:20,319 INFO L290 TraceCheckUtils]: 26: Hoare triple {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:20,320 INFO L290 TraceCheckUtils]: 25: Hoare triple {20520#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 22:50:20,320 INFO L290 TraceCheckUtils]: 24: Hoare triple {21039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20520#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 22:50:20,321 INFO L290 TraceCheckUtils]: 23: Hoare triple {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {21039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 22:50:20,321 INFO L290 TraceCheckUtils]: 22: Hoare triple {21039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20519#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 22:50:20,322 INFO L290 TraceCheckUtils]: 21: Hoare triple {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {21039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 22:50:20,322 INFO L290 TraceCheckUtils]: 20: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20517#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 22:50:20,322 INFO L290 TraceCheckUtils]: 19: Hoare triple {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:50:20,323 INFO L290 TraceCheckUtils]: 18: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20516#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 22:50:20,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:50:20,324 INFO L290 TraceCheckUtils]: 16: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20515#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 22:50:20,324 INFO L290 TraceCheckUtils]: 15: Hoare triple {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:50:20,324 INFO L290 TraceCheckUtils]: 14: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20514#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 22:50:20,325 INFO L290 TraceCheckUtils]: 13: Hoare triple {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:50:20,325 INFO L290 TraceCheckUtils]: 12: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20513#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:50:20,325 INFO L290 TraceCheckUtils]: 11: Hoare triple {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:50:20,326 INFO L290 TraceCheckUtils]: 10: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20512#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 22:50:20,326 INFO L290 TraceCheckUtils]: 9: Hoare triple {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:50:20,327 INFO L290 TraceCheckUtils]: 8: Hoare triple {20510#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20511#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 22:50:20,327 INFO L290 TraceCheckUtils]: 7: Hoare triple {20510#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:50:20,327 INFO L290 TraceCheckUtils]: 6: Hoare triple {20505#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {20510#(= main_~i~0 0)} is VALID [2022-04-07 22:50:20,327 INFO L290 TraceCheckUtils]: 5: Hoare triple {20505#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {20505#true} is VALID [2022-04-07 22:50:20,327 INFO L272 TraceCheckUtils]: 4: Hoare triple {20505#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,327 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20505#true} {20505#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,327 INFO L290 TraceCheckUtils]: 2: Hoare triple {20505#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {20505#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20505#true} is VALID [2022-04-07 22:50:20,328 INFO L272 TraceCheckUtils]: 0: Hoare triple {20505#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20505#true} is VALID [2022-04-07 22:50:20,328 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 197 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2022-04-07 22:50:20,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057556140] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:50:20,328 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:50:20,328 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25] total 39 [2022-04-07 22:50:20,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521060516] [2022-04-07 22:50:20,328 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:50:20,329 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 90 [2022-04-07 22:50:20,330 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:50:20,330 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 22:50:20,408 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:50:20,408 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-04-07 22:50:20,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:50:20,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-04-07 22:50:20,409 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1355, Unknown=8, NotChecked=0, Total=1482 [2022-04-07 22:50:20,409 INFO L87 Difference]: Start difference. First operand 154 states and 157 transitions. Second operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16)