/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/Mono3_1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 06:28:50,716 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 06:28:50,751 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 06:28:50,784 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-15 06:28:50,823 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 06:28:50,823 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 06:28:50,824 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 06:28:50,825 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-15 06:28:50,832 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 06:28:50,832 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 06:28:50,833 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 06:28:50,834 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 06:28:50,835 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 06:28:50,835 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 06:28:50,836 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-15 06:28:50,836 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 06:28:51,033 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 06:28:51,055 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 06:28:51,057 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 06:28:51,058 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 06:28:51,058 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 06:28:51,059 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/Mono3_1.c [2022-04-15 06:28:51,102 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1e23bfc5/8f463dba5ec34b639f29e324116c4b1c/FLAGa9f8fd519 [2022-04-15 06:28:51,441 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 06:28:51,441 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c [2022-04-15 06:28:51,447 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1e23bfc5/8f463dba5ec34b639f29e324116c4b1c/FLAGa9f8fd519 [2022-04-15 06:28:51,876 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c1e23bfc5/8f463dba5ec34b639f29e324116c4b1c [2022-04-15 06:28:51,878 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 06:28:51,879 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-15 06:28:51,880 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 06:28:51,880 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 06:28:51,893 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 06:28:51,894 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 06:28:51" (1/1) ... [2022-04-15 06:28:51,895 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7eac19a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:51, skipping insertion in model container [2022-04-15 06:28:51,896 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 06:28:51" (1/1) ... [2022-04-15 06:28:51,900 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 06:28:51,907 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 06:28:52,024 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c[311,324] [2022-04-15 06:28:52,032 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 06:28:52,038 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 06:28:52,045 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c[311,324] [2022-04-15 06:28:52,047 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 06:28:52,056 INFO L208 MainTranslator]: Completed translation [2022-04-15 06:28:52,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52 WrapperNode [2022-04-15 06:28:52,056 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 06:28:52,057 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 06:28:52,057 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 06:28:52,057 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 06:28:52,064 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,064 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,071 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,071 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,078 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,081 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,082 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,083 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 06:28:52,083 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 06:28:52,083 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 06:28:52,084 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 06:28:52,086 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (1/1) ... [2022-04-15 06:28:52,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 06:28:52,098 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:28:52,107 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 06:28:52,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 06:28:52,132 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 06:28:52,133 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 06:28:52,133 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 06:28:52,133 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 06:28:52,133 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 06:28:52,133 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 06:28:52,134 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 06:28:52,176 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 06:28:52,177 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 06:28:52,315 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 06:28:52,320 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 06:28:52,320 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-15 06:28:52,326 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 06:28:52 BoogieIcfgContainer [2022-04-15 06:28:52,326 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 06:28:52,328 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 06:28:52,328 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 06:28:52,331 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 06:28:52,331 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 06:28:51" (1/3) ... [2022-04-15 06:28:52,331 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2937911e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 06:28:52, skipping insertion in model container [2022-04-15 06:28:52,332 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:28:52" (2/3) ... [2022-04-15 06:28:52,332 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2937911e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 06:28:52, skipping insertion in model container [2022-04-15 06:28:52,332 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 06:28:52" (3/3) ... [2022-04-15 06:28:52,333 INFO L111 eAbstractionObserver]: Analyzing ICFG Mono3_1.c [2022-04-15 06:28:52,336 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-15 06:28:52,336 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 06:28:52,399 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 06:28:52,404 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 06:28:52,404 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 06:28:52,424 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 06:28:52,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-15 06:28:52,429 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:28:52,430 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:28:52,431 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:28:52,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:28:52,438 INFO L85 PathProgramCache]: Analyzing trace with hash 1326077006, now seen corresponding path program 1 times [2022-04-15 06:28:52,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:52,445 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1884357058] [2022-04-15 06:28:52,454 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:28:52,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1326077006, now seen corresponding path program 2 times [2022-04-15 06:28:52,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:28:52,457 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399363422] [2022-04-15 06:28:52,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:28:52,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:28:52,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:52,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:28:52,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:52,617 INFO L290 TraceCheckUtils]: 0: Hoare triple {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23#true} is VALID [2022-04-15 06:28:52,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {23#true} assume true; {23#true} is VALID [2022-04-15 06:28:52,618 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23#true} {23#true} #41#return; {23#true} is VALID [2022-04-15 06:28:52,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {23#true} call ULTIMATE.init(); {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:28:52,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23#true} is VALID [2022-04-15 06:28:52,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {23#true} assume true; {23#true} is VALID [2022-04-15 06:28:52,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23#true} {23#true} #41#return; {23#true} is VALID [2022-04-15 06:28:52,621 INFO L272 TraceCheckUtils]: 4: Hoare triple {23#true} call #t~ret7 := main(); {23#true} is VALID [2022-04-15 06:28:52,621 INFO L290 TraceCheckUtils]: 5: Hoare triple {23#true} ~x~0 := 0;~y~0 := 0; {23#true} is VALID [2022-04-15 06:28:52,621 INFO L290 TraceCheckUtils]: 6: Hoare triple {23#true} assume !true; {24#false} is VALID [2022-04-15 06:28:52,622 INFO L272 TraceCheckUtils]: 7: Hoare triple {24#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24#false} is VALID [2022-04-15 06:28:52,622 INFO L290 TraceCheckUtils]: 8: Hoare triple {24#false} ~cond := #in~cond; {24#false} is VALID [2022-04-15 06:28:52,622 INFO L290 TraceCheckUtils]: 9: Hoare triple {24#false} assume 0 == ~cond; {24#false} is VALID [2022-04-15 06:28:52,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {24#false} assume !false; {24#false} is VALID [2022-04-15 06:28:52,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:28:52,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:28:52,624 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399363422] [2022-04-15 06:28:52,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399363422] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:52,625 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:52,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 06:28:52,628 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:28:52,629 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1884357058] [2022-04-15 06:28:52,629 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1884357058] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:52,629 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:52,629 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 06:28:52,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953782956] [2022-04-15 06:28:52,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:28:52,633 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 06:28:52,634 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:28:52,636 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,650 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:52,650 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 06:28:52,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:52,672 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 06:28:52,673 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 06:28:52,675 INFO L87 Difference]: Start difference. First operand has 20 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:52,744 INFO L93 Difference]: Finished difference Result 31 states and 35 transitions. [2022-04-15 06:28:52,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 06:28:52,745 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 06:28:52,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:28:52,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-15 06:28:52,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-15 06:28:52,752 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 35 transitions. [2022-04-15 06:28:52,797 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:52,803 INFO L225 Difference]: With dead ends: 31 [2022-04-15 06:28:52,803 INFO L226 Difference]: Without dead ends: 14 [2022-04-15 06:28:52,806 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 06:28:52,809 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 12 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:28:52,811 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 23 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:28:52,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-15 06:28:52,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-15 06:28:52,834 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:28:52,835 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,836 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,836 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:52,844 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-15 06:28:52,845 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 06:28:52,845 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:52,845 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:52,845 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-15 06:28:52,846 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-15 06:28:52,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:52,849 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-15 06:28:52,849 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 06:28:52,850 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:52,850 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:52,850 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:28:52,850 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:28:52,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-15 06:28:52,852 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2022-04-15 06:28:52,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:28:52,853 INFO L478 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-15 06:28:52,853 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,853 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 15 transitions. [2022-04-15 06:28:52,872 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:52,873 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 06:28:52,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-15 06:28:52,875 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:28:52,876 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:28:52,880 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 06:28:52,880 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:28:52,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:28:52,881 INFO L85 PathProgramCache]: Analyzing trace with hash 1315918275, now seen corresponding path program 1 times [2022-04-15 06:28:52,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:52,881 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [342843425] [2022-04-15 06:28:52,884 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:28:52,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1315918275, now seen corresponding path program 2 times [2022-04-15 06:28:52,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:28:52,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924865509] [2022-04-15 06:28:52,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:28:52,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:28:52,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:52,953 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:28:52,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:52,968 INFO L290 TraceCheckUtils]: 0: Hoare triple {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {149#true} is VALID [2022-04-15 06:28:52,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {149#true} assume true; {149#true} is VALID [2022-04-15 06:28:52,970 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {149#true} {149#true} #41#return; {149#true} is VALID [2022-04-15 06:28:52,970 INFO L272 TraceCheckUtils]: 0: Hoare triple {149#true} call ULTIMATE.init(); {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:28:52,971 INFO L290 TraceCheckUtils]: 1: Hoare triple {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {149#true} is VALID [2022-04-15 06:28:52,971 INFO L290 TraceCheckUtils]: 2: Hoare triple {149#true} assume true; {149#true} is VALID [2022-04-15 06:28:52,971 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {149#true} {149#true} #41#return; {149#true} is VALID [2022-04-15 06:28:52,971 INFO L272 TraceCheckUtils]: 4: Hoare triple {149#true} call #t~ret7 := main(); {149#true} is VALID [2022-04-15 06:28:52,972 INFO L290 TraceCheckUtils]: 5: Hoare triple {149#true} ~x~0 := 0;~y~0 := 0; {154#(= main_~x~0 0)} is VALID [2022-04-15 06:28:52,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {154#(= main_~x~0 0)} assume !(~x~0 % 4294967296 < 1000000); {150#false} is VALID [2022-04-15 06:28:52,972 INFO L272 TraceCheckUtils]: 7: Hoare triple {150#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {150#false} is VALID [2022-04-15 06:28:52,972 INFO L290 TraceCheckUtils]: 8: Hoare triple {150#false} ~cond := #in~cond; {150#false} is VALID [2022-04-15 06:28:52,972 INFO L290 TraceCheckUtils]: 9: Hoare triple {150#false} assume 0 == ~cond; {150#false} is VALID [2022-04-15 06:28:52,973 INFO L290 TraceCheckUtils]: 10: Hoare triple {150#false} assume !false; {150#false} is VALID [2022-04-15 06:28:52,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:28:52,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:28:52,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924865509] [2022-04-15 06:28:52,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924865509] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:52,976 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:52,976 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 06:28:52,976 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:28:52,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [342843425] [2022-04-15 06:28:52,977 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [342843425] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:52,977 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:52,977 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 06:28:52,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199236988] [2022-04-15 06:28:52,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:28:52,978 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 06:28:52,978 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:28:52,978 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:52,988 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:52,988 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 06:28:52,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:52,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 06:28:52,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-15 06:28:52,990 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:53,138 INFO L93 Difference]: Finished difference Result 25 states and 29 transitions. [2022-04-15 06:28:53,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 06:28:53,138 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 06:28:53,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:28:53,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 29 transitions. [2022-04-15 06:28:53,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 29 transitions. [2022-04-15 06:28:53,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 29 transitions. [2022-04-15 06:28:53,185 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:53,186 INFO L225 Difference]: With dead ends: 25 [2022-04-15 06:28:53,186 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 06:28:53,187 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-15 06:28:53,187 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:28:53,188 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 19 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:28:53,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 06:28:53,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2022-04-15 06:28:53,204 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:28:53,204 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,204 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,204 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:53,205 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2022-04-15 06:28:53,205 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 18 transitions. [2022-04-15 06:28:53,205 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:53,206 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:53,206 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 06:28:53,206 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 06:28:53,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:53,207 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2022-04-15 06:28:53,207 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 18 transitions. [2022-04-15 06:28:53,207 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:53,207 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:53,207 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:28:53,207 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:28:53,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2022-04-15 06:28:53,208 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2022-04-15 06:28:53,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:28:53,208 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-04-15 06:28:53,209 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:53,209 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 17 transitions. [2022-04-15 06:28:53,222 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:53,222 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2022-04-15 06:28:53,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 06:28:53,223 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:28:53,223 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:28:53,223 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 06:28:53,223 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:28:53,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:28:53,224 INFO L85 PathProgramCache]: Analyzing trace with hash 644646283, now seen corresponding path program 1 times [2022-04-15 06:28:53,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:53,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1802986247] [2022-04-15 06:28:54,673 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:28:54,675 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:28:54,678 INFO L85 PathProgramCache]: Analyzing trace with hash -1209153456, now seen corresponding path program 1 times [2022-04-15 06:28:54,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:28:54,678 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409912716] [2022-04-15 06:28:54,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:28:54,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:28:54,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:54,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:28:54,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:54,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {276#true} is VALID [2022-04-15 06:28:54,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {276#true} assume true; {276#true} is VALID [2022-04-15 06:28:54,784 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {276#true} {276#true} #41#return; {276#true} is VALID [2022-04-15 06:28:54,784 INFO L272 TraceCheckUtils]: 0: Hoare triple {276#true} call ULTIMATE.init(); {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:28:54,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {276#true} is VALID [2022-04-15 06:28:54,785 INFO L290 TraceCheckUtils]: 2: Hoare triple {276#true} assume true; {276#true} is VALID [2022-04-15 06:28:54,785 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {276#true} {276#true} #41#return; {276#true} is VALID [2022-04-15 06:28:54,785 INFO L272 TraceCheckUtils]: 4: Hoare triple {276#true} call #t~ret7 := main(); {276#true} is VALID [2022-04-15 06:28:54,785 INFO L290 TraceCheckUtils]: 5: Hoare triple {276#true} ~x~0 := 0;~y~0 := 0; {281#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:54,787 INFO L290 TraceCheckUtils]: 6: Hoare triple {281#(and (= main_~x~0 0) (= main_~y~0 0))} [47] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_4| |v_main_#t~post6_3|)) (.cse1 (= v_main_~x~0_9 v_main_~x~0_8)) (.cse2 (= v_main_~y~0_9 v_main_~y~0_8)) (.cse4 (mod v_main_~x~0_9 4294967296)) (.cse3 (= |v_main_#t~post4_4| |v_main_#t~post4_3|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ (* (- 1) v_main_~y~0_8) v_main_~y~0_9 (* (- 1) v_main_~x~0_9) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_9 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_9 v_main_~y~0_8) (= (+ v_main_~x~0_8 v_main_~y~0_9) (+ v_main_~x~0_9 v_main_~y~0_8)) (< .cse4 500000)) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_4|, main_~y~0=v_main_~y~0_9, main_~x~0=v_main_~x~0_9, main_#t~post6=|v_main_#t~post6_4|} OutVars{main_#t~post4=|v_main_#t~post4_3|, main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_8, main_#t~post6=|v_main_#t~post6_3|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {282#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:28:54,787 INFO L290 TraceCheckUtils]: 7: Hoare triple {282#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [46] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {277#false} is VALID [2022-04-15 06:28:54,787 INFO L272 TraceCheckUtils]: 8: Hoare triple {277#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {277#false} is VALID [2022-04-15 06:28:54,787 INFO L290 TraceCheckUtils]: 9: Hoare triple {277#false} ~cond := #in~cond; {277#false} is VALID [2022-04-15 06:28:54,788 INFO L290 TraceCheckUtils]: 10: Hoare triple {277#false} assume 0 == ~cond; {277#false} is VALID [2022-04-15 06:28:54,788 INFO L290 TraceCheckUtils]: 11: Hoare triple {277#false} assume !false; {277#false} is VALID [2022-04-15 06:28:54,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:28:54,788 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:28:54,788 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409912716] [2022-04-15 06:28:54,788 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409912716] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:54,788 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:54,788 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 06:28:54,918 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:28:54,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1802986247] [2022-04-15 06:28:54,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1802986247] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:28:54,918 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:28:54,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 06:28:54,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798519839] [2022-04-15 06:28:54,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:28:54,920 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 06:28:54,920 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:28:54,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:54,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:54,934 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 06:28:54,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:54,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 06:28:54,935 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2022-04-15 06:28:54,935 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:55,128 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-15 06:28:55,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 06:28:55,128 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 06:28:55,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:28:55,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-15 06:28:55,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-15 06:28:55,131 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 26 transitions. [2022-04-15 06:28:55,156 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:55,156 INFO L225 Difference]: With dead ends: 24 [2022-04-15 06:28:55,156 INFO L226 Difference]: Without dead ends: 19 [2022-04-15 06:28:55,157 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2022-04-15 06:28:55,158 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 11 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:28:55,158 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 28 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 06:28:55,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-04-15 06:28:55,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-04-15 06:28:55,170 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:28:55,170 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,170 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,170 INFO L87 Difference]: Start difference. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:55,171 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-15 06:28:55,171 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-15 06:28:55,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:55,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:55,172 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-15 06:28:55,172 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-15 06:28:55,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:28:55,173 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-15 06:28:55,173 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-15 06:28:55,173 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:28:55,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:28:55,174 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:28:55,174 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:28:55,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2022-04-15 06:28:55,175 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 21 transitions. Word has length 14 [2022-04-15 06:28:55,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:28:55,175 INFO L478 AbstractCegarLoop]: Abstraction has 19 states and 21 transitions. [2022-04-15 06:28:55,175 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:28:55,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 21 transitions. [2022-04-15 06:28:55,198 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:28:55,198 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-15 06:28:55,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 06:28:55,199 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:28:55,199 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:28:55,199 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-15 06:28:55,199 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:28:55,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:28:55,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1923470149, now seen corresponding path program 1 times [2022-04-15 06:28:55,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:28:55,200 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1232442512] [2022-04-15 06:28:58,086 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:28:58,358 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:28:59,144 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:28:59,146 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:28:59,148 INFO L85 PathProgramCache]: Analyzing trace with hash 603671471, now seen corresponding path program 1 times [2022-04-15 06:28:59,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:28:59,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775191821] [2022-04-15 06:28:59,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:28:59,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:28:59,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:59,259 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:28:59,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:59,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-15 06:28:59,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-15 06:28:59,270 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-15 06:28:59,270 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:28:59,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-15 06:28:59,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-15 06:28:59,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-15 06:28:59,273 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-15 06:28:59,273 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,275 INFO L290 TraceCheckUtils]: 6: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,277 INFO L290 TraceCheckUtils]: 8: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {425#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:28:59,277 INFO L290 TraceCheckUtils]: 9: Hoare triple {425#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-15 06:28:59,278 INFO L272 TraceCheckUtils]: 10: Hoare triple {420#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {420#false} is VALID [2022-04-15 06:28:59,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {420#false} ~cond := #in~cond; {420#false} is VALID [2022-04-15 06:28:59,278 INFO L290 TraceCheckUtils]: 12: Hoare triple {420#false} assume 0 == ~cond; {420#false} is VALID [2022-04-15 06:28:59,278 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-15 06:28:59,278 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:28:59,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:28:59,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1775191821] [2022-04-15 06:28:59,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1775191821] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:28:59,279 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693090058] [2022-04-15 06:28:59,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:28:59,279 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:28:59,279 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:28:59,280 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:28:59,304 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 06:28:59,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:59,323 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:28:59,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:28:59,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:28:59,557 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {419#true} is VALID [2022-04-15 06:28:59,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-15 06:28:59,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-15 06:28:59,557 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-15 06:28:59,558 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-15 06:28:59,558 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,559 INFO L290 TraceCheckUtils]: 6: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,559 INFO L290 TraceCheckUtils]: 7: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:28:59,560 INFO L290 TraceCheckUtils]: 8: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {454#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:28:59,561 INFO L290 TraceCheckUtils]: 9: Hoare triple {454#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-15 06:28:59,562 INFO L272 TraceCheckUtils]: 10: Hoare triple {420#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {420#false} is VALID [2022-04-15 06:28:59,562 INFO L290 TraceCheckUtils]: 11: Hoare triple {420#false} ~cond := #in~cond; {420#false} is VALID [2022-04-15 06:28:59,562 INFO L290 TraceCheckUtils]: 12: Hoare triple {420#false} assume 0 == ~cond; {420#false} is VALID [2022-04-15 06:28:59,562 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-15 06:28:59,562 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:28:59,562 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:01,287 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-15 06:29:01,288 INFO L290 TraceCheckUtils]: 12: Hoare triple {473#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {420#false} is VALID [2022-04-15 06:29:01,288 INFO L290 TraceCheckUtils]: 11: Hoare triple {477#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {473#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:01,290 INFO L272 TraceCheckUtils]: 10: Hoare triple {481#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {477#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:01,290 INFO L290 TraceCheckUtils]: 9: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {481#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:01,293 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:01,293 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:01,313 INFO L290 TraceCheckUtils]: 6: Hoare triple {495#(and (or (forall ((aux_div_v_main_~y~0_28_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_28_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_28_31 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:01,315 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {495#(and (or (forall ((aux_div_v_main_~y~0_28_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_28_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_28_31 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:01,315 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-15 06:29:01,315 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-15 06:29:01,315 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-15 06:29:01,315 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-15 06:29:01,316 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {419#true} is VALID [2022-04-15 06:29:01,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:01,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [693090058] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:01,316 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:01,316 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:29:01,481 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:01,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1232442512] [2022-04-15 06:29:01,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1232442512] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:01,481 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:01,481 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 06:29:01,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996737141] [2022-04-15 06:29:01,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:01,482 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 06:29:01,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:01,482 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,497 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:01,498 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 06:29:01,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:01,498 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 06:29:01,498 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-15 06:29:01,498 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:01,606 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-04-15 06:29:01,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 06:29:01,607 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 06:29:01,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:01,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 30 transitions. [2022-04-15 06:29:01,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 30 transitions. [2022-04-15 06:29:01,609 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 30 transitions. [2022-04-15 06:29:01,630 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:01,631 INFO L225 Difference]: With dead ends: 30 [2022-04-15 06:29:01,631 INFO L226 Difference]: Without dead ends: 22 [2022-04-15 06:29:01,631 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2022-04-15 06:29:01,632 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 11 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:01,632 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 29 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:29:01,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-15 06:29:01,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-15 06:29:01,659 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:01,659 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,661 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,661 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:01,663 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-15 06:29:01,663 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-15 06:29:01,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:01,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:01,664 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-15 06:29:01,665 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-15 06:29:01,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:01,669 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-15 06:29:01,669 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-15 06:29:01,670 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:01,670 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:01,670 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:01,670 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:01,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-15 06:29:01,673 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 17 [2022-04-15 06:29:01,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:01,674 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-15 06:29:01,674 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:01,674 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 24 transitions. [2022-04-15 06:29:01,695 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:01,695 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-15 06:29:01,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-15 06:29:01,696 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:01,696 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:01,713 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:01,900 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:01,901 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:01,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:01,901 INFO L85 PathProgramCache]: Analyzing trace with hash -896593651, now seen corresponding path program 2 times [2022-04-15 06:29:01,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:01,901 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [762237640] [2022-04-15 06:29:03,049 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:03,511 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:03,512 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:03,515 INFO L85 PathProgramCache]: Analyzing trace with hash -1641763665, now seen corresponding path program 1 times [2022-04-15 06:29:03,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:03,515 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126991360] [2022-04-15 06:29:03,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:03,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:03,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:03,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:03,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:03,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-15 06:29:03,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-15 06:29:03,594 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-15 06:29:03,594 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:03,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-15 06:29:03,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-15 06:29:03,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-15 06:29:03,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-15 06:29:03,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {677#(= main_~x~0 0)} is VALID [2022-04-15 06:29:03,596 INFO L290 TraceCheckUtils]: 6: Hoare triple {677#(= main_~x~0 0)} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {677#(= main_~x~0 0)} is VALID [2022-04-15 06:29:03,596 INFO L290 TraceCheckUtils]: 7: Hoare triple {677#(= main_~x~0 0)} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {677#(= main_~x~0 0)} is VALID [2022-04-15 06:29:03,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {677#(= main_~x~0 0)} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {678#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:03,598 INFO L290 TraceCheckUtils]: 9: Hoare triple {678#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {673#false} is VALID [2022-04-15 06:29:03,598 INFO L272 TraceCheckUtils]: 10: Hoare triple {673#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {673#false} is VALID [2022-04-15 06:29:03,598 INFO L290 TraceCheckUtils]: 11: Hoare triple {673#false} ~cond := #in~cond; {673#false} is VALID [2022-04-15 06:29:03,598 INFO L290 TraceCheckUtils]: 12: Hoare triple {673#false} assume 0 == ~cond; {673#false} is VALID [2022-04-15 06:29:03,598 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-15 06:29:03,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:03,599 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:03,599 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126991360] [2022-04-15 06:29:03,599 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126991360] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:03,599 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [847755092] [2022-04-15 06:29:03,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:03,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:03,599 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:03,600 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:03,601 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 06:29:03,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:03,631 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:03,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:03,640 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:03,844 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {672#true} is VALID [2022-04-15 06:29:03,845 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-15 06:29:03,845 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-15 06:29:03,845 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-15 06:29:03,845 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-15 06:29:03,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:03,846 INFO L290 TraceCheckUtils]: 6: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:03,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:03,848 INFO L290 TraceCheckUtils]: 8: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {708#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:29:03,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {708#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {673#false} is VALID [2022-04-15 06:29:03,850 INFO L272 TraceCheckUtils]: 10: Hoare triple {673#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {673#false} is VALID [2022-04-15 06:29:03,850 INFO L290 TraceCheckUtils]: 11: Hoare triple {673#false} ~cond := #in~cond; {673#false} is VALID [2022-04-15 06:29:03,850 INFO L290 TraceCheckUtils]: 12: Hoare triple {673#false} assume 0 == ~cond; {673#false} is VALID [2022-04-15 06:29:03,850 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-15 06:29:03,850 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:03,850 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:04,764 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-15 06:29:04,765 INFO L290 TraceCheckUtils]: 12: Hoare triple {727#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {673#false} is VALID [2022-04-15 06:29:04,765 INFO L290 TraceCheckUtils]: 11: Hoare triple {731#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {727#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:04,767 INFO L272 TraceCheckUtils]: 10: Hoare triple {735#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {731#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:04,767 INFO L290 TraceCheckUtils]: 9: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {735#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:04,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:04,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:04,804 INFO L290 TraceCheckUtils]: 6: Hoare triple {749#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_47_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_47_31 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:04,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {749#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_47_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_47_31 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:04,805 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-15 06:29:04,806 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-15 06:29:04,806 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-15 06:29:04,806 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-15 06:29:04,806 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {672#true} is VALID [2022-04-15 06:29:04,806 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:04,806 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [847755092] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:04,807 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:04,807 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:05,001 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:05,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [762237640] [2022-04-15 06:29:05,002 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [762237640] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:05,002 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:05,002 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 06:29:05,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455374822] [2022-04-15 06:29:05,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:05,003 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 06:29:05,003 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:05,003 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,021 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:05,021 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 06:29:05,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:05,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 06:29:05,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2022-04-15 06:29:05,022 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:05,184 INFO L93 Difference]: Finished difference Result 34 states and 38 transitions. [2022-04-15 06:29:05,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 06:29:05,184 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 06:29:05,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:05,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 34 transitions. [2022-04-15 06:29:05,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 34 transitions. [2022-04-15 06:29:05,187 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 34 transitions. [2022-04-15 06:29:05,218 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:05,219 INFO L225 Difference]: With dead ends: 34 [2022-04-15 06:29:05,219 INFO L226 Difference]: Without dead ends: 26 [2022-04-15 06:29:05,220 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 8 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=207, Unknown=0, NotChecked=0, Total=272 [2022-04-15 06:29:05,221 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:05,221 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 29 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:29:05,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-15 06:29:05,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2022-04-15 06:29:05,239 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:05,239 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,240 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,240 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:05,241 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-15 06:29:05,241 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-15 06:29:05,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:05,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:05,241 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 06:29:05,241 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 06:29:05,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:05,242 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-15 06:29:05,242 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-15 06:29:05,242 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:05,242 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:05,242 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:05,243 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:05,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-04-15 06:29:05,243 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 20 [2022-04-15 06:29:05,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:05,244 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-04-15 06:29:05,244 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:05,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 27 transitions. [2022-04-15 06:29:05,281 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:05,282 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-15 06:29:05,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-15 06:29:05,283 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:05,284 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:05,307 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-15 06:29:05,499 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:05,500 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:05,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:05,500 INFO L85 PathProgramCache]: Analyzing trace with hash 438017605, now seen corresponding path program 3 times [2022-04-15 06:29:05,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:05,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [940263921] [2022-04-15 06:29:06,371 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:07,122 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:07,123 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:07,126 INFO L85 PathProgramCache]: Analyzing trace with hash 407768495, now seen corresponding path program 1 times [2022-04-15 06:29:07,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:07,126 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253021454] [2022-04-15 06:29:07,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:07,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:07,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:07,185 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:07,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:07,191 INFO L290 TraceCheckUtils]: 0: Hoare triple {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-15 06:29:07,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-15 06:29:07,191 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-15 06:29:07,192 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:07,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-15 06:29:07,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-15 06:29:07,192 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-15 06:29:07,192 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-15 06:29:07,193 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {953#(= main_~x~0 0)} is VALID [2022-04-15 06:29:07,193 INFO L290 TraceCheckUtils]: 6: Hoare triple {953#(= main_~x~0 0)} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {953#(= main_~x~0 0)} is VALID [2022-04-15 06:29:07,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {953#(= main_~x~0 0)} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {953#(= main_~x~0 0)} is VALID [2022-04-15 06:29:07,195 INFO L290 TraceCheckUtils]: 8: Hoare triple {953#(= main_~x~0 0)} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {954#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:29:07,195 INFO L290 TraceCheckUtils]: 9: Hoare triple {954#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {949#false} is VALID [2022-04-15 06:29:07,195 INFO L272 TraceCheckUtils]: 10: Hoare triple {949#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {949#false} is VALID [2022-04-15 06:29:07,195 INFO L290 TraceCheckUtils]: 11: Hoare triple {949#false} ~cond := #in~cond; {949#false} is VALID [2022-04-15 06:29:07,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {949#false} assume 0 == ~cond; {949#false} is VALID [2022-04-15 06:29:07,195 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-15 06:29:07,196 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:07,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:07,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253021454] [2022-04-15 06:29:07,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253021454] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:07,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [92869094] [2022-04-15 06:29:07,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:07,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:07,196 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:07,197 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:07,198 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 06:29:07,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:07,228 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:07,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:07,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:07,459 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {948#true} is VALID [2022-04-15 06:29:07,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-15 06:29:07,460 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-15 06:29:07,460 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-15 06:29:07,460 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-15 06:29:07,462 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:07,462 INFO L290 TraceCheckUtils]: 6: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:07,463 INFO L290 TraceCheckUtils]: 7: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:07,464 INFO L290 TraceCheckUtils]: 8: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {984#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:29:07,465 INFO L290 TraceCheckUtils]: 9: Hoare triple {984#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {949#false} is VALID [2022-04-15 06:29:07,465 INFO L272 TraceCheckUtils]: 10: Hoare triple {949#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {949#false} is VALID [2022-04-15 06:29:07,465 INFO L290 TraceCheckUtils]: 11: Hoare triple {949#false} ~cond := #in~cond; {949#false} is VALID [2022-04-15 06:29:07,465 INFO L290 TraceCheckUtils]: 12: Hoare triple {949#false} assume 0 == ~cond; {949#false} is VALID [2022-04-15 06:29:07,465 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-15 06:29:07,465 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:07,465 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:09,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-15 06:29:09,554 INFO L290 TraceCheckUtils]: 12: Hoare triple {1003#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {949#false} is VALID [2022-04-15 06:29:09,554 INFO L290 TraceCheckUtils]: 11: Hoare triple {1007#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1003#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:09,555 INFO L272 TraceCheckUtils]: 10: Hoare triple {1011#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1007#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:09,555 INFO L290 TraceCheckUtils]: 9: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1011#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:09,558 INFO L290 TraceCheckUtils]: 8: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:09,558 INFO L290 TraceCheckUtils]: 7: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:09,788 INFO L290 TraceCheckUtils]: 6: Hoare triple {1025#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_67_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_67_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_67_31 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:09,797 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {1025#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_67_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_67_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_67_31 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:09,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-15 06:29:09,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-15 06:29:09,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-15 06:29:09,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-15 06:29:09,798 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {948#true} is VALID [2022-04-15 06:29:09,798 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:09,798 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [92869094] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:09,798 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:09,798 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:09,985 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:09,986 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [940263921] [2022-04-15 06:29:09,986 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [940263921] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:09,986 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:09,986 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-15 06:29:09,986 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777229422] [2022-04-15 06:29:09,986 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:09,986 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 06:29:09,986 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:09,986 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,000 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:10,000 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-15 06:29:10,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:10,000 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-15 06:29:10,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2022-04-15 06:29:10,001 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:10,149 INFO L93 Difference]: Finished difference Result 37 states and 41 transitions. [2022-04-15 06:29:10,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-15 06:29:10,150 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 06:29:10,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:10,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-15 06:29:10,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-15 06:29:10,152 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 37 transitions. [2022-04-15 06:29:10,179 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:10,179 INFO L225 Difference]: With dead ends: 37 [2022-04-15 06:29:10,179 INFO L226 Difference]: Without dead ends: 29 [2022-04-15 06:29:10,180 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 9 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2022-04-15 06:29:10,180 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 18 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:10,180 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 34 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:29:10,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-15 06:29:10,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2022-04-15 06:29:10,202 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:10,202 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,203 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,203 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:10,204 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-15 06:29:10,204 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2022-04-15 06:29:10,204 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:10,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:10,213 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-15 06:29:10,213 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-15 06:29:10,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:10,214 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-15 06:29:10,214 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2022-04-15 06:29:10,214 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:10,215 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:10,215 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:10,215 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:10,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 30 transitions. [2022-04-15 06:29:10,216 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 30 transitions. Word has length 23 [2022-04-15 06:29:10,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:10,216 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 30 transitions. [2022-04-15 06:29:10,216 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:10,216 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 30 transitions. [2022-04-15 06:29:10,244 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:10,245 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 30 transitions. [2022-04-15 06:29:10,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 06:29:10,245 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:10,245 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:10,262 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:10,461 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:10,462 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:10,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:10,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1329686029, now seen corresponding path program 4 times [2022-04-15 06:29:10,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:10,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1146945618] [2022-04-15 06:29:11,589 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:12,175 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:12,176 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:12,179 INFO L85 PathProgramCache]: Analyzing trace with hash -1837666641, now seen corresponding path program 1 times [2022-04-15 06:29:12,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:12,179 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918124429] [2022-04-15 06:29:12,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:12,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:12,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:12,227 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:12,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:12,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-15 06:29:12,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-15 06:29:12,230 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-15 06:29:12,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:12,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-15 06:29:12,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-15 06:29:12,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-15 06:29:12,231 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-15 06:29:12,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1250#(= main_~x~0 0)} is VALID [2022-04-15 06:29:12,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {1250#(= main_~x~0 0)} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1250#(= main_~x~0 0)} is VALID [2022-04-15 06:29:12,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {1250#(= main_~x~0 0)} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1250#(= main_~x~0 0)} is VALID [2022-04-15 06:29:12,234 INFO L290 TraceCheckUtils]: 8: Hoare triple {1250#(= main_~x~0 0)} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:12,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {1251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1246#false} is VALID [2022-04-15 06:29:12,234 INFO L272 TraceCheckUtils]: 10: Hoare triple {1246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1246#false} is VALID [2022-04-15 06:29:12,234 INFO L290 TraceCheckUtils]: 11: Hoare triple {1246#false} ~cond := #in~cond; {1246#false} is VALID [2022-04-15 06:29:12,234 INFO L290 TraceCheckUtils]: 12: Hoare triple {1246#false} assume 0 == ~cond; {1246#false} is VALID [2022-04-15 06:29:12,234 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-15 06:29:12,235 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:12,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:12,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918124429] [2022-04-15 06:29:12,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1918124429] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:12,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [205956558] [2022-04-15 06:29:12,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:12,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:12,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:12,236 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:12,237 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 06:29:12,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:12,265 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:12,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:12,274 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:12,455 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1245#true} is VALID [2022-04-15 06:29:12,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-15 06:29:12,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-15 06:29:12,456 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-15 06:29:12,456 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-15 06:29:12,459 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:12,460 INFO L290 TraceCheckUtils]: 6: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:12,460 INFO L290 TraceCheckUtils]: 7: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:12,461 INFO L290 TraceCheckUtils]: 8: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:29:12,462 INFO L290 TraceCheckUtils]: 9: Hoare triple {1281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1246#false} is VALID [2022-04-15 06:29:12,462 INFO L272 TraceCheckUtils]: 10: Hoare triple {1246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1246#false} is VALID [2022-04-15 06:29:12,463 INFO L290 TraceCheckUtils]: 11: Hoare triple {1246#false} ~cond := #in~cond; {1246#false} is VALID [2022-04-15 06:29:12,463 INFO L290 TraceCheckUtils]: 12: Hoare triple {1246#false} assume 0 == ~cond; {1246#false} is VALID [2022-04-15 06:29:12,463 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-15 06:29:12,463 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:12,463 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:13,454 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-15 06:29:13,455 INFO L290 TraceCheckUtils]: 12: Hoare triple {1300#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1246#false} is VALID [2022-04-15 06:29:13,455 INFO L290 TraceCheckUtils]: 11: Hoare triple {1304#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1300#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:13,457 INFO L272 TraceCheckUtils]: 10: Hoare triple {1308#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1304#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:13,457 INFO L290 TraceCheckUtils]: 9: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1308#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:13,460 INFO L290 TraceCheckUtils]: 8: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:13,460 INFO L290 TraceCheckUtils]: 7: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:13,473 INFO L290 TraceCheckUtils]: 6: Hoare triple {1322#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_88_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_88_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_88_31 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:13,473 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1322#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_88_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_88_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_88_31 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:13,474 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-15 06:29:13,474 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-15 06:29:13,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-15 06:29:13,474 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-15 06:29:13,474 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1245#true} is VALID [2022-04-15 06:29:13,474 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:13,474 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [205956558] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:13,474 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:13,474 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:13,677 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:13,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1146945618] [2022-04-15 06:29:13,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1146945618] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:13,677 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:13,677 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-15 06:29:13,677 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399018958] [2022-04-15 06:29:13,677 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:13,678 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 06:29:13,678 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:13,678 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:13,694 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-15 06:29:13,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:13,695 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-15 06:29:13,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-15 06:29:13,695 INFO L87 Difference]: Start difference. First operand 28 states and 30 transitions. Second operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:13,932 INFO L93 Difference]: Finished difference Result 40 states and 44 transitions. [2022-04-15 06:29:13,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 06:29:13,932 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 06:29:13,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:13,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 40 transitions. [2022-04-15 06:29:13,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 40 transitions. [2022-04-15 06:29:13,934 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 40 transitions. [2022-04-15 06:29:13,968 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:13,969 INFO L225 Difference]: With dead ends: 40 [2022-04-15 06:29:13,969 INFO L226 Difference]: Without dead ends: 32 [2022-04-15 06:29:13,969 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 29 SyntacticMatches, 11 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2022-04-15 06:29:13,969 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:13,970 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 39 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 06:29:13,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-15 06:29:13,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2022-04-15 06:29:13,995 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:13,995 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,995 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,995 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:13,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:13,996 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-15 06:29:13,996 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-15 06:29:13,997 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:13,997 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:13,997 INFO L74 IsIncluded]: Start isIncluded. First operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-15 06:29:13,997 INFO L87 Difference]: Start difference. First operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-15 06:29:13,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:13,998 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-15 06:29:13,998 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-15 06:29:13,999 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:13,999 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:13,999 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:13,999 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:13,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:14,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2022-04-15 06:29:14,000 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 26 [2022-04-15 06:29:14,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:14,000 INFO L478 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2022-04-15 06:29:14,001 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:14,001 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 33 transitions. [2022-04-15 06:29:14,033 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:14,033 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2022-04-15 06:29:14,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-15 06:29:14,034 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:14,034 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:14,052 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:14,250 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:14,250 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:14,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:14,250 INFO L85 PathProgramCache]: Analyzing trace with hash 650979653, now seen corresponding path program 5 times [2022-04-15 06:29:14,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:14,250 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1836922461] [2022-04-15 06:29:14,955 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:15,538 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:15,539 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:15,542 INFO L85 PathProgramCache]: Analyzing trace with hash 211865519, now seen corresponding path program 1 times [2022-04-15 06:29:15,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:15,542 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101218526] [2022-04-15 06:29:15,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:15,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:15,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:15,608 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:15,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:15,611 INFO L290 TraceCheckUtils]: 0: Hoare triple {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-15 06:29:15,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-15 06:29:15,612 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-15 06:29:15,612 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:15,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-15 06:29:15,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-15 06:29:15,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-15 06:29:15,613 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-15 06:29:15,613 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1568#(= main_~x~0 0)} is VALID [2022-04-15 06:29:15,613 INFO L290 TraceCheckUtils]: 6: Hoare triple {1568#(= main_~x~0 0)} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1568#(= main_~x~0 0)} is VALID [2022-04-15 06:29:15,614 INFO L290 TraceCheckUtils]: 7: Hoare triple {1568#(= main_~x~0 0)} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1568#(= main_~x~0 0)} is VALID [2022-04-15 06:29:15,615 INFO L290 TraceCheckUtils]: 8: Hoare triple {1568#(= main_~x~0 0)} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1569#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:15,615 INFO L290 TraceCheckUtils]: 9: Hoare triple {1569#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1564#false} is VALID [2022-04-15 06:29:15,615 INFO L272 TraceCheckUtils]: 10: Hoare triple {1564#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1564#false} is VALID [2022-04-15 06:29:15,615 INFO L290 TraceCheckUtils]: 11: Hoare triple {1564#false} ~cond := #in~cond; {1564#false} is VALID [2022-04-15 06:29:15,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {1564#false} assume 0 == ~cond; {1564#false} is VALID [2022-04-15 06:29:15,616 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-15 06:29:15,616 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:15,616 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:15,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101218526] [2022-04-15 06:29:15,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2101218526] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:15,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2104010176] [2022-04-15 06:29:15,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:15,616 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:15,616 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:15,617 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:15,618 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 06:29:15,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:15,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:15,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:15,653 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:15,826 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1563#true} is VALID [2022-04-15 06:29:15,826 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-15 06:29:15,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-15 06:29:15,826 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-15 06:29:15,826 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-15 06:29:15,828 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:15,828 INFO L290 TraceCheckUtils]: 6: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:15,829 INFO L290 TraceCheckUtils]: 7: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:15,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1599#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:29:15,831 INFO L290 TraceCheckUtils]: 9: Hoare triple {1599#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1564#false} is VALID [2022-04-15 06:29:15,831 INFO L272 TraceCheckUtils]: 10: Hoare triple {1564#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1564#false} is VALID [2022-04-15 06:29:15,831 INFO L290 TraceCheckUtils]: 11: Hoare triple {1564#false} ~cond := #in~cond; {1564#false} is VALID [2022-04-15 06:29:15,831 INFO L290 TraceCheckUtils]: 12: Hoare triple {1564#false} assume 0 == ~cond; {1564#false} is VALID [2022-04-15 06:29:15,831 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-15 06:29:15,831 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:15,831 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:16,768 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-15 06:29:16,771 INFO L290 TraceCheckUtils]: 12: Hoare triple {1618#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1564#false} is VALID [2022-04-15 06:29:16,771 INFO L290 TraceCheckUtils]: 11: Hoare triple {1622#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1618#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:16,772 INFO L272 TraceCheckUtils]: 10: Hoare triple {1626#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1622#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:16,772 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1626#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:16,774 INFO L290 TraceCheckUtils]: 8: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:16,775 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:16,884 INFO L290 TraceCheckUtils]: 6: Hoare triple {1640#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_110_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_110_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_110_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:16,885 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1640#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_110_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_110_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_110_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:16,885 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-15 06:29:16,885 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-15 06:29:16,886 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-15 06:29:16,886 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-15 06:29:16,886 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1563#true} is VALID [2022-04-15 06:29:16,886 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:16,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2104010176] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:16,886 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:16,886 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:17,129 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:17,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1836922461] [2022-04-15 06:29:17,130 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1836922461] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:17,130 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:17,130 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-15 06:29:17,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512683926] [2022-04-15 06:29:17,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:17,130 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 06:29:17,130 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:17,130 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,148 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:17,148 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-15 06:29:17,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:17,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-15 06:29:17,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-04-15 06:29:17,149 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:17,418 INFO L93 Difference]: Finished difference Result 43 states and 47 transitions. [2022-04-15 06:29:17,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 06:29:17,418 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 06:29:17,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:17,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 43 transitions. [2022-04-15 06:29:17,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 43 transitions. [2022-04-15 06:29:17,420 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 43 transitions. [2022-04-15 06:29:17,454 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:17,454 INFO L225 Difference]: With dead ends: 43 [2022-04-15 06:29:17,455 INFO L226 Difference]: Without dead ends: 35 [2022-04-15 06:29:17,455 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 29 SyntacticMatches, 13 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2022-04-15 06:29:17,455 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 22 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 151 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 151 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:17,455 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 44 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 151 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 06:29:17,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-04-15 06:29:17,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2022-04-15 06:29:17,486 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:17,487 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,487 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,487 INFO L87 Difference]: Start difference. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:17,488 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2022-04-15 06:29:17,488 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 37 transitions. [2022-04-15 06:29:17,488 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:17,488 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:17,488 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-15 06:29:17,488 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-15 06:29:17,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:17,489 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2022-04-15 06:29:17,489 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 37 transitions. [2022-04-15 06:29:17,489 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:17,489 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:17,489 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:17,489 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:17,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 36 transitions. [2022-04-15 06:29:17,490 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 36 transitions. Word has length 29 [2022-04-15 06:29:17,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:17,490 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 36 transitions. [2022-04-15 06:29:17,490 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:17,490 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 36 transitions. [2022-04-15 06:29:17,546 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:17,546 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 36 transitions. [2022-04-15 06:29:17,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-15 06:29:17,546 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:17,546 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:17,565 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-15 06:29:17,755 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:17,755 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:17,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:17,756 INFO L85 PathProgramCache]: Analyzing trace with hash 2015361805, now seen corresponding path program 6 times [2022-04-15 06:29:17,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:17,756 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1850374157] [2022-04-15 06:29:19,101 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:19,611 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:19,612 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:19,614 INFO L85 PathProgramCache]: Analyzing trace with hash -2033569617, now seen corresponding path program 1 times [2022-04-15 06:29:19,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:19,615 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176918932] [2022-04-15 06:29:19,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:19,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:19,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:19,665 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:19,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:19,676 INFO L290 TraceCheckUtils]: 0: Hoare triple {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-15 06:29:19,676 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-15 06:29:19,676 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-15 06:29:19,676 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:19,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-15 06:29:19,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-15 06:29:19,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-15 06:29:19,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-15 06:29:19,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1907#(= main_~x~0 0)} is VALID [2022-04-15 06:29:19,678 INFO L290 TraceCheckUtils]: 6: Hoare triple {1907#(= main_~x~0 0)} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1907#(= main_~x~0 0)} is VALID [2022-04-15 06:29:19,678 INFO L290 TraceCheckUtils]: 7: Hoare triple {1907#(= main_~x~0 0)} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1907#(= main_~x~0 0)} is VALID [2022-04-15 06:29:19,679 INFO L290 TraceCheckUtils]: 8: Hoare triple {1907#(= main_~x~0 0)} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1908#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:19,680 INFO L290 TraceCheckUtils]: 9: Hoare triple {1908#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1903#false} is VALID [2022-04-15 06:29:19,680 INFO L272 TraceCheckUtils]: 10: Hoare triple {1903#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1903#false} is VALID [2022-04-15 06:29:19,680 INFO L290 TraceCheckUtils]: 11: Hoare triple {1903#false} ~cond := #in~cond; {1903#false} is VALID [2022-04-15 06:29:19,680 INFO L290 TraceCheckUtils]: 12: Hoare triple {1903#false} assume 0 == ~cond; {1903#false} is VALID [2022-04-15 06:29:19,680 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-15 06:29:19,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:19,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:19,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176918932] [2022-04-15 06:29:19,680 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176918932] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:19,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717995378] [2022-04-15 06:29:19,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:19,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:19,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:19,682 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:19,682 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 06:29:19,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:19,708 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:19,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:19,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:19,912 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1902#true} is VALID [2022-04-15 06:29:19,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-15 06:29:19,912 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-15 06:29:19,912 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-15 06:29:19,912 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-15 06:29:19,913 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:19,913 INFO L290 TraceCheckUtils]: 6: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:19,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:19,915 INFO L290 TraceCheckUtils]: 8: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1938#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:29:19,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {1938#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1903#false} is VALID [2022-04-15 06:29:19,916 INFO L272 TraceCheckUtils]: 10: Hoare triple {1903#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1903#false} is VALID [2022-04-15 06:29:19,916 INFO L290 TraceCheckUtils]: 11: Hoare triple {1903#false} ~cond := #in~cond; {1903#false} is VALID [2022-04-15 06:29:19,916 INFO L290 TraceCheckUtils]: 12: Hoare triple {1903#false} assume 0 == ~cond; {1903#false} is VALID [2022-04-15 06:29:19,916 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-15 06:29:19,916 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:19,916 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:20,875 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-15 06:29:20,875 INFO L290 TraceCheckUtils]: 12: Hoare triple {1957#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1903#false} is VALID [2022-04-15 06:29:20,876 INFO L290 TraceCheckUtils]: 11: Hoare triple {1961#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1957#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:20,876 INFO L272 TraceCheckUtils]: 10: Hoare triple {1965#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1961#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:20,877 INFO L290 TraceCheckUtils]: 9: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1965#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:20,878 INFO L290 TraceCheckUtils]: 8: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:20,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:20,900 INFO L290 TraceCheckUtils]: 6: Hoare triple {1979#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_133_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_133_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_133_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:20,901 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1979#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_133_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_133_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_133_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:20,901 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-15 06:29:20,901 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-15 06:29:20,901 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-15 06:29:20,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-15 06:29:20,901 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1902#true} is VALID [2022-04-15 06:29:20,901 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:20,901 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717995378] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:20,902 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:20,902 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:21,192 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:21,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1850374157] [2022-04-15 06:29:21,193 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1850374157] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:21,193 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:21,193 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-15 06:29:21,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234376009] [2022-04-15 06:29:21,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:21,194 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 06:29:21,194 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:21,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,214 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:21,214 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 06:29:21,214 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:21,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 06:29:21,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2022-04-15 06:29:21,215 INFO L87 Difference]: Start difference. First operand 34 states and 36 transitions. Second operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:21,544 INFO L93 Difference]: Finished difference Result 46 states and 50 transitions. [2022-04-15 06:29:21,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 06:29:21,545 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 06:29:21,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:21,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 46 transitions. [2022-04-15 06:29:21,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 46 transitions. [2022-04-15 06:29:21,547 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 46 transitions. [2022-04-15 06:29:21,579 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:21,579 INFO L225 Difference]: With dead ends: 46 [2022-04-15 06:29:21,580 INFO L226 Difference]: Without dead ends: 38 [2022-04-15 06:29:21,580 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 29 SyntacticMatches, 15 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=113, Invalid=487, Unknown=0, NotChecked=0, Total=600 [2022-04-15 06:29:21,580 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:21,580 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 49 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 06:29:21,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-15 06:29:21,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2022-04-15 06:29:21,626 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:21,627 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,627 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,627 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:21,628 INFO L93 Difference]: Finished difference Result 38 states and 40 transitions. [2022-04-15 06:29:21,628 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2022-04-15 06:29:21,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:21,628 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:21,628 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 06:29:21,628 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 06:29:21,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:21,629 INFO L93 Difference]: Finished difference Result 38 states and 40 transitions. [2022-04-15 06:29:21,629 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2022-04-15 06:29:21,629 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:21,629 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:21,629 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:21,629 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:21,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 39 transitions. [2022-04-15 06:29:21,630 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 39 transitions. Word has length 32 [2022-04-15 06:29:21,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:21,630 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 39 transitions. [2022-04-15 06:29:21,631 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:21,631 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 39 transitions. [2022-04-15 06:29:21,677 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:21,677 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 39 transitions. [2022-04-15 06:29:21,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-15 06:29:21,678 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:21,678 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:21,694 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:21,883 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:21,883 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:21,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:21,884 INFO L85 PathProgramCache]: Analyzing trace with hash 753562693, now seen corresponding path program 7 times [2022-04-15 06:29:21,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:21,884 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1410208592] [2022-04-15 06:29:23,589 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:23,803 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:26,803 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:26,993 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:26,995 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:26,997 INFO L85 PathProgramCache]: Analyzing trace with hash 15962543, now seen corresponding path program 1 times [2022-04-15 06:29:26,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:26,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849285488] [2022-04-15 06:29:26,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:26,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:27,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:27,060 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:27,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:27,074 INFO L290 TraceCheckUtils]: 0: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:27,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-15 06:29:27,075 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-15 06:29:27,076 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2267#(= main_~x~0 0)} is VALID [2022-04-15 06:29:27,076 INFO L290 TraceCheckUtils]: 6: Hoare triple {2267#(= main_~x~0 0)} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2267#(= main_~x~0 0)} is VALID [2022-04-15 06:29:27,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {2267#(= main_~x~0 0)} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2267#(= main_~x~0 0)} is VALID [2022-04-15 06:29:27,078 INFO L290 TraceCheckUtils]: 8: Hoare triple {2267#(= main_~x~0 0)} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2268#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:29:27,078 INFO L290 TraceCheckUtils]: 9: Hoare triple {2268#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2263#false} is VALID [2022-04-15 06:29:27,078 INFO L272 TraceCheckUtils]: 10: Hoare triple {2263#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2263#false} is VALID [2022-04-15 06:29:27,078 INFO L290 TraceCheckUtils]: 11: Hoare triple {2263#false} ~cond := #in~cond; {2263#false} is VALID [2022-04-15 06:29:27,078 INFO L290 TraceCheckUtils]: 12: Hoare triple {2263#false} assume 0 == ~cond; {2263#false} is VALID [2022-04-15 06:29:27,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-15 06:29:27,078 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:27,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:27,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849285488] [2022-04-15 06:29:27,079 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1849285488] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:27,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1062362709] [2022-04-15 06:29:27,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:27,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:27,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:27,080 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:27,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 06:29:27,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:27,112 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:27,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:27,121 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:27,309 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2262#true} is VALID [2022-04-15 06:29:27,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-15 06:29:27,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-15 06:29:27,309 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-15 06:29:27,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-15 06:29:27,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:27,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:27,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:27,312 INFO L290 TraceCheckUtils]: 8: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2298#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:29:27,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {2298#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2263#false} is VALID [2022-04-15 06:29:27,313 INFO L272 TraceCheckUtils]: 10: Hoare triple {2263#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2263#false} is VALID [2022-04-15 06:29:27,313 INFO L290 TraceCheckUtils]: 11: Hoare triple {2263#false} ~cond := #in~cond; {2263#false} is VALID [2022-04-15 06:29:27,313 INFO L290 TraceCheckUtils]: 12: Hoare triple {2263#false} assume 0 == ~cond; {2263#false} is VALID [2022-04-15 06:29:27,313 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-15 06:29:27,313 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:27,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:29,266 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-15 06:29:29,267 INFO L290 TraceCheckUtils]: 12: Hoare triple {2317#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {2263#false} is VALID [2022-04-15 06:29:29,267 INFO L290 TraceCheckUtils]: 11: Hoare triple {2321#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {2317#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:29,267 INFO L272 TraceCheckUtils]: 10: Hoare triple {2325#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2321#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:29,268 INFO L290 TraceCheckUtils]: 9: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2325#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:29,270 INFO L290 TraceCheckUtils]: 8: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:29,270 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:29,285 INFO L290 TraceCheckUtils]: 6: Hoare triple {2339#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_157_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_157_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_157_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:29,286 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2339#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_157_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_157_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_157_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:29,286 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-15 06:29:29,286 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-15 06:29:29,286 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-15 06:29:29,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-15 06:29:29,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2262#true} is VALID [2022-04-15 06:29:29,287 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:29,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1062362709] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:29,287 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:29,287 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:29,594 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:29,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1410208592] [2022-04-15 06:29:29,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1410208592] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:29,595 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:29,595 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-15 06:29:29,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254376163] [2022-04-15 06:29:29,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:29,595 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-15 06:29:29,595 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:29,596 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:29,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:29,617 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-15 06:29:29,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:29,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-15 06:29:29,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2022-04-15 06:29:29,618 INFO L87 Difference]: Start difference. First operand 37 states and 39 transitions. Second operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:30,023 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2022-04-15 06:29:30,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 06:29:30,024 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-15 06:29:30,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:30,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-15 06:29:30,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-15 06:29:30,028 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 49 transitions. [2022-04-15 06:29:30,062 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:30,062 INFO L225 Difference]: With dead ends: 49 [2022-04-15 06:29:30,062 INFO L226 Difference]: Without dead ends: 41 [2022-04-15 06:29:30,063 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 29 SyntacticMatches, 17 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=125, Invalid=577, Unknown=0, NotChecked=0, Total=702 [2022-04-15 06:29:30,063 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 26 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:30,063 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 54 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 249 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 06:29:30,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-15 06:29:30,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2022-04-15 06:29:30,105 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:30,106 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,106 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,106 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:30,107 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2022-04-15 06:29:30,107 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2022-04-15 06:29:30,107 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:30,107 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:30,107 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-15 06:29:30,107 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-15 06:29:30,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:30,108 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2022-04-15 06:29:30,108 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2022-04-15 06:29:30,108 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:30,108 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:30,108 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:30,108 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:30,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 42 transitions. [2022-04-15 06:29:30,109 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 42 transitions. Word has length 35 [2022-04-15 06:29:30,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:30,109 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 42 transitions. [2022-04-15 06:29:30,109 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:30,109 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 40 states and 42 transitions. [2022-04-15 06:29:30,153 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:30,153 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 42 transitions. [2022-04-15 06:29:30,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-15 06:29:30,153 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:30,160 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:30,175 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-15 06:29:30,363 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:30,363 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:30,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:30,364 INFO L85 PathProgramCache]: Analyzing trace with hash 49991693, now seen corresponding path program 8 times [2022-04-15 06:29:30,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:30,364 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1591622668] [2022-04-15 06:29:33,367 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:33,780 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:34,312 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:34,313 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:34,316 INFO L85 PathProgramCache]: Analyzing trace with hash 2065494703, now seen corresponding path program 1 times [2022-04-15 06:29:34,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:34,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781066379] [2022-04-15 06:29:34,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:34,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:34,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:34,361 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:34,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:34,365 INFO L290 TraceCheckUtils]: 0: Hoare triple {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-15 06:29:34,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-15 06:29:34,365 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-15 06:29:34,366 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:34,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-15 06:29:34,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-15 06:29:34,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-15 06:29:34,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-15 06:29:34,366 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2648#(= main_~x~0 0)} is VALID [2022-04-15 06:29:34,367 INFO L290 TraceCheckUtils]: 6: Hoare triple {2648#(= main_~x~0 0)} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2648#(= main_~x~0 0)} is VALID [2022-04-15 06:29:34,368 INFO L290 TraceCheckUtils]: 7: Hoare triple {2648#(= main_~x~0 0)} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2648#(= main_~x~0 0)} is VALID [2022-04-15 06:29:34,369 INFO L290 TraceCheckUtils]: 8: Hoare triple {2648#(= main_~x~0 0)} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2649#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:29:34,369 INFO L290 TraceCheckUtils]: 9: Hoare triple {2649#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2644#false} is VALID [2022-04-15 06:29:34,369 INFO L272 TraceCheckUtils]: 10: Hoare triple {2644#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2644#false} is VALID [2022-04-15 06:29:34,369 INFO L290 TraceCheckUtils]: 11: Hoare triple {2644#false} ~cond := #in~cond; {2644#false} is VALID [2022-04-15 06:29:34,369 INFO L290 TraceCheckUtils]: 12: Hoare triple {2644#false} assume 0 == ~cond; {2644#false} is VALID [2022-04-15 06:29:34,369 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-15 06:29:34,369 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:34,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:34,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781066379] [2022-04-15 06:29:34,370 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [781066379] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:34,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [239920017] [2022-04-15 06:29:34,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:34,370 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:34,370 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:34,371 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:34,372 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 06:29:34,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:34,397 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:34,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:34,405 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:34,576 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2643#true} is VALID [2022-04-15 06:29:34,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-15 06:29:34,576 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-15 06:29:34,577 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-15 06:29:34,577 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-15 06:29:34,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:34,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:34,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:34,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2679#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:29:34,579 INFO L290 TraceCheckUtils]: 9: Hoare triple {2679#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2644#false} is VALID [2022-04-15 06:29:34,580 INFO L272 TraceCheckUtils]: 10: Hoare triple {2644#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2644#false} is VALID [2022-04-15 06:29:34,580 INFO L290 TraceCheckUtils]: 11: Hoare triple {2644#false} ~cond := #in~cond; {2644#false} is VALID [2022-04-15 06:29:34,580 INFO L290 TraceCheckUtils]: 12: Hoare triple {2644#false} assume 0 == ~cond; {2644#false} is VALID [2022-04-15 06:29:34,580 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-15 06:29:34,580 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:34,580 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:35,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-15 06:29:35,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {2698#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {2644#false} is VALID [2022-04-15 06:29:35,879 INFO L290 TraceCheckUtils]: 11: Hoare triple {2702#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {2698#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:35,879 INFO L272 TraceCheckUtils]: 10: Hoare triple {2706#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2702#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:35,880 INFO L290 TraceCheckUtils]: 9: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2706#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:35,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:35,882 INFO L290 TraceCheckUtils]: 7: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:35,888 INFO L290 TraceCheckUtils]: 6: Hoare triple {2720#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_182_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_182_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_182_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:35,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2720#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_182_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_182_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_182_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:35,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-15 06:29:35,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-15 06:29:35,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-15 06:29:35,889 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-15 06:29:35,889 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2643#true} is VALID [2022-04-15 06:29:35,889 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:35,889 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [239920017] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:35,889 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:35,889 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:36,225 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:36,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1591622668] [2022-04-15 06:29:36,225 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1591622668] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:36,226 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:36,226 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2022-04-15 06:29:36,226 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346075404] [2022-04-15 06:29:36,226 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:36,226 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 06:29:36,226 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:36,227 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:36,253 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-15 06:29:36,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:36,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-15 06:29:36,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=306, Unknown=0, NotChecked=0, Total=380 [2022-04-15 06:29:36,254 INFO L87 Difference]: Start difference. First operand 40 states and 42 transitions. Second operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:36,799 INFO L93 Difference]: Finished difference Result 52 states and 56 transitions. [2022-04-15 06:29:36,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 06:29:36,800 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 06:29:36,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:36,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-15 06:29:36,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-15 06:29:36,801 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 52 transitions. [2022-04-15 06:29:36,851 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:36,852 INFO L225 Difference]: With dead ends: 52 [2022-04-15 06:29:36,852 INFO L226 Difference]: Without dead ends: 44 [2022-04-15 06:29:36,853 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 29 SyntacticMatches, 19 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=137, Invalid=675, Unknown=0, NotChecked=0, Total=812 [2022-04-15 06:29:36,853 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 28 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 318 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:36,853 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [28 Valid, 59 Invalid, 318 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 06:29:36,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-15 06:29:36,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2022-04-15 06:29:36,900 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:36,900 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,900 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,900 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:36,901 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2022-04-15 06:29:36,901 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2022-04-15 06:29:36,901 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:36,901 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:36,901 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-15 06:29:36,901 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-15 06:29:36,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:36,902 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2022-04-15 06:29:36,902 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2022-04-15 06:29:36,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:36,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:36,902 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:36,902 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:36,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 45 transitions. [2022-04-15 06:29:36,903 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 45 transitions. Word has length 38 [2022-04-15 06:29:36,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:36,903 INFO L478 AbstractCegarLoop]: Abstraction has 43 states and 45 transitions. [2022-04-15 06:29:36,903 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:36,903 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 45 transitions. [2022-04-15 06:29:36,951 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:36,952 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 45 transitions. [2022-04-15 06:29:36,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-15 06:29:36,952 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:36,952 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:36,968 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:37,152 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-15 06:29:37,153 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:37,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:37,153 INFO L85 PathProgramCache]: Analyzing trace with hash -593264827, now seen corresponding path program 9 times [2022-04-15 06:29:37,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:37,153 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [584721337] [2022-04-15 06:29:39,884 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:40,119 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:40,514 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:40,515 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:40,517 INFO L85 PathProgramCache]: Analyzing trace with hash -179940433, now seen corresponding path program 1 times [2022-04-15 06:29:40,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:40,517 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675466019] [2022-04-15 06:29:40,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:40,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:40,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:40,583 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:40,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:40,590 INFO L290 TraceCheckUtils]: 0: Hoare triple {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:40,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-15 06:29:40,591 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-15 06:29:40,592 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3050#(= main_~x~0 0)} is VALID [2022-04-15 06:29:40,592 INFO L290 TraceCheckUtils]: 6: Hoare triple {3050#(= main_~x~0 0)} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3050#(= main_~x~0 0)} is VALID [2022-04-15 06:29:40,593 INFO L290 TraceCheckUtils]: 7: Hoare triple {3050#(= main_~x~0 0)} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3050#(= main_~x~0 0)} is VALID [2022-04-15 06:29:40,594 INFO L290 TraceCheckUtils]: 8: Hoare triple {3050#(= main_~x~0 0)} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3051#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:40,594 INFO L290 TraceCheckUtils]: 9: Hoare triple {3051#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3046#false} is VALID [2022-04-15 06:29:40,594 INFO L272 TraceCheckUtils]: 10: Hoare triple {3046#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3046#false} is VALID [2022-04-15 06:29:40,595 INFO L290 TraceCheckUtils]: 11: Hoare triple {3046#false} ~cond := #in~cond; {3046#false} is VALID [2022-04-15 06:29:40,595 INFO L290 TraceCheckUtils]: 12: Hoare triple {3046#false} assume 0 == ~cond; {3046#false} is VALID [2022-04-15 06:29:40,595 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-15 06:29:40,595 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:40,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:40,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675466019] [2022-04-15 06:29:40,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675466019] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:40,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1294878593] [2022-04-15 06:29:40,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:40,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:40,595 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:40,596 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:40,597 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 06:29:40,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:40,624 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:40,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:40,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:40,817 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3045#true} is VALID [2022-04-15 06:29:40,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-15 06:29:40,818 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-15 06:29:40,818 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-15 06:29:40,818 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-15 06:29:40,818 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:40,819 INFO L290 TraceCheckUtils]: 6: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:40,819 INFO L290 TraceCheckUtils]: 7: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:40,820 INFO L290 TraceCheckUtils]: 8: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3081#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:29:40,821 INFO L290 TraceCheckUtils]: 9: Hoare triple {3081#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3046#false} is VALID [2022-04-15 06:29:40,821 INFO L272 TraceCheckUtils]: 10: Hoare triple {3046#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3046#false} is VALID [2022-04-15 06:29:40,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {3046#false} ~cond := #in~cond; {3046#false} is VALID [2022-04-15 06:29:40,821 INFO L290 TraceCheckUtils]: 12: Hoare triple {3046#false} assume 0 == ~cond; {3046#false} is VALID [2022-04-15 06:29:40,822 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-15 06:29:40,822 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:40,822 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:41,736 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-15 06:29:41,747 INFO L290 TraceCheckUtils]: 12: Hoare triple {3100#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3046#false} is VALID [2022-04-15 06:29:41,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {3104#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3100#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:41,748 INFO L272 TraceCheckUtils]: 10: Hoare triple {3108#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3104#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:41,749 INFO L290 TraceCheckUtils]: 9: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3108#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:41,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:41,756 INFO L290 TraceCheckUtils]: 7: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:43,061 INFO L290 TraceCheckUtils]: 6: Hoare triple {3122#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_208_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_208_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_208_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:43,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3122#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_208_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_208_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_208_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:43,062 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-15 06:29:43,062 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-15 06:29:43,062 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-15 06:29:43,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-15 06:29:43,062 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3045#true} is VALID [2022-04-15 06:29:43,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:43,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1294878593] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:43,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:43,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:29:43,441 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:43,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [584721337] [2022-04-15 06:29:43,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [584721337] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:43,441 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:43,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-04-15 06:29:43,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115916445] [2022-04-15 06:29:43,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:43,442 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 06:29:43,442 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:43,442 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:43,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:43,468 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 06:29:43,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:43,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 06:29:43,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2022-04-15 06:29:43,469 INFO L87 Difference]: Start difference. First operand 43 states and 45 transitions. Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:44,040 INFO L93 Difference]: Finished difference Result 55 states and 59 transitions. [2022-04-15 06:29:44,040 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-15 06:29:44,040 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 06:29:44,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:44,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-15 06:29:44,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-15 06:29:44,042 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 55 transitions. [2022-04-15 06:29:44,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:44,085 INFO L225 Difference]: With dead ends: 55 [2022-04-15 06:29:44,086 INFO L226 Difference]: Without dead ends: 47 [2022-04-15 06:29:44,086 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 28 SyntacticMatches, 22 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=149, Invalid=781, Unknown=0, NotChecked=0, Total=930 [2022-04-15 06:29:44,086 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 30 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 371 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 383 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 371 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:44,086 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 64 Invalid, 383 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 371 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 06:29:44,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-15 06:29:44,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2022-04-15 06:29:44,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:44,131 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,131 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,132 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:44,132 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2022-04-15 06:29:44,132 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2022-04-15 06:29:44,132 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:44,132 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:44,133 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-15 06:29:44,133 INFO L87 Difference]: Start difference. First operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-15 06:29:44,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:44,133 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2022-04-15 06:29:44,133 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2022-04-15 06:29:44,133 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:44,133 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:44,134 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:44,134 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:44,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 48 transitions. [2022-04-15 06:29:44,134 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 48 transitions. Word has length 41 [2022-04-15 06:29:44,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:44,134 INFO L478 AbstractCegarLoop]: Abstraction has 46 states and 48 transitions. [2022-04-15 06:29:44,135 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:44,135 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 48 transitions. [2022-04-15 06:29:44,183 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:44,183 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 48 transitions. [2022-04-15 06:29:44,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-04-15 06:29:44,184 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:44,184 INFO L499 BasicCegarLoop]: trace histogram [11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:44,200 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:44,384 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:44,384 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:44,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:44,385 INFO L85 PathProgramCache]: Analyzing trace with hash 295822605, now seen corresponding path program 10 times [2022-04-15 06:29:44,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:44,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [59414811] [2022-04-15 06:29:47,260 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:47,474 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:48,857 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:48,859 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:48,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1869591727, now seen corresponding path program 1 times [2022-04-15 06:29:48,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:48,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310906249] [2022-04-15 06:29:48,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:48,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:48,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:48,923 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:48,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:48,926 INFO L290 TraceCheckUtils]: 0: Hoare triple {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-15 06:29:48,927 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-15 06:29:48,927 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-15 06:29:48,927 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:48,927 INFO L290 TraceCheckUtils]: 1: Hoare triple {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-15 06:29:48,927 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-15 06:29:48,927 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-15 06:29:48,928 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-15 06:29:48,928 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:48,929 INFO L290 TraceCheckUtils]: 6: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:48,929 INFO L290 TraceCheckUtils]: 7: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:48,930 INFO L290 TraceCheckUtils]: 8: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3474#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:48,931 INFO L290 TraceCheckUtils]: 9: Hoare triple {3474#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3469#false} is VALID [2022-04-15 06:29:48,931 INFO L272 TraceCheckUtils]: 10: Hoare triple {3469#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3469#false} is VALID [2022-04-15 06:29:48,931 INFO L290 TraceCheckUtils]: 11: Hoare triple {3469#false} ~cond := #in~cond; {3469#false} is VALID [2022-04-15 06:29:48,931 INFO L290 TraceCheckUtils]: 12: Hoare triple {3469#false} assume 0 == ~cond; {3469#false} is VALID [2022-04-15 06:29:48,931 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-15 06:29:48,931 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:48,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:48,931 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310906249] [2022-04-15 06:29:48,931 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [310906249] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:48,931 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2109418803] [2022-04-15 06:29:48,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:48,932 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:48,932 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:48,932 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:48,934 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 06:29:48,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:48,961 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:48,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:48,968 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:49,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3468#true} is VALID [2022-04-15 06:29:49,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-15 06:29:49,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-15 06:29:49,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-15 06:29:49,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-15 06:29:49,148 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:49,149 INFO L290 TraceCheckUtils]: 6: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:49,149 INFO L290 TraceCheckUtils]: 7: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:49,150 INFO L290 TraceCheckUtils]: 8: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3503#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:29:49,151 INFO L290 TraceCheckUtils]: 9: Hoare triple {3503#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3469#false} is VALID [2022-04-15 06:29:49,151 INFO L272 TraceCheckUtils]: 10: Hoare triple {3469#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3469#false} is VALID [2022-04-15 06:29:49,151 INFO L290 TraceCheckUtils]: 11: Hoare triple {3469#false} ~cond := #in~cond; {3469#false} is VALID [2022-04-15 06:29:49,151 INFO L290 TraceCheckUtils]: 12: Hoare triple {3469#false} assume 0 == ~cond; {3469#false} is VALID [2022-04-15 06:29:49,151 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-15 06:29:49,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:49,151 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:29:50,044 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-15 06:29:50,045 INFO L290 TraceCheckUtils]: 12: Hoare triple {3522#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3469#false} is VALID [2022-04-15 06:29:50,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {3526#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3522#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:29:50,046 INFO L272 TraceCheckUtils]: 10: Hoare triple {3530#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3526#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:29:50,046 INFO L290 TraceCheckUtils]: 9: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3530#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:29:50,227 INFO L290 TraceCheckUtils]: 8: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:50,227 INFO L290 TraceCheckUtils]: 7: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:50,254 INFO L290 TraceCheckUtils]: 6: Hoare triple {3544#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_235_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_235_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_235_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:29:50,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3544#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_235_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_235_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_235_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:29:50,255 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-15 06:29:50,256 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-15 06:29:50,256 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-15 06:29:50,256 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-15 06:29:50,256 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3468#true} is VALID [2022-04-15 06:29:50,256 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:50,256 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2109418803] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:29:50,256 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:29:50,256 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:29:50,862 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:29:50,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [59414811] [2022-04-15 06:29:50,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [59414811] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:29:50,862 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:29:50,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2022-04-15 06:29:50,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [306378715] [2022-04-15 06:29:50,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:29:50,863 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 44 [2022-04-15 06:29:50,863 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:29:50,863 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:50,890 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:50,890 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-15 06:29:50,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:50,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-15 06:29:50,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=772, Unknown=0, NotChecked=0, Total=930 [2022-04-15 06:29:50,891 INFO L87 Difference]: Start difference. First operand 46 states and 48 transitions. Second operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:52,219 INFO L93 Difference]: Finished difference Result 57 states and 61 transitions. [2022-04-15 06:29:52,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-15 06:29:52,220 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 44 [2022-04-15 06:29:52,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:29:52,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 57 transitions. [2022-04-15 06:29:52,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 57 transitions. [2022-04-15 06:29:52,221 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 57 transitions. [2022-04-15 06:29:52,269 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:52,270 INFO L225 Difference]: With dead ends: 57 [2022-04-15 06:29:52,270 INFO L226 Difference]: Without dead ends: 49 [2022-04-15 06:29:52,271 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 30 SyntacticMatches, 13 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 545 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=336, Invalid=2316, Unknown=0, NotChecked=0, Total=2652 [2022-04-15 06:29:52,271 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 820 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 843 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 820 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:29:52,271 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 119 Invalid, 843 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 820 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 06:29:52,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-15 06:29:52,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-04-15 06:29:52,338 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:29:52,338 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,338 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,339 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:52,341 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2022-04-15 06:29:52,341 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-15 06:29:52,342 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:52,342 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:52,342 INFO L74 IsIncluded]: Start isIncluded. First operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-15 06:29:52,342 INFO L87 Difference]: Start difference. First operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-15 06:29:52,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:29:52,343 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2022-04-15 06:29:52,343 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-15 06:29:52,343 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:29:52,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:29:52,343 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:29:52,343 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:29:52,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2022-04-15 06:29:52,344 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 44 [2022-04-15 06:29:52,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:29:52,344 INFO L478 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2022-04-15 06:29:52,345 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:29:52,345 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 51 transitions. [2022-04-15 06:29:52,409 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:29:52,409 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-15 06:29:52,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-04-15 06:29:52,410 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:29:52,410 INFO L499 BasicCegarLoop]: trace histogram [12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:29:52,426 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 06:29:52,623 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 06:29:52,623 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:29:52,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:29:52,624 INFO L85 PathProgramCache]: Analyzing trace with hash 36194885, now seen corresponding path program 11 times [2022-04-15 06:29:52,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:29:52,624 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [566246222] [2022-04-15 06:29:55,256 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:59,042 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:29:59,243 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:29:59,244 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:29:59,247 INFO L85 PathProgramCache]: Analyzing trace with hash -375843409, now seen corresponding path program 1 times [2022-04-15 06:29:59,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:29:59,247 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396837774] [2022-04-15 06:29:59,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:59,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:29:59,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:59,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:29:59,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:59,301 INFO L290 TraceCheckUtils]: 0: Hoare triple {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-15 06:29:59,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-15 06:29:59,302 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-15 06:29:59,302 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:29:59,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-15 06:29:59,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-15 06:29:59,302 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-15 06:29:59,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-15 06:29:59,305 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {3942#(= main_~x~0 0)} is VALID [2022-04-15 06:29:59,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {3942#(= main_~x~0 0)} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3942#(= main_~x~0 0)} is VALID [2022-04-15 06:29:59,309 INFO L290 TraceCheckUtils]: 7: Hoare triple {3942#(= main_~x~0 0)} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3942#(= main_~x~0 0)} is VALID [2022-04-15 06:29:59,310 INFO L290 TraceCheckUtils]: 8: Hoare triple {3942#(= main_~x~0 0)} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3943#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:29:59,310 INFO L290 TraceCheckUtils]: 9: Hoare triple {3943#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3938#false} is VALID [2022-04-15 06:29:59,311 INFO L272 TraceCheckUtils]: 10: Hoare triple {3938#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3938#false} is VALID [2022-04-15 06:29:59,311 INFO L290 TraceCheckUtils]: 11: Hoare triple {3938#false} ~cond := #in~cond; {3938#false} is VALID [2022-04-15 06:29:59,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {3938#false} assume 0 == ~cond; {3938#false} is VALID [2022-04-15 06:29:59,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-15 06:29:59,311 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:59,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:29:59,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396837774] [2022-04-15 06:29:59,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [396837774] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:29:59,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2085114448] [2022-04-15 06:29:59,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:29:59,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:29:59,312 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:29:59,312 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:29:59,320 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 06:29:59,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:59,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:29:59,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:29:59,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:29:59,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3937#true} is VALID [2022-04-15 06:29:59,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-15 06:29:59,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-15 06:29:59,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-15 06:29:59,539 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-15 06:29:59,539 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:59,540 INFO L290 TraceCheckUtils]: 6: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:59,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:29:59,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3973#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:29:59,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {3973#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3938#false} is VALID [2022-04-15 06:29:59,542 INFO L272 TraceCheckUtils]: 10: Hoare triple {3938#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3938#false} is VALID [2022-04-15 06:29:59,542 INFO L290 TraceCheckUtils]: 11: Hoare triple {3938#false} ~cond := #in~cond; {3938#false} is VALID [2022-04-15 06:29:59,542 INFO L290 TraceCheckUtils]: 12: Hoare triple {3938#false} assume 0 == ~cond; {3938#false} is VALID [2022-04-15 06:29:59,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-15 06:29:59,542 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:29:59,542 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:01,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-15 06:30:01,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {3992#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3938#false} is VALID [2022-04-15 06:30:01,355 INFO L290 TraceCheckUtils]: 11: Hoare triple {3996#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3992#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:01,356 INFO L272 TraceCheckUtils]: 10: Hoare triple {4000#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3996#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:01,356 INFO L290 TraceCheckUtils]: 9: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4000#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:01,359 INFO L290 TraceCheckUtils]: 8: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:01,359 INFO L290 TraceCheckUtils]: 7: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:01,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {4014#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_263_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_263_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_263_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:01,601 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {4014#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_263_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_263_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_263_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:30:01,601 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-15 06:30:01,601 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-15 06:30:01,601 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-15 06:30:01,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-15 06:30:01,601 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3937#true} is VALID [2022-04-15 06:30:01,601 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:01,602 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2085114448] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:01,602 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:01,602 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:30:02,101 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:02,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [566246222] [2022-04-15 06:30:02,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [566246222] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:02,101 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:02,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2022-04-15 06:30:02,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862773873] [2022-04-15 06:30:02,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:02,102 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 47 [2022-04-15 06:30:02,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:02,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:02,131 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:02,131 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 06:30:02,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:02,132 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 06:30:02,132 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=417, Unknown=0, NotChecked=0, Total=506 [2022-04-15 06:30:02,132 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:02,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:02,951 INFO L93 Difference]: Finished difference Result 61 states and 65 transitions. [2022-04-15 06:30:02,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-15 06:30:02,951 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 47 [2022-04-15 06:30:02,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:02,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:02,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 61 transitions. [2022-04-15 06:30:02,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:02,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 61 transitions. [2022-04-15 06:30:02,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 61 transitions. [2022-04-15 06:30:03,000 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:03,001 INFO L225 Difference]: With dead ends: 61 [2022-04-15 06:30:03,001 INFO L226 Difference]: Without dead ends: 53 [2022-04-15 06:30:03,001 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 29 SyntacticMatches, 25 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=173, Invalid=1017, Unknown=0, NotChecked=0, Total=1190 [2022-04-15 06:30:03,002 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 34 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 517 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 531 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 517 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:03,002 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 74 Invalid, 531 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 517 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 06:30:03,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-04-15 06:30:03,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 52. [2022-04-15 06:30:03,058 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:03,058 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:03,059 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:03,059 INFO L87 Difference]: Start difference. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:03,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:03,059 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2022-04-15 06:30:03,060 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2022-04-15 06:30:03,060 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:03,060 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:03,060 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-15 06:30:03,060 INFO L87 Difference]: Start difference. First operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-15 06:30:03,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:03,061 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2022-04-15 06:30:03,061 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2022-04-15 06:30:03,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:03,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:03,061 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:03,061 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:03,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:03,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-15 06:30:03,062 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 47 [2022-04-15 06:30:03,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:03,062 INFO L478 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-15 06:30:03,062 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:03,062 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 54 transitions. [2022-04-15 06:30:03,125 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:03,125 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-15 06:30:03,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-15 06:30:03,125 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:03,125 INFO L499 BasicCegarLoop]: trace histogram [13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:03,143 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:03,326 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 06:30:03,326 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:03,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:03,326 INFO L85 PathProgramCache]: Analyzing trace with hash 702888461, now seen corresponding path program 12 times [2022-04-15 06:30:03,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:03,327 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1767136602] [2022-04-15 06:30:04,256 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:05,480 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:05,481 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:05,484 INFO L85 PathProgramCache]: Analyzing trace with hash 1673688751, now seen corresponding path program 1 times [2022-04-15 06:30:05,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:05,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613502533] [2022-04-15 06:30:05,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:05,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:05,537 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:05,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:05,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:05,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-15 06:30:05,541 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-15 06:30:05,542 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4407#(= main_~x~0 0)} is VALID [2022-04-15 06:30:05,542 INFO L290 TraceCheckUtils]: 6: Hoare triple {4407#(= main_~x~0 0)} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4407#(= main_~x~0 0)} is VALID [2022-04-15 06:30:05,543 INFO L290 TraceCheckUtils]: 7: Hoare triple {4407#(= main_~x~0 0)} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4407#(= main_~x~0 0)} is VALID [2022-04-15 06:30:05,544 INFO L290 TraceCheckUtils]: 8: Hoare triple {4407#(= main_~x~0 0)} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4408#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:30:05,544 INFO L290 TraceCheckUtils]: 9: Hoare triple {4408#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4403#false} is VALID [2022-04-15 06:30:05,544 INFO L272 TraceCheckUtils]: 10: Hoare triple {4403#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4403#false} is VALID [2022-04-15 06:30:05,544 INFO L290 TraceCheckUtils]: 11: Hoare triple {4403#false} ~cond := #in~cond; {4403#false} is VALID [2022-04-15 06:30:05,544 INFO L290 TraceCheckUtils]: 12: Hoare triple {4403#false} assume 0 == ~cond; {4403#false} is VALID [2022-04-15 06:30:05,544 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-15 06:30:05,544 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:05,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:05,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613502533] [2022-04-15 06:30:05,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613502533] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:05,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [500166086] [2022-04-15 06:30:05,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:05,545 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:05,545 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:05,546 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:05,547 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 06:30:05,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:05,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:05,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:05,580 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:05,750 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4402#true} is VALID [2022-04-15 06:30:05,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-15 06:30:05,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-15 06:30:05,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-15 06:30:05,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-15 06:30:05,752 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:05,752 INFO L290 TraceCheckUtils]: 6: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:05,753 INFO L290 TraceCheckUtils]: 7: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:05,754 INFO L290 TraceCheckUtils]: 8: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4438#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:30:05,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {4438#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4403#false} is VALID [2022-04-15 06:30:05,754 INFO L272 TraceCheckUtils]: 10: Hoare triple {4403#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4403#false} is VALID [2022-04-15 06:30:05,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {4403#false} ~cond := #in~cond; {4403#false} is VALID [2022-04-15 06:30:05,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {4403#false} assume 0 == ~cond; {4403#false} is VALID [2022-04-15 06:30:05,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-15 06:30:05,755 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:05,755 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:07,249 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-15 06:30:07,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {4457#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {4403#false} is VALID [2022-04-15 06:30:07,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {4461#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {4457#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:07,251 INFO L272 TraceCheckUtils]: 10: Hoare triple {4465#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4461#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:07,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4465#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:07,254 INFO L290 TraceCheckUtils]: 8: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:07,254 INFO L290 TraceCheckUtils]: 7: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:07,587 INFO L290 TraceCheckUtils]: 6: Hoare triple {4479#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_292_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_292_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_292_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:07,588 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4479#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_292_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_292_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_292_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:30:07,588 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-15 06:30:07,588 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-15 06:30:07,589 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-15 06:30:07,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-15 06:30:07,589 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4402#true} is VALID [2022-04-15 06:30:07,589 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:07,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [500166086] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:07,589 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:07,589 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:30:08,112 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:08,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1767136602] [2022-04-15 06:30:08,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1767136602] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:08,113 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:08,113 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-04-15 06:30:08,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886546628] [2022-04-15 06:30:08,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:08,113 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 50 [2022-04-15 06:30:08,113 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:08,114 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:08,144 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:08,144 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 06:30:08,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:08,145 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 06:30:08,145 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=458, Unknown=0, NotChecked=0, Total=552 [2022-04-15 06:30:08,145 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:09,067 INFO L93 Difference]: Finished difference Result 64 states and 68 transitions. [2022-04-15 06:30:09,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-15 06:30:09,067 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 50 [2022-04-15 06:30:09,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:09,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 64 transitions. [2022-04-15 06:30:09,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 64 transitions. [2022-04-15 06:30:09,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 64 transitions. [2022-04-15 06:30:09,115 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:09,116 INFO L225 Difference]: With dead ends: 64 [2022-04-15 06:30:09,116 INFO L226 Difference]: Without dead ends: 56 [2022-04-15 06:30:09,116 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 29 SyntacticMatches, 27 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=185, Invalid=1147, Unknown=0, NotChecked=0, Total=1332 [2022-04-15 06:30:09,117 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 36 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 599 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 614 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:09,117 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [36 Valid, 79 Invalid, 614 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 599 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 06:30:09,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-15 06:30:09,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2022-04-15 06:30:09,179 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:09,179 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,179 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,179 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:09,180 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-04-15 06:30:09,180 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2022-04-15 06:30:09,180 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:09,180 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:09,180 INFO L74 IsIncluded]: Start isIncluded. First operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-15 06:30:09,180 INFO L87 Difference]: Start difference. First operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-15 06:30:09,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:09,181 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-04-15 06:30:09,181 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2022-04-15 06:30:09,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:09,181 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:09,181 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:09,181 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:09,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2022-04-15 06:30:09,182 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 57 transitions. Word has length 50 [2022-04-15 06:30:09,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:09,182 INFO L478 AbstractCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-04-15 06:30:09,183 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:09,183 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 55 states and 57 transitions. [2022-04-15 06:30:09,252 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:09,252 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 57 transitions. [2022-04-15 06:30:09,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-04-15 06:30:09,253 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:09,253 INFO L499 BasicCegarLoop]: trace histogram [14, 14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:09,268 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:09,453 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-15 06:30:09,453 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:09,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:09,454 INFO L85 PathProgramCache]: Analyzing trace with hash -2052532923, now seen corresponding path program 13 times [2022-04-15 06:30:09,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:09,454 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [399926517] [2022-04-15 06:30:11,303 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:14,300 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:14,301 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:14,304 INFO L85 PathProgramCache]: Analyzing trace with hash -571746385, now seen corresponding path program 1 times [2022-04-15 06:30:14,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:14,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169796655] [2022-04-15 06:30:14,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:14,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:14,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:14,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:14,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:14,362 INFO L290 TraceCheckUtils]: 0: Hoare triple {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-15 06:30:14,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-15 06:30:14,362 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-15 06:30:14,362 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:14,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-15 06:30:14,362 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-15 06:30:14,362 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-15 06:30:14,363 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-15 06:30:14,363 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4893#(= main_~x~0 0)} is VALID [2022-04-15 06:30:14,363 INFO L290 TraceCheckUtils]: 6: Hoare triple {4893#(= main_~x~0 0)} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4893#(= main_~x~0 0)} is VALID [2022-04-15 06:30:14,364 INFO L290 TraceCheckUtils]: 7: Hoare triple {4893#(= main_~x~0 0)} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4893#(= main_~x~0 0)} is VALID [2022-04-15 06:30:14,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {4893#(= main_~x~0 0)} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4894#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:30:14,365 INFO L290 TraceCheckUtils]: 9: Hoare triple {4894#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4889#false} is VALID [2022-04-15 06:30:14,365 INFO L272 TraceCheckUtils]: 10: Hoare triple {4889#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4889#false} is VALID [2022-04-15 06:30:14,365 INFO L290 TraceCheckUtils]: 11: Hoare triple {4889#false} ~cond := #in~cond; {4889#false} is VALID [2022-04-15 06:30:14,365 INFO L290 TraceCheckUtils]: 12: Hoare triple {4889#false} assume 0 == ~cond; {4889#false} is VALID [2022-04-15 06:30:14,365 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-15 06:30:14,365 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:14,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:14,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169796655] [2022-04-15 06:30:14,366 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169796655] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:14,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574798256] [2022-04-15 06:30:14,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:14,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:14,366 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:14,367 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:14,367 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 06:30:14,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:14,392 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:14,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:14,406 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:14,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4888#true} is VALID [2022-04-15 06:30:14,582 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-15 06:30:14,582 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-15 06:30:14,582 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-15 06:30:14,582 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-15 06:30:14,582 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:14,583 INFO L290 TraceCheckUtils]: 6: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:14,583 INFO L290 TraceCheckUtils]: 7: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:14,584 INFO L290 TraceCheckUtils]: 8: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4924#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:30:14,585 INFO L290 TraceCheckUtils]: 9: Hoare triple {4924#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4889#false} is VALID [2022-04-15 06:30:14,585 INFO L272 TraceCheckUtils]: 10: Hoare triple {4889#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4889#false} is VALID [2022-04-15 06:30:14,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {4889#false} ~cond := #in~cond; {4889#false} is VALID [2022-04-15 06:30:14,585 INFO L290 TraceCheckUtils]: 12: Hoare triple {4889#false} assume 0 == ~cond; {4889#false} is VALID [2022-04-15 06:30:14,585 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-15 06:30:14,585 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:14,585 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:15,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-15 06:30:15,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {4943#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {4889#false} is VALID [2022-04-15 06:30:15,432 INFO L290 TraceCheckUtils]: 11: Hoare triple {4947#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {4943#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:15,432 INFO L272 TraceCheckUtils]: 10: Hoare triple {4951#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4947#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:15,433 INFO L290 TraceCheckUtils]: 9: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4951#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:15,438 INFO L290 TraceCheckUtils]: 8: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:15,438 INFO L290 TraceCheckUtils]: 7: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:15,456 INFO L290 TraceCheckUtils]: 6: Hoare triple {4965#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_322_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_322_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_322_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:15,457 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4965#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_322_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_322_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_322_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:30:15,457 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-15 06:30:15,458 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-15 06:30:15,458 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-15 06:30:15,458 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-15 06:30:15,458 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4888#true} is VALID [2022-04-15 06:30:15,458 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:15,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574798256] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:15,458 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:15,458 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:30:16,017 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:16,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [399926517] [2022-04-15 06:30:16,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [399926517] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:16,017 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:16,017 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-04-15 06:30:16,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979817911] [2022-04-15 06:30:16,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:16,018 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 53 [2022-04-15 06:30:16,018 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:16,018 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:16,050 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:16,050 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-15 06:30:16,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:16,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-15 06:30:16,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=501, Unknown=0, NotChecked=0, Total=600 [2022-04-15 06:30:16,051 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. Second operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:17,172 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2022-04-15 06:30:17,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-15 06:30:17,173 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 53 [2022-04-15 06:30:17,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:17,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-15 06:30:17,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-15 06:30:17,174 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 67 transitions. [2022-04-15 06:30:17,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:17,225 INFO L225 Difference]: With dead ends: 67 [2022-04-15 06:30:17,225 INFO L226 Difference]: Without dead ends: 59 [2022-04-15 06:30:17,225 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 29 SyntacticMatches, 29 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=197, Invalid=1285, Unknown=0, NotChecked=0, Total=1482 [2022-04-15 06:30:17,226 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 38 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 687 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 703 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 687 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:17,226 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 84 Invalid, 703 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 687 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:30:17,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-15 06:30:17,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 58. [2022-04-15 06:30:17,291 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:17,292 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,292 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,292 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:17,293 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2022-04-15 06:30:17,293 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2022-04-15 06:30:17,293 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:17,293 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:17,293 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-15 06:30:17,293 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-15 06:30:17,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:17,294 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2022-04-15 06:30:17,294 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2022-04-15 06:30:17,294 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:17,294 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:17,294 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:17,294 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:17,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2022-04-15 06:30:17,295 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 53 [2022-04-15 06:30:17,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:17,295 INFO L478 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2022-04-15 06:30:17,295 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:17,295 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 60 transitions. [2022-04-15 06:30:17,362 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:17,362 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2022-04-15 06:30:17,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-15 06:30:17,363 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:17,363 INFO L499 BasicCegarLoop]: trace histogram [15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:17,386 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:17,570 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-15 06:30:17,570 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:17,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:17,571 INFO L85 PathProgramCache]: Analyzing trace with hash 898944781, now seen corresponding path program 14 times [2022-04-15 06:30:17,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:17,571 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1601521008] [2022-04-15 06:30:18,662 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:19,980 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:19,981 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:19,987 INFO L85 PathProgramCache]: Analyzing trace with hash 1477785775, now seen corresponding path program 1 times [2022-04-15 06:30:19,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:19,987 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859210628] [2022-04-15 06:30:19,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:19,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:19,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:20,028 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:20,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:20,031 INFO L290 TraceCheckUtils]: 0: Hoare triple {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-15 06:30:20,031 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:20,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-15 06:30:20,032 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5400#(= main_~x~0 0)} is VALID [2022-04-15 06:30:20,033 INFO L290 TraceCheckUtils]: 6: Hoare triple {5400#(= main_~x~0 0)} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5400#(= main_~x~0 0)} is VALID [2022-04-15 06:30:20,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {5400#(= main_~x~0 0)} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5400#(= main_~x~0 0)} is VALID [2022-04-15 06:30:20,034 INFO L290 TraceCheckUtils]: 8: Hoare triple {5400#(= main_~x~0 0)} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5401#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:30:20,035 INFO L290 TraceCheckUtils]: 9: Hoare triple {5401#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5396#false} is VALID [2022-04-15 06:30:20,035 INFO L272 TraceCheckUtils]: 10: Hoare triple {5396#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5396#false} is VALID [2022-04-15 06:30:20,035 INFO L290 TraceCheckUtils]: 11: Hoare triple {5396#false} ~cond := #in~cond; {5396#false} is VALID [2022-04-15 06:30:20,035 INFO L290 TraceCheckUtils]: 12: Hoare triple {5396#false} assume 0 == ~cond; {5396#false} is VALID [2022-04-15 06:30:20,035 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-15 06:30:20,035 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:20,035 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:20,035 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859210628] [2022-04-15 06:30:20,036 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [859210628] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:20,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1347452483] [2022-04-15 06:30:20,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:20,036 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:20,036 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:20,037 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:20,038 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 06:30:20,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:20,063 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:20,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:20,071 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:20,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5395#true} is VALID [2022-04-15 06:30:20,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-15 06:30:20,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-15 06:30:20,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-15 06:30:20,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-15 06:30:20,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:20,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:20,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:20,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5431#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:30:20,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {5431#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5396#false} is VALID [2022-04-15 06:30:20,251 INFO L272 TraceCheckUtils]: 10: Hoare triple {5396#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5396#false} is VALID [2022-04-15 06:30:20,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {5396#false} ~cond := #in~cond; {5396#false} is VALID [2022-04-15 06:30:20,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {5396#false} assume 0 == ~cond; {5396#false} is VALID [2022-04-15 06:30:20,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-15 06:30:20,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:20,252 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:21,211 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-15 06:30:21,211 INFO L290 TraceCheckUtils]: 12: Hoare triple {5450#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {5396#false} is VALID [2022-04-15 06:30:21,212 INFO L290 TraceCheckUtils]: 11: Hoare triple {5454#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {5450#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:21,212 INFO L272 TraceCheckUtils]: 10: Hoare triple {5458#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5454#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:21,213 INFO L290 TraceCheckUtils]: 9: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5458#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:21,267 INFO L290 TraceCheckUtils]: 8: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:21,267 INFO L290 TraceCheckUtils]: 7: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:22,137 INFO L290 TraceCheckUtils]: 6: Hoare triple {5472#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_353_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_353_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_353_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:22,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5472#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_353_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_353_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_353_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} is VALID [2022-04-15 06:30:22,139 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-15 06:30:22,139 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-15 06:30:22,139 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-15 06:30:22,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-15 06:30:22,139 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5395#true} is VALID [2022-04-15 06:30:22,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:22,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1347452483] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:22,139 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:22,139 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:30:22,765 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:22,765 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1601521008] [2022-04-15 06:30:22,765 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1601521008] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:22,765 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:22,765 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-04-15 06:30:22,765 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847878864] [2022-04-15 06:30:22,765 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:22,765 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 56 [2022-04-15 06:30:22,766 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:22,766 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:22,800 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:22,800 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-15 06:30:22,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:22,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-15 06:30:22,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=546, Unknown=0, NotChecked=0, Total=650 [2022-04-15 06:30:22,801 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:24,002 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2022-04-15 06:30:24,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-15 06:30:24,002 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 56 [2022-04-15 06:30:24,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:24,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 70 transitions. [2022-04-15 06:30:24,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 70 transitions. [2022-04-15 06:30:24,004 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 70 transitions. [2022-04-15 06:30:24,051 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:24,052 INFO L225 Difference]: With dead ends: 70 [2022-04-15 06:30:24,052 INFO L226 Difference]: Without dead ends: 62 [2022-04-15 06:30:24,053 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 29 SyntacticMatches, 31 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=209, Invalid=1431, Unknown=0, NotChecked=0, Total=1640 [2022-04-15 06:30:24,053 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 40 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 781 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 798 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 781 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:24,053 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 89 Invalid, 798 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 781 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:30:24,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-04-15 06:30:24,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 61. [2022-04-15 06:30:24,121 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:24,121 INFO L82 GeneralOperation]: Start isEquivalent. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,121 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,122 INFO L87 Difference]: Start difference. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:24,122 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-04-15 06:30:24,122 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 64 transitions. [2022-04-15 06:30:24,123 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:24,123 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:24,123 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 62 states. [2022-04-15 06:30:24,123 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 62 states. [2022-04-15 06:30:24,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:24,124 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-04-15 06:30:24,124 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 64 transitions. [2022-04-15 06:30:24,124 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:24,124 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:24,124 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:24,124 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:24,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2022-04-15 06:30:24,125 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 56 [2022-04-15 06:30:24,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:24,125 INFO L478 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2022-04-15 06:30:24,125 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:24,125 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 63 transitions. [2022-04-15 06:30:24,205 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:24,206 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2022-04-15 06:30:24,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-04-15 06:30:24,206 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:24,206 INFO L499 BasicCegarLoop]: trace histogram [16, 16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:24,240 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:24,406 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:24,407 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:24,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:24,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1800740933, now seen corresponding path program 15 times [2022-04-15 06:30:24,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:24,407 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1140610456] [2022-04-15 06:30:27,468 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:27,717 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:29,905 WARN L970 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:30,113 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:30,114 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:30,117 INFO L85 PathProgramCache]: Analyzing trace with hash -767649361, now seen corresponding path program 1 times [2022-04-15 06:30:30,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:30,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299977478] [2022-04-15 06:30:30,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:30,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:30,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:30,163 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:30,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:30,166 INFO L290 TraceCheckUtils]: 0: Hoare triple {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-15 06:30:30,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-15 06:30:30,166 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-15 06:30:30,167 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:30,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-15 06:30:30,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-15 06:30:30,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-15 06:30:30,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-15 06:30:30,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,168 INFO L290 TraceCheckUtils]: 6: Hoare triple {5928#(= main_~x~0 0)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,168 INFO L290 TraceCheckUtils]: 7: Hoare triple {5928#(= main_~x~0 0)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,169 INFO L290 TraceCheckUtils]: 8: Hoare triple {5928#(= main_~x~0 0)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:30:30,170 INFO L290 TraceCheckUtils]: 9: Hoare triple {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-15 06:30:30,170 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-15 06:30:30,170 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-15 06:30:30,170 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-15 06:30:30,170 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-15 06:30:30,170 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:30,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:30,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299977478] [2022-04-15 06:30:30,170 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1299977478] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:30,171 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2097611291] [2022-04-15 06:30:30,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:30,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:30,171 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:30,172 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:30,172 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 06:30:30,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:30,197 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-15 06:30:30,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:30,205 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:30,456 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5923#true} is VALID [2022-04-15 06:30:30,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-15 06:30:30,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-15 06:30:30,456 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-15 06:30:30,456 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-15 06:30:30,456 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,457 INFO L290 TraceCheckUtils]: 6: Hoare triple {5928#(= main_~x~0 0)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,457 INFO L290 TraceCheckUtils]: 7: Hoare triple {5928#(= main_~x~0 0)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5928#(= main_~x~0 0)} is VALID [2022-04-15 06:30:30,458 INFO L290 TraceCheckUtils]: 8: Hoare triple {5928#(= main_~x~0 0)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:30:30,459 INFO L290 TraceCheckUtils]: 9: Hoare triple {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-15 06:30:30,459 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-15 06:30:30,459 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-15 06:30:30,459 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-15 06:30:30,459 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-15 06:30:30,459 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:30,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:31,153 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-15 06:30:31,153 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-15 06:30:31,153 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-15 06:30:31,153 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-15 06:30:31,153 INFO L290 TraceCheckUtils]: 9: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-15 06:30:31,155 INFO L290 TraceCheckUtils]: 8: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:30:31,155 INFO L290 TraceCheckUtils]: 7: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:30:31,156 INFO L290 TraceCheckUtils]: 6: Hoare triple {5995#(< (mod main_~x~0 4294967296) 500000)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:30:31,156 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5995#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-15 06:30:31,157 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-15 06:30:31,157 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-15 06:30:31,157 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-15 06:30:31,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-15 06:30:31,157 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5923#true} is VALID [2022-04-15 06:30:31,157 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:31,157 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2097611291] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:31,157 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:31,157 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 7 [2022-04-15 06:30:31,698 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:31,698 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1140610456] [2022-04-15 06:30:31,698 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1140610456] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:31,698 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:31,698 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-04-15 06:30:31,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761538246] [2022-04-15 06:30:31,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:31,698 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-15 06:30:31,699 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:31,699 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:31,735 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:31,735 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 06:30:31,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:31,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 06:30:31,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=371, Unknown=0, NotChecked=0, Total=462 [2022-04-15 06:30:31,736 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:32,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:32,960 INFO L93 Difference]: Finished difference Result 73 states and 77 transitions. [2022-04-15 06:30:32,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-15 06:30:32,960 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-15 06:30:32,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:32,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:32,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 73 transitions. [2022-04-15 06:30:32,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:32,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 73 transitions. [2022-04-15 06:30:32,963 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 73 transitions. [2022-04-15 06:30:33,014 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:33,017 INFO L225 Difference]: With dead ends: 73 [2022-04-15 06:30:33,017 INFO L226 Difference]: Without dead ends: 65 [2022-04-15 06:30:33,017 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 33 SyntacticMatches, 34 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 304 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=203, Invalid=1203, Unknown=0, NotChecked=0, Total=1406 [2022-04-15 06:30:33,017 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 42 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 881 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 881 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:33,018 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 94 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 881 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 06:30:33,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-04-15 06:30:33,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 64. [2022-04-15 06:30:33,098 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:33,098 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:33,098 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:33,098 INFO L87 Difference]: Start difference. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:33,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:33,099 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2022-04-15 06:30:33,099 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 67 transitions. [2022-04-15 06:30:33,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:33,100 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:33,100 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-15 06:30:33,100 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-15 06:30:33,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:33,100 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2022-04-15 06:30:33,101 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 67 transitions. [2022-04-15 06:30:33,101 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:33,101 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:33,101 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:33,101 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:33,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:33,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 66 transitions. [2022-04-15 06:30:33,102 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 66 transitions. Word has length 59 [2022-04-15 06:30:33,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:33,102 INFO L478 AbstractCegarLoop]: Abstraction has 64 states and 66 transitions. [2022-04-15 06:30:33,102 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:33,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 64 states and 66 transitions. [2022-04-15 06:30:33,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:33,175 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 66 transitions. [2022-04-15 06:30:33,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-04-15 06:30:33,176 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:33,176 INFO L499 BasicCegarLoop]: trace histogram [17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:33,192 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:33,376 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-15 06:30:33,376 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:33,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:33,377 INFO L85 PathProgramCache]: Analyzing trace with hash -2105498611, now seen corresponding path program 16 times [2022-04-15 06:30:33,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:33,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [719279183] [2022-04-15 06:30:36,589 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:36,842 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:37,838 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:37,839 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:37,842 INFO L85 PathProgramCache]: Analyzing trace with hash 1281882799, now seen corresponding path program 1 times [2022-04-15 06:30:37,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:37,842 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511213301] [2022-04-15 06:30:37,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:37,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:37,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:37,925 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:37,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:37,928 INFO L290 TraceCheckUtils]: 0: Hoare triple {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-15 06:30:37,928 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-15 06:30:37,929 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-15 06:30:37,929 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:37,929 INFO L290 TraceCheckUtils]: 1: Hoare triple {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-15 06:30:37,929 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-15 06:30:37,929 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-15 06:30:37,929 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-15 06:30:37,930 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:37,930 INFO L290 TraceCheckUtils]: 6: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:37,931 INFO L290 TraceCheckUtils]: 7: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:37,932 INFO L290 TraceCheckUtils]: 8: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6473#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:30:37,933 INFO L290 TraceCheckUtils]: 9: Hoare triple {6473#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6468#false} is VALID [2022-04-15 06:30:37,933 INFO L272 TraceCheckUtils]: 10: Hoare triple {6468#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6468#false} is VALID [2022-04-15 06:30:37,933 INFO L290 TraceCheckUtils]: 11: Hoare triple {6468#false} ~cond := #in~cond; {6468#false} is VALID [2022-04-15 06:30:37,933 INFO L290 TraceCheckUtils]: 12: Hoare triple {6468#false} assume 0 == ~cond; {6468#false} is VALID [2022-04-15 06:30:37,933 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-15 06:30:37,933 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:37,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:37,933 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511213301] [2022-04-15 06:30:37,933 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511213301] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:37,933 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [519536264] [2022-04-15 06:30:37,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:37,933 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:37,934 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:37,934 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:37,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 06:30:37,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:37,973 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:37,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:37,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:38,162 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6467#true} is VALID [2022-04-15 06:30:38,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-15 06:30:38,163 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-15 06:30:38,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-15 06:30:38,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-15 06:30:38,163 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:38,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:38,164 INFO L290 TraceCheckUtils]: 7: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:38,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6502#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:30:38,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {6502#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6468#false} is VALID [2022-04-15 06:30:38,166 INFO L272 TraceCheckUtils]: 10: Hoare triple {6468#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6468#false} is VALID [2022-04-15 06:30:38,166 INFO L290 TraceCheckUtils]: 11: Hoare triple {6468#false} ~cond := #in~cond; {6468#false} is VALID [2022-04-15 06:30:38,166 INFO L290 TraceCheckUtils]: 12: Hoare triple {6468#false} assume 0 == ~cond; {6468#false} is VALID [2022-04-15 06:30:38,166 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-15 06:30:38,167 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:38,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:39,105 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-15 06:30:39,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {6521#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {6468#false} is VALID [2022-04-15 06:30:39,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {6525#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {6521#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:39,107 INFO L272 TraceCheckUtils]: 10: Hoare triple {6529#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6525#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:39,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6529#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:39,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:39,109 INFO L290 TraceCheckUtils]: 7: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:39,144 INFO L290 TraceCheckUtils]: 6: Hoare triple {6543#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_418_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_418_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_418_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:39,145 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6543#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_418_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_418_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_418_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:30:39,145 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-15 06:30:39,145 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-15 06:30:39,145 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-15 06:30:39,145 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-15 06:30:39,145 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6467#true} is VALID [2022-04-15 06:30:39,146 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:39,146 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [519536264] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:39,146 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:39,146 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:30:40,206 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:40,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [719279183] [2022-04-15 06:30:40,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [719279183] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:40,206 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:40,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [36] imperfect sequences [] total 36 [2022-04-15 06:30:40,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682234046] [2022-04-15 06:30:40,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:40,207 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 62 [2022-04-15 06:30:40,207 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:40,207 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:40,248 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:40,248 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-15 06:30:40,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:40,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-15 06:30:40,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=236, Invalid=1570, Unknown=0, NotChecked=0, Total=1806 [2022-04-15 06:30:40,249 INFO L87 Difference]: Start difference. First operand 64 states and 66 transitions. Second operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:42,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:42,957 INFO L93 Difference]: Finished difference Result 75 states and 79 transitions. [2022-04-15 06:30:42,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-15 06:30:42,957 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 62 [2022-04-15 06:30:42,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:42,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:42,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 75 transitions. [2022-04-15 06:30:42,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:42,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 75 transitions. [2022-04-15 06:30:42,959 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 75 transitions. [2022-04-15 06:30:43,015 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:43,016 INFO L225 Difference]: With dead ends: 75 [2022-04-15 06:30:43,016 INFO L226 Difference]: Without dead ends: 67 [2022-04-15 06:30:43,017 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 31 SyntacticMatches, 19 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1196 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=516, Invalid=5184, Unknown=0, NotChecked=0, Total=5700 [2022-04-15 06:30:43,017 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 26 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 1882 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 1917 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 1882 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:43,017 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 179 Invalid, 1917 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 1882 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-15 06:30:43,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-15 06:30:43,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-04-15 06:30:43,087 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:43,087 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:43,087 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:43,087 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:43,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:43,088 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2022-04-15 06:30:43,088 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-15 06:30:43,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:43,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:43,088 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-15 06:30:43,088 INFO L87 Difference]: Start difference. First operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-15 06:30:43,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:43,089 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2022-04-15 06:30:43,089 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-15 06:30:43,089 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:43,089 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:43,089 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:43,090 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:43,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:43,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 69 transitions. [2022-04-15 06:30:43,090 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 69 transitions. Word has length 62 [2022-04-15 06:30:43,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:43,090 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 69 transitions. [2022-04-15 06:30:43,091 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:43,091 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 67 states and 69 transitions. [2022-04-15 06:30:43,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:43,175 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-15 06:30:43,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-04-15 06:30:43,175 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:43,175 INFO L499 BasicCegarLoop]: trace histogram [18, 18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:43,191 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:43,375 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:43,376 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:43,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:43,376 INFO L85 PathProgramCache]: Analyzing trace with hash -748868795, now seen corresponding path program 17 times [2022-04-15 06:30:43,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:43,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1752690697] [2022-04-15 06:30:45,163 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:45,423 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:47,618 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:47,777 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:47,778 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:47,781 INFO L85 PathProgramCache]: Analyzing trace with hash -963552337, now seen corresponding path program 1 times [2022-04-15 06:30:47,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:47,781 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736824083] [2022-04-15 06:30:47,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:47,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:47,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:47,833 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:47,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:47,836 INFO L290 TraceCheckUtils]: 0: Hoare triple {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-15 06:30:47,836 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-15 06:30:47,836 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-15 06:30:47,837 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:47,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-15 06:30:47,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-15 06:30:47,837 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-15 06:30:47,837 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-15 06:30:47,837 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7085#(= main_~x~0 0)} is VALID [2022-04-15 06:30:47,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {7085#(= main_~x~0 0)} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7085#(= main_~x~0 0)} is VALID [2022-04-15 06:30:47,838 INFO L290 TraceCheckUtils]: 7: Hoare triple {7085#(= main_~x~0 0)} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7085#(= main_~x~0 0)} is VALID [2022-04-15 06:30:47,839 INFO L290 TraceCheckUtils]: 8: Hoare triple {7085#(= main_~x~0 0)} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7086#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:30:47,840 INFO L290 TraceCheckUtils]: 9: Hoare triple {7086#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7081#false} is VALID [2022-04-15 06:30:47,840 INFO L272 TraceCheckUtils]: 10: Hoare triple {7081#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2022-04-15 06:30:47,840 INFO L290 TraceCheckUtils]: 11: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2022-04-15 06:30:47,840 INFO L290 TraceCheckUtils]: 12: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2022-04-15 06:30:47,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-15 06:30:47,840 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:47,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:47,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736824083] [2022-04-15 06:30:47,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [736824083] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:47,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1041049257] [2022-04-15 06:30:47,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:47,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:47,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:47,842 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:47,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 06:30:47,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:47,868 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:47,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:47,876 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:48,064 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2022-04-15 06:30:48,064 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-15 06:30:48,064 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-15 06:30:48,065 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-15 06:30:48,065 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-15 06:30:48,065 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:48,066 INFO L290 TraceCheckUtils]: 6: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:48,066 INFO L290 TraceCheckUtils]: 7: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:48,067 INFO L290 TraceCheckUtils]: 8: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7116#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:30:48,068 INFO L290 TraceCheckUtils]: 9: Hoare triple {7116#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7081#false} is VALID [2022-04-15 06:30:48,068 INFO L272 TraceCheckUtils]: 10: Hoare triple {7081#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2022-04-15 06:30:48,068 INFO L290 TraceCheckUtils]: 11: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2022-04-15 06:30:48,068 INFO L290 TraceCheckUtils]: 12: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2022-04-15 06:30:48,068 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-15 06:30:48,068 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:48,068 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:48,974 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-15 06:30:48,974 INFO L290 TraceCheckUtils]: 12: Hoare triple {7135#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {7081#false} is VALID [2022-04-15 06:30:48,974 INFO L290 TraceCheckUtils]: 11: Hoare triple {7139#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {7135#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:48,975 INFO L272 TraceCheckUtils]: 10: Hoare triple {7143#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7139#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:48,975 INFO L290 TraceCheckUtils]: 9: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7143#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:48,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:48,979 INFO L290 TraceCheckUtils]: 7: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:49,013 INFO L290 TraceCheckUtils]: 6: Hoare triple {7157#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_452_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_452_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_452_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:49,014 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7157#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_452_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_452_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_452_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:30:49,014 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-15 06:30:49,014 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-15 06:30:49,015 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-15 06:30:49,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-15 06:30:49,015 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2022-04-15 06:30:49,015 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:49,015 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1041049257] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:30:49,015 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:30:49,015 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:30:49,791 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:30:49,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1752690697] [2022-04-15 06:30:49,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1752690697] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:30:49,791 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:30:49,791 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-04-15 06:30:49,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542609333] [2022-04-15 06:30:49,791 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:30:49,793 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 65 [2022-04-15 06:30:49,793 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:30:49,793 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:49,839 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:49,839 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-15 06:30:49,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:49,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-15 06:30:49,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=693, Unknown=0, NotChecked=0, Total=812 [2022-04-15 06:30:49,840 INFO L87 Difference]: Start difference. First operand 67 states and 69 transitions. Second operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:51,530 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2022-04-15 06:30:51,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-15 06:30:51,531 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 65 [2022-04-15 06:30:51,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:30:51,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 79 transitions. [2022-04-15 06:30:51,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 79 transitions. [2022-04-15 06:30:51,532 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 79 transitions. [2022-04-15 06:30:51,599 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:51,600 INFO L225 Difference]: With dead ends: 79 [2022-04-15 06:30:51,600 INFO L226 Difference]: Without dead ends: 71 [2022-04-15 06:30:51,600 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 28 SyntacticMatches, 38 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 507 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=245, Invalid=1917, Unknown=0, NotChecked=0, Total=2162 [2022-04-15 06:30:51,601 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1099 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 104 SdHoareTripleChecker+Invalid, 1119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 1099 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-15 06:30:51,601 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 104 Invalid, 1119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 1099 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-15 06:30:51,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-04-15 06:30:51,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 70. [2022-04-15 06:30:51,691 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:30:51,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,691 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,691 INFO L87 Difference]: Start difference. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:51,693 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-15 06:30:51,693 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 73 transitions. [2022-04-15 06:30:51,693 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:51,693 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:51,693 INFO L74 IsIncluded]: Start isIncluded. First operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 71 states. [2022-04-15 06:30:51,693 INFO L87 Difference]: Start difference. First operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 71 states. [2022-04-15 06:30:51,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:30:51,694 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-15 06:30:51,694 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 73 transitions. [2022-04-15 06:30:51,695 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:30:51,695 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:30:51,695 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:30:51,695 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:30:51,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 72 transitions. [2022-04-15 06:30:51,696 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 72 transitions. Word has length 65 [2022-04-15 06:30:51,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:30:51,696 INFO L478 AbstractCegarLoop]: Abstraction has 70 states and 72 transitions. [2022-04-15 06:30:51,696 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:30:51,697 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 70 states and 72 transitions. [2022-04-15 06:30:51,783 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:30:51,783 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 72 transitions. [2022-04-15 06:30:51,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-15 06:30:51,783 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:30:51,783 INFO L499 BasicCegarLoop]: trace histogram [19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:30:51,802 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-15 06:30:51,999 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:51,999 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:30:52,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:30:52,000 INFO L85 PathProgramCache]: Analyzing trace with hash -1032275699, now seen corresponding path program 18 times [2022-04-15 06:30:52,000 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:30:52,000 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [280387443] [2022-04-15 06:30:56,107 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:30:56,320 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:58,705 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:30:58,708 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:30:58,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1085979823, now seen corresponding path program 1 times [2022-04-15 06:30:58,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:30:58,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211544392] [2022-04-15 06:30:58,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:58,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:30:58,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:58,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:30:58,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:58,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-15 06:30:58,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-15 06:30:58,770 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-15 06:30:58,771 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:30:58,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-15 06:30:58,771 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-15 06:30:58,771 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-15 06:30:58,771 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-15 06:30:58,771 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7676#(= main_~x~0 0)} is VALID [2022-04-15 06:30:58,772 INFO L290 TraceCheckUtils]: 6: Hoare triple {7676#(= main_~x~0 0)} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7676#(= main_~x~0 0)} is VALID [2022-04-15 06:30:58,773 INFO L290 TraceCheckUtils]: 7: Hoare triple {7676#(= main_~x~0 0)} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7676#(= main_~x~0 0)} is VALID [2022-04-15 06:30:58,774 INFO L290 TraceCheckUtils]: 8: Hoare triple {7676#(= main_~x~0 0)} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7677#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:30:58,774 INFO L290 TraceCheckUtils]: 9: Hoare triple {7677#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7672#false} is VALID [2022-04-15 06:30:58,774 INFO L272 TraceCheckUtils]: 10: Hoare triple {7672#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7672#false} is VALID [2022-04-15 06:30:58,774 INFO L290 TraceCheckUtils]: 11: Hoare triple {7672#false} ~cond := #in~cond; {7672#false} is VALID [2022-04-15 06:30:58,774 INFO L290 TraceCheckUtils]: 12: Hoare triple {7672#false} assume 0 == ~cond; {7672#false} is VALID [2022-04-15 06:30:58,774 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-15 06:30:58,774 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:58,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:30:58,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211544392] [2022-04-15 06:30:58,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211544392] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:30:58,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1813571716] [2022-04-15 06:30:58,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:30:58,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:30:58,775 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:30:58,776 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:30:58,777 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-15 06:30:58,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:58,802 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:30:58,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:30:58,810 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:30:59,001 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7671#true} is VALID [2022-04-15 06:30:59,002 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-15 06:30:59,002 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-15 06:30:59,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-15 06:30:59,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-15 06:30:59,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:59,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:59,003 INFO L290 TraceCheckUtils]: 7: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:30:59,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7707#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:30:59,005 INFO L290 TraceCheckUtils]: 9: Hoare triple {7707#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7672#false} is VALID [2022-04-15 06:30:59,005 INFO L272 TraceCheckUtils]: 10: Hoare triple {7672#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7672#false} is VALID [2022-04-15 06:30:59,005 INFO L290 TraceCheckUtils]: 11: Hoare triple {7672#false} ~cond := #in~cond; {7672#false} is VALID [2022-04-15 06:30:59,005 INFO L290 TraceCheckUtils]: 12: Hoare triple {7672#false} assume 0 == ~cond; {7672#false} is VALID [2022-04-15 06:30:59,005 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-15 06:30:59,005 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:30:59,005 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:30:59,920 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-15 06:30:59,920 INFO L290 TraceCheckUtils]: 12: Hoare triple {7726#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {7672#false} is VALID [2022-04-15 06:30:59,921 INFO L290 TraceCheckUtils]: 11: Hoare triple {7730#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {7726#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:30:59,921 INFO L272 TraceCheckUtils]: 10: Hoare triple {7734#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7730#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:30:59,922 INFO L290 TraceCheckUtils]: 9: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7734#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:30:59,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:30:59,924 INFO L290 TraceCheckUtils]: 7: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:00,064 INFO L290 TraceCheckUtils]: 6: Hoare triple {7748#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_487_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_487_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_487_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:00,065 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7748#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_487_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_487_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_487_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:00,065 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-15 06:31:00,065 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-15 06:31:00,066 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-15 06:31:00,066 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-15 06:31:00,066 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7671#true} is VALID [2022-04-15 06:31:00,066 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:00,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1813571716] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:00,066 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:00,066 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:00,841 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:00,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [280387443] [2022-04-15 06:31:00,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [280387443] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:00,841 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:00,841 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2022-04-15 06:31:00,841 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122992377] [2022-04-15 06:31:00,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:00,841 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 68 [2022-04-15 06:31:00,842 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:00,842 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:00,882 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:00,883 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-15 06:31:00,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:00,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-15 06:31:00,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=746, Unknown=0, NotChecked=0, Total=870 [2022-04-15 06:31:00,883 INFO L87 Difference]: Start difference. First operand 70 states and 72 transitions. Second operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:02,584 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2022-04-15 06:31:02,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-15 06:31:02,584 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 68 [2022-04-15 06:31:02,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:02,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-15 06:31:02,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-15 06:31:02,585 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 82 transitions. [2022-04-15 06:31:02,651 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:02,663 INFO L225 Difference]: With dead ends: 82 [2022-04-15 06:31:02,663 INFO L226 Difference]: Without dead ends: 74 [2022-04-15 06:31:02,664 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 29 SyntacticMatches, 39 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=257, Invalid=2095, Unknown=0, NotChecked=0, Total=2352 [2022-04-15 06:31:02,664 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 48 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 1217 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 1217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:02,664 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 109 Invalid, 1238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 1217 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-15 06:31:02,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2022-04-15 06:31:02,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 73. [2022-04-15 06:31:02,743 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:02,743 INFO L82 GeneralOperation]: Start isEquivalent. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,743 INFO L74 IsIncluded]: Start isIncluded. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,743 INFO L87 Difference]: Start difference. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:02,744 INFO L93 Difference]: Finished difference Result 74 states and 76 transitions. [2022-04-15 06:31:02,744 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2022-04-15 06:31:02,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:02,744 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:02,745 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 74 states. [2022-04-15 06:31:02,745 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 74 states. [2022-04-15 06:31:02,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:02,745 INFO L93 Difference]: Finished difference Result 74 states and 76 transitions. [2022-04-15 06:31:02,745 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2022-04-15 06:31:02,746 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:02,746 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:02,746 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:02,746 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:02,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 75 transitions. [2022-04-15 06:31:02,747 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 75 transitions. Word has length 68 [2022-04-15 06:31:02,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:02,747 INFO L478 AbstractCegarLoop]: Abstraction has 73 states and 75 transitions. [2022-04-15 06:31:02,747 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:02,747 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 73 states and 75 transitions. [2022-04-15 06:31:02,846 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:02,846 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 75 transitions. [2022-04-15 06:31:02,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-04-15 06:31:02,851 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:02,851 INFO L499 BasicCegarLoop]: trace histogram [20, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:02,867 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-04-15 06:31:03,067 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:03,068 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:03,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:03,068 INFO L85 PathProgramCache]: Analyzing trace with hash -101648827, now seen corresponding path program 19 times [2022-04-15 06:31:03,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:03,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1821601747] [2022-04-15 06:31:04,745 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:05,131 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:05,132 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:05,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1159455313, now seen corresponding path program 1 times [2022-04-15 06:31:05,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:05,135 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103709739] [2022-04-15 06:31:05,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:05,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:05,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:05,189 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:05,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:05,194 INFO L290 TraceCheckUtils]: 0: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-15 06:31:05,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-15 06:31:05,195 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-15 06:31:05,195 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:05,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-15 06:31:05,195 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-15 06:31:05,195 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-15 06:31:05,196 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-15 06:31:05,196 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8288#(= main_~x~0 0)} is VALID [2022-04-15 06:31:05,196 INFO L290 TraceCheckUtils]: 6: Hoare triple {8288#(= main_~x~0 0)} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8288#(= main_~x~0 0)} is VALID [2022-04-15 06:31:05,197 INFO L290 TraceCheckUtils]: 7: Hoare triple {8288#(= main_~x~0 0)} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8288#(= main_~x~0 0)} is VALID [2022-04-15 06:31:05,198 INFO L290 TraceCheckUtils]: 8: Hoare triple {8288#(= main_~x~0 0)} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8289#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:31:05,198 INFO L290 TraceCheckUtils]: 9: Hoare triple {8289#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8284#false} is VALID [2022-04-15 06:31:05,198 INFO L272 TraceCheckUtils]: 10: Hoare triple {8284#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8284#false} is VALID [2022-04-15 06:31:05,198 INFO L290 TraceCheckUtils]: 11: Hoare triple {8284#false} ~cond := #in~cond; {8284#false} is VALID [2022-04-15 06:31:05,198 INFO L290 TraceCheckUtils]: 12: Hoare triple {8284#false} assume 0 == ~cond; {8284#false} is VALID [2022-04-15 06:31:05,199 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-15 06:31:05,199 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:05,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:05,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103709739] [2022-04-15 06:31:05,199 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103709739] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:05,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [822452884] [2022-04-15 06:31:05,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:05,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:05,199 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:05,200 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:05,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-15 06:31:05,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:05,239 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:05,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:05,259 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:05,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8283#true} is VALID [2022-04-15 06:31:05,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-15 06:31:05,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-15 06:31:05,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-15 06:31:05,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-15 06:31:05,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:05,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:05,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:05,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8319#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:31:05,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {8319#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8284#false} is VALID [2022-04-15 06:31:05,447 INFO L272 TraceCheckUtils]: 10: Hoare triple {8284#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8284#false} is VALID [2022-04-15 06:31:05,447 INFO L290 TraceCheckUtils]: 11: Hoare triple {8284#false} ~cond := #in~cond; {8284#false} is VALID [2022-04-15 06:31:05,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {8284#false} assume 0 == ~cond; {8284#false} is VALID [2022-04-15 06:31:05,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-15 06:31:05,448 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:05,448 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:06,363 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-15 06:31:06,363 INFO L290 TraceCheckUtils]: 12: Hoare triple {8338#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {8284#false} is VALID [2022-04-15 06:31:06,363 INFO L290 TraceCheckUtils]: 11: Hoare triple {8342#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {8338#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:06,364 INFO L272 TraceCheckUtils]: 10: Hoare triple {8346#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8342#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:06,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8346#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:06,366 INFO L290 TraceCheckUtils]: 8: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:06,366 INFO L290 TraceCheckUtils]: 7: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:06,913 INFO L290 TraceCheckUtils]: 6: Hoare triple {8360#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_523_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_523_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_523_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:06,914 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8360#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_523_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_523_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_523_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:06,914 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-15 06:31:06,914 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-15 06:31:06,914 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-15 06:31:06,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-15 06:31:06,914 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8283#true} is VALID [2022-04-15 06:31:06,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:06,914 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [822452884] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:06,914 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:06,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:07,800 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:07,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1821601747] [2022-04-15 06:31:07,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1821601747] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:07,801 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:07,801 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-04-15 06:31:07,801 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528477031] [2022-04-15 06:31:07,801 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:07,801 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-15 06:31:07,802 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:07,802 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:07,860 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:07,860 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 06:31:07,860 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:07,861 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 06:31:07,861 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=801, Unknown=0, NotChecked=0, Total=930 [2022-04-15 06:31:07,861 INFO L87 Difference]: Start difference. First operand 73 states and 75 transitions. Second operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:09,723 INFO L93 Difference]: Finished difference Result 85 states and 89 transitions. [2022-04-15 06:31:09,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-15 06:31:09,723 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-15 06:31:09,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:09,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2022-04-15 06:31:09,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2022-04-15 06:31:09,725 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 85 transitions. [2022-04-15 06:31:09,787 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:09,787 INFO L225 Difference]: With dead ends: 85 [2022-04-15 06:31:09,787 INFO L226 Difference]: Without dead ends: 77 [2022-04-15 06:31:09,788 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 28 SyntacticMatches, 42 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 582 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=269, Invalid=2281, Unknown=0, NotChecked=0, Total=2550 [2022-04-15 06:31:09,788 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 50 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 1341 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 114 SdHoareTripleChecker+Invalid, 1363 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1341 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:09,789 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [50 Valid, 114 Invalid, 1363 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1341 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-15 06:31:09,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-15 06:31:09,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 76. [2022-04-15 06:31:09,889 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:09,890 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,890 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,890 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:09,891 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2022-04-15 06:31:09,891 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 79 transitions. [2022-04-15 06:31:09,891 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:09,891 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:09,891 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-15 06:31:09,891 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-15 06:31:09,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:09,892 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2022-04-15 06:31:09,892 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 79 transitions. [2022-04-15 06:31:09,892 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:09,892 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:09,892 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:09,892 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:09,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 78 transitions. [2022-04-15 06:31:09,893 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 78 transitions. Word has length 71 [2022-04-15 06:31:09,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:09,894 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 78 transitions. [2022-04-15 06:31:09,894 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:09,894 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 78 transitions. [2022-04-15 06:31:09,984 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:09,984 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 78 transitions. [2022-04-15 06:31:09,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-15 06:31:09,985 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:09,985 INFO L499 BasicCegarLoop]: trace histogram [21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:10,001 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:10,185 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:10,185 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:10,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:10,186 INFO L85 PathProgramCache]: Analyzing trace with hash 189599245, now seen corresponding path program 20 times [2022-04-15 06:31:10,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:10,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1991092577] [2022-04-15 06:31:15,090 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:31:15,382 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:19,889 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:31:20,072 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:20,073 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:20,076 INFO L85 PathProgramCache]: Analyzing trace with hash 890076847, now seen corresponding path program 1 times [2022-04-15 06:31:20,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:20,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156162541] [2022-04-15 06:31:20,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:20,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:20,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:20,134 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:20,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:20,137 INFO L290 TraceCheckUtils]: 0: Hoare triple {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-15 06:31:20,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-15 06:31:20,137 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-15 06:31:20,137 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:20,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-15 06:31:20,137 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-15 06:31:20,138 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-15 06:31:20,138 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-15 06:31:20,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8921#(= main_~x~0 0)} is VALID [2022-04-15 06:31:20,138 INFO L290 TraceCheckUtils]: 6: Hoare triple {8921#(= main_~x~0 0)} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8921#(= main_~x~0 0)} is VALID [2022-04-15 06:31:20,139 INFO L290 TraceCheckUtils]: 7: Hoare triple {8921#(= main_~x~0 0)} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#(= main_~x~0 0)} is VALID [2022-04-15 06:31:20,140 INFO L290 TraceCheckUtils]: 8: Hoare triple {8921#(= main_~x~0 0)} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8922#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:31:20,140 INFO L290 TraceCheckUtils]: 9: Hoare triple {8922#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8917#false} is VALID [2022-04-15 06:31:20,140 INFO L272 TraceCheckUtils]: 10: Hoare triple {8917#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8917#false} is VALID [2022-04-15 06:31:20,140 INFO L290 TraceCheckUtils]: 11: Hoare triple {8917#false} ~cond := #in~cond; {8917#false} is VALID [2022-04-15 06:31:20,140 INFO L290 TraceCheckUtils]: 12: Hoare triple {8917#false} assume 0 == ~cond; {8917#false} is VALID [2022-04-15 06:31:20,140 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-15 06:31:20,141 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:20,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:20,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156162541] [2022-04-15 06:31:20,141 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156162541] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:20,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [26806027] [2022-04-15 06:31:20,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:20,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:20,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:20,142 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:20,143 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-15 06:31:20,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:20,171 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:20,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:20,179 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:20,351 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8916#true} is VALID [2022-04-15 06:31:20,351 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-15 06:31:20,351 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-15 06:31:20,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-15 06:31:20,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-15 06:31:20,352 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:20,353 INFO L290 TraceCheckUtils]: 6: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:20,353 INFO L290 TraceCheckUtils]: 7: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:20,354 INFO L290 TraceCheckUtils]: 8: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8952#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:31:20,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {8952#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8917#false} is VALID [2022-04-15 06:31:20,355 INFO L272 TraceCheckUtils]: 10: Hoare triple {8917#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8917#false} is VALID [2022-04-15 06:31:20,355 INFO L290 TraceCheckUtils]: 11: Hoare triple {8917#false} ~cond := #in~cond; {8917#false} is VALID [2022-04-15 06:31:20,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {8917#false} assume 0 == ~cond; {8917#false} is VALID [2022-04-15 06:31:20,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-15 06:31:20,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:20,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:21,381 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-15 06:31:21,382 INFO L290 TraceCheckUtils]: 12: Hoare triple {8971#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {8917#false} is VALID [2022-04-15 06:31:21,382 INFO L290 TraceCheckUtils]: 11: Hoare triple {8975#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {8971#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:21,383 INFO L272 TraceCheckUtils]: 10: Hoare triple {8979#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8975#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:21,383 INFO L290 TraceCheckUtils]: 9: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8979#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:21,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:21,389 INFO L290 TraceCheckUtils]: 7: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:21,480 INFO L290 TraceCheckUtils]: 6: Hoare triple {8993#(and (or (forall ((aux_div_v_main_~y~0_560_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_560_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_560_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:21,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8993#(and (or (forall ((aux_div_v_main_~y~0_560_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_560_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_560_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:21,492 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-15 06:31:21,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-15 06:31:21,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-15 06:31:21,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-15 06:31:21,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8916#true} is VALID [2022-04-15 06:31:21,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:21,493 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [26806027] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:21,493 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:21,493 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:22,434 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:22,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1991092577] [2022-04-15 06:31:22,435 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1991092577] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:22,435 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:22,435 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2022-04-15 06:31:22,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029420473] [2022-04-15 06:31:22,435 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:22,435 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 74 [2022-04-15 06:31:22,435 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:22,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:22,481 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:22,481 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-15 06:31:22,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:22,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-15 06:31:22,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=858, Unknown=0, NotChecked=0, Total=992 [2022-04-15 06:31:22,482 INFO L87 Difference]: Start difference. First operand 76 states and 78 transitions. Second operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:24,505 INFO L93 Difference]: Finished difference Result 88 states and 92 transitions. [2022-04-15 06:31:24,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-15 06:31:24,505 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 74 [2022-04-15 06:31:24,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:24,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 88 transitions. [2022-04-15 06:31:24,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 88 transitions. [2022-04-15 06:31:24,507 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 88 transitions. [2022-04-15 06:31:24,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:24,695 INFO L225 Difference]: With dead ends: 88 [2022-04-15 06:31:24,695 INFO L226 Difference]: Without dead ends: 80 [2022-04-15 06:31:24,696 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 28 SyntacticMatches, 44 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=281, Invalid=2475, Unknown=0, NotChecked=0, Total=2756 [2022-04-15 06:31:24,696 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 52 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1471 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 1494 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 1471 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:24,696 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [52 Valid, 119 Invalid, 1494 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 1471 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-15 06:31:24,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-04-15 06:31:24,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2022-04-15 06:31:24,784 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:24,784 INFO L82 GeneralOperation]: Start isEquivalent. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,785 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,785 INFO L87 Difference]: Start difference. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:24,786 INFO L93 Difference]: Finished difference Result 80 states and 82 transitions. [2022-04-15 06:31:24,786 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-15 06:31:24,786 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:24,786 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:24,786 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-15 06:31:24,786 INFO L87 Difference]: Start difference. First operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-15 06:31:24,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:24,787 INFO L93 Difference]: Finished difference Result 80 states and 82 transitions. [2022-04-15 06:31:24,787 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-15 06:31:24,787 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:24,787 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:24,787 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:24,787 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:24,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 81 transitions. [2022-04-15 06:31:24,788 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 81 transitions. Word has length 74 [2022-04-15 06:31:24,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:24,788 INFO L478 AbstractCegarLoop]: Abstraction has 79 states and 81 transitions. [2022-04-15 06:31:24,788 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:24,788 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 79 states and 81 transitions. [2022-04-15 06:31:24,890 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:24,890 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 81 transitions. [2022-04-15 06:31:24,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-04-15 06:31:24,891 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:24,891 INFO L499 BasicCegarLoop]: trace histogram [22, 22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:24,931 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:25,091 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-15 06:31:25,092 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:25,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:25,092 INFO L85 PathProgramCache]: Analyzing trace with hash 926974277, now seen corresponding path program 21 times [2022-04-15 06:31:25,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:25,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1649804894] [2022-04-15 06:31:25,716 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:29,195 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:31:29,386 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:29,388 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:29,390 INFO L85 PathProgramCache]: Analyzing trace with hash -1355358289, now seen corresponding path program 1 times [2022-04-15 06:31:29,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:29,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815578800] [2022-04-15 06:31:29,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:29,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:29,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:29,452 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:29,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:29,456 INFO L290 TraceCheckUtils]: 0: Hoare triple {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-15 06:31:29,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-15 06:31:29,456 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-15 06:31:29,457 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:29,457 INFO L290 TraceCheckUtils]: 1: Hoare triple {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-15 06:31:29,457 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-15 06:31:29,457 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-15 06:31:29,457 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-15 06:31:29,457 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9575#(= main_~x~0 0)} is VALID [2022-04-15 06:31:29,458 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#(= main_~x~0 0)} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9575#(= main_~x~0 0)} is VALID [2022-04-15 06:31:29,458 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#(= main_~x~0 0)} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#(= main_~x~0 0)} is VALID [2022-04-15 06:31:29,459 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#(= main_~x~0 0)} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9576#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:31:29,460 INFO L290 TraceCheckUtils]: 9: Hoare triple {9576#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9571#false} is VALID [2022-04-15 06:31:29,460 INFO L272 TraceCheckUtils]: 10: Hoare triple {9571#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9571#false} is VALID [2022-04-15 06:31:29,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {9571#false} ~cond := #in~cond; {9571#false} is VALID [2022-04-15 06:31:29,460 INFO L290 TraceCheckUtils]: 12: Hoare triple {9571#false} assume 0 == ~cond; {9571#false} is VALID [2022-04-15 06:31:29,460 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-15 06:31:29,460 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:29,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:29,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815578800] [2022-04-15 06:31:29,460 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815578800] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:29,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099567959] [2022-04-15 06:31:29,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:29,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:29,461 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:29,461 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:29,462 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-15 06:31:29,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:29,487 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:29,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:29,495 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:29,684 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9570#true} is VALID [2022-04-15 06:31:29,684 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-15 06:31:29,684 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-15 06:31:29,684 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-15 06:31:29,684 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-15 06:31:29,685 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:29,685 INFO L290 TraceCheckUtils]: 6: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:29,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:29,686 INFO L290 TraceCheckUtils]: 8: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9606#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:31:29,688 INFO L290 TraceCheckUtils]: 9: Hoare triple {9606#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9571#false} is VALID [2022-04-15 06:31:29,688 INFO L272 TraceCheckUtils]: 10: Hoare triple {9571#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9571#false} is VALID [2022-04-15 06:31:29,688 INFO L290 TraceCheckUtils]: 11: Hoare triple {9571#false} ~cond := #in~cond; {9571#false} is VALID [2022-04-15 06:31:29,688 INFO L290 TraceCheckUtils]: 12: Hoare triple {9571#false} assume 0 == ~cond; {9571#false} is VALID [2022-04-15 06:31:29,688 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-15 06:31:29,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:29,688 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:30,482 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-15 06:31:30,483 INFO L290 TraceCheckUtils]: 12: Hoare triple {9625#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {9571#false} is VALID [2022-04-15 06:31:30,483 INFO L290 TraceCheckUtils]: 11: Hoare triple {9629#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {9625#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:30,483 INFO L272 TraceCheckUtils]: 10: Hoare triple {9633#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9629#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:30,484 INFO L290 TraceCheckUtils]: 9: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9633#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:30,486 INFO L290 TraceCheckUtils]: 8: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:30,486 INFO L290 TraceCheckUtils]: 7: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:30,490 INFO L290 TraceCheckUtils]: 6: Hoare triple {9647#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_598_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_598_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_598_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:30,491 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9647#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_598_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_598_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_598_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:30,491 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-15 06:31:30,491 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-15 06:31:30,491 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-15 06:31:30,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-15 06:31:30,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9570#true} is VALID [2022-04-15 06:31:30,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:30,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099567959] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:30,492 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:30,492 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:31,479 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:31,479 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1649804894] [2022-04-15 06:31:31,479 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1649804894] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:31,479 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:31,479 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2022-04-15 06:31:31,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202621094] [2022-04-15 06:31:31,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:31,479 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 77 [2022-04-15 06:31:31,480 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:31,480 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:31,527 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:31,527 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-15 06:31:31,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:31,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-15 06:31:31,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2022-04-15 06:31:31,528 INFO L87 Difference]: Start difference. First operand 79 states and 81 transitions. Second operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:33,748 INFO L93 Difference]: Finished difference Result 91 states and 95 transitions. [2022-04-15 06:31:33,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-15 06:31:33,748 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 77 [2022-04-15 06:31:33,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:33,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 91 transitions. [2022-04-15 06:31:33,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 91 transitions. [2022-04-15 06:31:33,764 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 91 transitions. [2022-04-15 06:31:33,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:33,849 INFO L225 Difference]: With dead ends: 91 [2022-04-15 06:31:33,849 INFO L226 Difference]: Without dead ends: 83 [2022-04-15 06:31:33,850 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 29 SyntacticMatches, 45 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 661 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=293, Invalid=2677, Unknown=0, NotChecked=0, Total=2970 [2022-04-15 06:31:33,850 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 54 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 1607 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 1631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 1607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:33,850 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [54 Valid, 124 Invalid, 1631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 1607 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-15 06:31:33,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-15 06:31:33,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2022-04-15 06:31:33,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:33,968 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,968 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,969 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:33,970 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2022-04-15 06:31:33,970 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 85 transitions. [2022-04-15 06:31:33,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:33,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:33,971 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-15 06:31:33,971 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-15 06:31:33,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:33,972 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2022-04-15 06:31:33,972 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 85 transitions. [2022-04-15 06:31:33,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:33,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:33,972 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:33,973 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:33,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 84 transitions. [2022-04-15 06:31:33,974 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 84 transitions. Word has length 77 [2022-04-15 06:31:33,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:33,974 INFO L478 AbstractCegarLoop]: Abstraction has 82 states and 84 transitions. [2022-04-15 06:31:33,974 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:33,974 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 82 states and 84 transitions. [2022-04-15 06:31:34,081 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:34,081 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 84 transitions. [2022-04-15 06:31:34,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-15 06:31:34,081 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:34,081 INFO L499 BasicCegarLoop]: trace histogram [23, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:34,099 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:34,295 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-15 06:31:34,295 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:34,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:34,295 INFO L85 PathProgramCache]: Analyzing trace with hash -691166451, now seen corresponding path program 22 times [2022-04-15 06:31:34,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:34,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2107881647] [2022-04-15 06:31:35,777 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:36,167 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:36,169 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:36,171 INFO L85 PathProgramCache]: Analyzing trace with hash 694173871, now seen corresponding path program 1 times [2022-04-15 06:31:36,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:36,171 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326159152] [2022-04-15 06:31:36,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:36,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:36,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:36,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:36,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:36,236 INFO L290 TraceCheckUtils]: 0: Hoare triple {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-15 06:31:36,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-15 06:31:36,236 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-15 06:31:36,236 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:36,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-15 06:31:36,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-15 06:31:36,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-15 06:31:36,237 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-15 06:31:36,237 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10250#(= main_~x~0 0)} is VALID [2022-04-15 06:31:36,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {10250#(= main_~x~0 0)} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10250#(= main_~x~0 0)} is VALID [2022-04-15 06:31:36,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {10250#(= main_~x~0 0)} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10250#(= main_~x~0 0)} is VALID [2022-04-15 06:31:36,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {10250#(= main_~x~0 0)} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:31:36,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {10251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10246#false} is VALID [2022-04-15 06:31:36,241 INFO L272 TraceCheckUtils]: 10: Hoare triple {10246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10246#false} is VALID [2022-04-15 06:31:36,241 INFO L290 TraceCheckUtils]: 11: Hoare triple {10246#false} ~cond := #in~cond; {10246#false} is VALID [2022-04-15 06:31:36,241 INFO L290 TraceCheckUtils]: 12: Hoare triple {10246#false} assume 0 == ~cond; {10246#false} is VALID [2022-04-15 06:31:36,241 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-15 06:31:36,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:36,241 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:36,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326159152] [2022-04-15 06:31:36,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1326159152] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:36,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [295157933] [2022-04-15 06:31:36,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:36,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:36,242 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:36,243 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:36,244 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-15 06:31:36,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:36,270 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:36,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:36,276 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:36,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10245#true} is VALID [2022-04-15 06:31:36,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-15 06:31:36,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-15 06:31:36,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-15 06:31:36,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-15 06:31:36,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:36,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:36,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:36,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:31:36,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {10281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10246#false} is VALID [2022-04-15 06:31:36,447 INFO L272 TraceCheckUtils]: 10: Hoare triple {10246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10246#false} is VALID [2022-04-15 06:31:36,447 INFO L290 TraceCheckUtils]: 11: Hoare triple {10246#false} ~cond := #in~cond; {10246#false} is VALID [2022-04-15 06:31:36,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {10246#false} assume 0 == ~cond; {10246#false} is VALID [2022-04-15 06:31:36,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-15 06:31:36,448 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:36,448 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:37,769 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-15 06:31:37,770 INFO L290 TraceCheckUtils]: 12: Hoare triple {10300#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {10246#false} is VALID [2022-04-15 06:31:37,770 INFO L290 TraceCheckUtils]: 11: Hoare triple {10304#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {10300#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:37,770 INFO L272 TraceCheckUtils]: 10: Hoare triple {10308#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10304#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:37,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10308#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:37,855 INFO L290 TraceCheckUtils]: 8: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:37,856 INFO L290 TraceCheckUtils]: 7: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:37,864 INFO L290 TraceCheckUtils]: 6: Hoare triple {10322#(and (or (forall ((aux_div_v_main_~y~0_637_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_637_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_637_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:37,864 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10322#(and (or (forall ((aux_div_v_main_~y~0_637_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_637_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_637_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:37,864 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-15 06:31:37,865 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-15 06:31:37,865 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-15 06:31:37,865 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-15 06:31:37,865 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10245#true} is VALID [2022-04-15 06:31:37,865 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:37,865 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [295157933] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:37,865 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:37,865 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:38,947 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:38,948 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2107881647] [2022-04-15 06:31:38,948 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2107881647] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:38,948 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:38,948 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2022-04-15 06:31:38,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379700753] [2022-04-15 06:31:38,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:38,948 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 80 [2022-04-15 06:31:38,948 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:38,949 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:38,997 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:38,997 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-15 06:31:38,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:38,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-15 06:31:38,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=978, Unknown=0, NotChecked=0, Total=1122 [2022-04-15 06:31:38,998 INFO L87 Difference]: Start difference. First operand 82 states and 84 transitions. Second operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:41,315 INFO L93 Difference]: Finished difference Result 94 states and 98 transitions. [2022-04-15 06:31:41,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-15 06:31:41,315 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 80 [2022-04-15 06:31:41,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:41,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 94 transitions. [2022-04-15 06:31:41,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 94 transitions. [2022-04-15 06:31:41,317 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 94 transitions. [2022-04-15 06:31:41,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:41,396 INFO L225 Difference]: With dead ends: 94 [2022-04-15 06:31:41,396 INFO L226 Difference]: Without dead ends: 86 [2022-04-15 06:31:41,397 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 29 SyntacticMatches, 47 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 702 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=305, Invalid=2887, Unknown=0, NotChecked=0, Total=3192 [2022-04-15 06:31:41,398 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 56 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 1749 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 1774 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 1749 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:41,398 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [56 Valid, 129 Invalid, 1774 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 1749 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-15 06:31:41,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-04-15 06:31:41,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2022-04-15 06:31:41,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:41,512 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,513 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,513 INFO L87 Difference]: Start difference. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:41,514 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-15 06:31:41,514 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 88 transitions. [2022-04-15 06:31:41,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:41,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:41,514 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 86 states. [2022-04-15 06:31:41,514 INFO L87 Difference]: Start difference. First operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 86 states. [2022-04-15 06:31:41,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:41,515 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-15 06:31:41,515 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 88 transitions. [2022-04-15 06:31:41,515 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:41,515 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:41,515 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:41,515 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:41,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 87 transitions. [2022-04-15 06:31:41,516 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 87 transitions. Word has length 80 [2022-04-15 06:31:41,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:41,516 INFO L478 AbstractCegarLoop]: Abstraction has 85 states and 87 transitions. [2022-04-15 06:31:41,516 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:41,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 85 states and 87 transitions. [2022-04-15 06:31:41,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:41,618 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 87 transitions. [2022-04-15 06:31:41,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-04-15 06:31:41,618 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:41,618 INFO L499 BasicCegarLoop]: trace histogram [24, 24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:41,647 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:41,818 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:41,819 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:41,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:41,819 INFO L85 PathProgramCache]: Analyzing trace with hash -8663995, now seen corresponding path program 23 times [2022-04-15 06:31:41,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:41,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [945560436] [2022-04-15 06:31:42,461 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:42,927 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:42,928 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:42,930 INFO L85 PathProgramCache]: Analyzing trace with hash -1551261265, now seen corresponding path program 1 times [2022-04-15 06:31:42,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:42,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972003530] [2022-04-15 06:31:42,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:42,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:42,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:42,972 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:42,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-15 06:31:42,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-15 06:31:42,976 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-15 06:31:42,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:42,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-15 06:31:42,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-15 06:31:42,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-15 06:31:42,977 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-15 06:31:42,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {10946#(= main_~x~0 0)} is VALID [2022-04-15 06:31:42,978 INFO L290 TraceCheckUtils]: 6: Hoare triple {10946#(= main_~x~0 0)} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10946#(= main_~x~0 0)} is VALID [2022-04-15 06:31:42,978 INFO L290 TraceCheckUtils]: 7: Hoare triple {10946#(= main_~x~0 0)} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10946#(= main_~x~0 0)} is VALID [2022-04-15 06:31:42,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {10946#(= main_~x~0 0)} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10947#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:31:42,979 INFO L290 TraceCheckUtils]: 9: Hoare triple {10947#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10942#false} is VALID [2022-04-15 06:31:42,979 INFO L272 TraceCheckUtils]: 10: Hoare triple {10942#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10942#false} is VALID [2022-04-15 06:31:42,979 INFO L290 TraceCheckUtils]: 11: Hoare triple {10942#false} ~cond := #in~cond; {10942#false} is VALID [2022-04-15 06:31:42,979 INFO L290 TraceCheckUtils]: 12: Hoare triple {10942#false} assume 0 == ~cond; {10942#false} is VALID [2022-04-15 06:31:42,979 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-15 06:31:42,980 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:42,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:42,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [972003530] [2022-04-15 06:31:42,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [972003530] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:42,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [941756295] [2022-04-15 06:31:42,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:42,980 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:42,980 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:42,981 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:42,981 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-15 06:31:43,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:43,012 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:43,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:43,019 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:43,197 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10941#true} is VALID [2022-04-15 06:31:43,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-15 06:31:43,197 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-15 06:31:43,197 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-15 06:31:43,197 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-15 06:31:43,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:43,198 INFO L290 TraceCheckUtils]: 6: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:43,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:43,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10977#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:31:43,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {10977#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10942#false} is VALID [2022-04-15 06:31:43,201 INFO L272 TraceCheckUtils]: 10: Hoare triple {10942#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10942#false} is VALID [2022-04-15 06:31:43,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {10942#false} ~cond := #in~cond; {10942#false} is VALID [2022-04-15 06:31:43,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {10942#false} assume 0 == ~cond; {10942#false} is VALID [2022-04-15 06:31:43,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-15 06:31:43,201 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:43,201 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:44,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-15 06:31:44,849 INFO L290 TraceCheckUtils]: 12: Hoare triple {10996#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {10942#false} is VALID [2022-04-15 06:31:44,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {11000#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {10996#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:44,849 INFO L272 TraceCheckUtils]: 10: Hoare triple {11004#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11000#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:44,850 INFO L290 TraceCheckUtils]: 9: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11004#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:44,874 INFO L290 TraceCheckUtils]: 8: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:44,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:44,954 INFO L290 TraceCheckUtils]: 6: Hoare triple {11018#(and (or (forall ((aux_div_v_main_~y~0_677_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_677_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_677_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:44,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {11018#(and (or (forall ((aux_div_v_main_~y~0_677_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_677_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_677_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:44,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-15 06:31:44,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-15 06:31:44,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-15 06:31:44,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-15 06:31:44,955 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10941#true} is VALID [2022-04-15 06:31:44,955 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:44,955 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [941756295] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:44,955 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:44,955 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:46,069 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:46,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [945560436] [2022-04-15 06:31:46,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [945560436] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:46,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:46,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2022-04-15 06:31:46,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764199591] [2022-04-15 06:31:46,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:46,070 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 83 [2022-04-15 06:31:46,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:46,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:46,121 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:46,121 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-15 06:31:46,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:46,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-15 06:31:46,122 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=1041, Unknown=0, NotChecked=0, Total=1190 [2022-04-15 06:31:46,122 INFO L87 Difference]: Start difference. First operand 85 states and 87 transitions. Second operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:48,681 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2022-04-15 06:31:48,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-15 06:31:48,682 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 83 [2022-04-15 06:31:48,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:48,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 97 transitions. [2022-04-15 06:31:48,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 97 transitions. [2022-04-15 06:31:48,683 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 97 transitions. [2022-04-15 06:31:48,782 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 97 edges. 97 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:48,784 INFO L225 Difference]: With dead ends: 97 [2022-04-15 06:31:48,785 INFO L226 Difference]: Without dead ends: 89 [2022-04-15 06:31:48,785 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 29 SyntacticMatches, 49 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 744 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=317, Invalid=3105, Unknown=0, NotChecked=0, Total=3422 [2022-04-15 06:31:48,786 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 58 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 1897 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 1923 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 1897 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:48,786 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [58 Valid, 134 Invalid, 1923 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 1897 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-15 06:31:48,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-04-15 06:31:48,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 88. [2022-04-15 06:31:48,893 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:48,893 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,893 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,893 INFO L87 Difference]: Start difference. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:48,894 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2022-04-15 06:31:48,894 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 91 transitions. [2022-04-15 06:31:48,894 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:48,894 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:48,895 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 89 states. [2022-04-15 06:31:48,895 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 89 states. [2022-04-15 06:31:48,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:48,895 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2022-04-15 06:31:48,896 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 91 transitions. [2022-04-15 06:31:48,896 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:48,896 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:48,896 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:48,896 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:48,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 90 transitions. [2022-04-15 06:31:48,897 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 90 transitions. Word has length 83 [2022-04-15 06:31:48,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:48,897 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 90 transitions. [2022-04-15 06:31:48,897 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:48,897 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 88 states and 90 transitions. [2022-04-15 06:31:49,214 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:49,214 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 90 transitions. [2022-04-15 06:31:49,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-15 06:31:49,215 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:49,215 INFO L499 BasicCegarLoop]: trace histogram [25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:49,231 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:49,415 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:49,415 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:49,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:49,416 INFO L85 PathProgramCache]: Analyzing trace with hash 46823437, now seen corresponding path program 24 times [2022-04-15 06:31:49,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:49,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [937700649] [2022-04-15 06:31:52,618 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:31:52,813 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:53,509 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:31:53,510 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:31:53,513 INFO L85 PathProgramCache]: Analyzing trace with hash 498270895, now seen corresponding path program 1 times [2022-04-15 06:31:53,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:31:53,513 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663765161] [2022-04-15 06:31:53,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:53,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:31:53,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:53,559 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:31:53,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:53,562 INFO L290 TraceCheckUtils]: 0: Hoare triple {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-15 06:31:53,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-15 06:31:53,562 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-15 06:31:53,562 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:31:53,563 INFO L290 TraceCheckUtils]: 1: Hoare triple {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-15 06:31:53,563 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-15 06:31:53,563 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-15 06:31:53,563 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-15 06:31:53,563 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11663#(= main_~x~0 0)} is VALID [2022-04-15 06:31:53,564 INFO L290 TraceCheckUtils]: 6: Hoare triple {11663#(= main_~x~0 0)} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11663#(= main_~x~0 0)} is VALID [2022-04-15 06:31:53,564 INFO L290 TraceCheckUtils]: 7: Hoare triple {11663#(= main_~x~0 0)} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11663#(= main_~x~0 0)} is VALID [2022-04-15 06:31:53,565 INFO L290 TraceCheckUtils]: 8: Hoare triple {11663#(= main_~x~0 0)} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11664#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:31:53,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {11664#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11659#false} is VALID [2022-04-15 06:31:53,566 INFO L272 TraceCheckUtils]: 10: Hoare triple {11659#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11659#false} is VALID [2022-04-15 06:31:53,566 INFO L290 TraceCheckUtils]: 11: Hoare triple {11659#false} ~cond := #in~cond; {11659#false} is VALID [2022-04-15 06:31:53,566 INFO L290 TraceCheckUtils]: 12: Hoare triple {11659#false} assume 0 == ~cond; {11659#false} is VALID [2022-04-15 06:31:53,566 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-15 06:31:53,566 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:53,566 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:31:53,566 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663765161] [2022-04-15 06:31:53,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1663765161] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:31:53,566 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [577469447] [2022-04-15 06:31:53,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:31:53,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:31:53,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:31:53,567 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:31:53,568 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-15 06:31:53,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:53,594 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:31:53,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:31:53,601 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:31:53,804 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11658#true} is VALID [2022-04-15 06:31:53,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-15 06:31:53,804 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-15 06:31:53,804 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-15 06:31:53,804 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-15 06:31:53,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:53,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:53,806 INFO L290 TraceCheckUtils]: 7: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:31:53,807 INFO L290 TraceCheckUtils]: 8: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11694#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:31:53,808 INFO L290 TraceCheckUtils]: 9: Hoare triple {11694#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11659#false} is VALID [2022-04-15 06:31:53,808 INFO L272 TraceCheckUtils]: 10: Hoare triple {11659#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11659#false} is VALID [2022-04-15 06:31:53,808 INFO L290 TraceCheckUtils]: 11: Hoare triple {11659#false} ~cond := #in~cond; {11659#false} is VALID [2022-04-15 06:31:53,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {11659#false} assume 0 == ~cond; {11659#false} is VALID [2022-04-15 06:31:53,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-15 06:31:53,808 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:53,808 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:31:54,721 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-15 06:31:54,722 INFO L290 TraceCheckUtils]: 12: Hoare triple {11713#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {11659#false} is VALID [2022-04-15 06:31:54,722 INFO L290 TraceCheckUtils]: 11: Hoare triple {11717#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {11713#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:31:54,722 INFO L272 TraceCheckUtils]: 10: Hoare triple {11721#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11717#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:31:54,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11721#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:31:54,728 INFO L290 TraceCheckUtils]: 8: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:54,728 INFO L290 TraceCheckUtils]: 7: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:54,767 INFO L290 TraceCheckUtils]: 6: Hoare triple {11735#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_718_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_718_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_718_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:31:54,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11735#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_718_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_718_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_718_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:31:54,768 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-15 06:31:54,768 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-15 06:31:54,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-15 06:31:54,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-15 06:31:54,769 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11658#true} is VALID [2022-04-15 06:31:54,769 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:31:54,769 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [577469447] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:31:54,769 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:31:54,769 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:31:56,004 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:31:56,004 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [937700649] [2022-04-15 06:31:56,004 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [937700649] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:31:56,005 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:31:56,005 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [28] imperfect sequences [] total 28 [2022-04-15 06:31:56,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322698139] [2022-04-15 06:31:56,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:31:56,005 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 86 [2022-04-15 06:31:56,005 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:31:56,005 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:56,059 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:56,059 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-15 06:31:56,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:56,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-15 06:31:56,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=1106, Unknown=0, NotChecked=0, Total=1260 [2022-04-15 06:31:56,060 INFO L87 Difference]: Start difference. First operand 88 states and 90 transitions. Second operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:58,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:58,792 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2022-04-15 06:31:58,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-15 06:31:58,792 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 86 [2022-04-15 06:31:58,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:31:58,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:58,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 100 transitions. [2022-04-15 06:31:58,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:58,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 100 transitions. [2022-04-15 06:31:58,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 100 transitions. [2022-04-15 06:31:58,904 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:58,905 INFO L225 Difference]: With dead ends: 100 [2022-04-15 06:31:58,905 INFO L226 Difference]: Without dead ends: 92 [2022-04-15 06:31:58,906 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 29 SyntacticMatches, 51 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 787 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=329, Invalid=3331, Unknown=0, NotChecked=0, Total=3660 [2022-04-15 06:31:58,907 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 60 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 2051 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 2078 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 2051 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:31:58,907 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [60 Valid, 139 Invalid, 2078 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 2051 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-15 06:31:58,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-04-15 06:31:59,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 91. [2022-04-15 06:31:59,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:31:59,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:59,014 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:59,014 INFO L87 Difference]: Start difference. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:59,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:59,015 INFO L93 Difference]: Finished difference Result 92 states and 94 transitions. [2022-04-15 06:31:59,015 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 94 transitions. [2022-04-15 06:31:59,015 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:59,015 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:59,015 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 92 states. [2022-04-15 06:31:59,016 INFO L87 Difference]: Start difference. First operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 92 states. [2022-04-15 06:31:59,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:31:59,016 INFO L93 Difference]: Finished difference Result 92 states and 94 transitions. [2022-04-15 06:31:59,016 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 94 transitions. [2022-04-15 06:31:59,017 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:31:59,017 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:31:59,017 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:31:59,017 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:31:59,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:59,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 93 transitions. [2022-04-15 06:31:59,018 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 93 transitions. Word has length 86 [2022-04-15 06:31:59,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:31:59,018 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 93 transitions. [2022-04-15 06:31:59,018 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:31:59,018 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 91 states and 93 transitions. [2022-04-15 06:31:59,153 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:31:59,153 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 93 transitions. [2022-04-15 06:31:59,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-04-15 06:31:59,154 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:31:59,154 INFO L499 BasicCegarLoop]: trace histogram [26, 26, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:31:59,170 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-15 06:31:59,354 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-15 06:31:59,355 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:31:59,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:31:59,355 INFO L85 PathProgramCache]: Analyzing trace with hash -489498811, now seen corresponding path program 25 times [2022-04-15 06:31:59,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:31:59,355 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [248250428] [2022-04-15 06:32:03,848 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:04,090 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:04,500 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:04,501 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:32:04,503 INFO L85 PathProgramCache]: Analyzing trace with hash -1747164241, now seen corresponding path program 1 times [2022-04-15 06:32:04,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:32:04,503 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570953281] [2022-04-15 06:32:04,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:04,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:32:04,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:04,553 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:32:04,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:04,556 INFO L290 TraceCheckUtils]: 0: Hoare triple {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-15 06:32:04,556 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-15 06:32:04,557 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-15 06:32:04,557 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:32:04,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-15 06:32:04,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-15 06:32:04,557 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-15 06:32:04,557 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-15 06:32:04,558 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12401#(= main_~x~0 0)} is VALID [2022-04-15 06:32:04,558 INFO L290 TraceCheckUtils]: 6: Hoare triple {12401#(= main_~x~0 0)} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12401#(= main_~x~0 0)} is VALID [2022-04-15 06:32:04,559 INFO L290 TraceCheckUtils]: 7: Hoare triple {12401#(= main_~x~0 0)} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12401#(= main_~x~0 0)} is VALID [2022-04-15 06:32:04,559 INFO L290 TraceCheckUtils]: 8: Hoare triple {12401#(= main_~x~0 0)} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12402#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} is VALID [2022-04-15 06:32:04,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {12402#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12397#false} is VALID [2022-04-15 06:32:04,560 INFO L272 TraceCheckUtils]: 10: Hoare triple {12397#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12397#false} is VALID [2022-04-15 06:32:04,560 INFO L290 TraceCheckUtils]: 11: Hoare triple {12397#false} ~cond := #in~cond; {12397#false} is VALID [2022-04-15 06:32:04,560 INFO L290 TraceCheckUtils]: 12: Hoare triple {12397#false} assume 0 == ~cond; {12397#false} is VALID [2022-04-15 06:32:04,561 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-15 06:32:04,561 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:04,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:32:04,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570953281] [2022-04-15 06:32:04,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [570953281] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:32:04,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1674296134] [2022-04-15 06:32:04,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:04,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:04,561 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:32:04,562 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:32:04,563 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-15 06:32:04,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:04,588 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:32:04,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:04,595 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:32:04,766 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12396#true} is VALID [2022-04-15 06:32:04,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-15 06:32:04,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-15 06:32:04,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-15 06:32:04,766 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-15 06:32:04,767 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:04,767 INFO L290 TraceCheckUtils]: 6: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:04,768 INFO L290 TraceCheckUtils]: 7: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:04,769 INFO L290 TraceCheckUtils]: 8: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12432#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:32:04,769 INFO L290 TraceCheckUtils]: 9: Hoare triple {12432#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12397#false} is VALID [2022-04-15 06:32:04,769 INFO L272 TraceCheckUtils]: 10: Hoare triple {12397#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12397#false} is VALID [2022-04-15 06:32:04,769 INFO L290 TraceCheckUtils]: 11: Hoare triple {12397#false} ~cond := #in~cond; {12397#false} is VALID [2022-04-15 06:32:04,770 INFO L290 TraceCheckUtils]: 12: Hoare triple {12397#false} assume 0 == ~cond; {12397#false} is VALID [2022-04-15 06:32:04,770 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-15 06:32:04,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:04,770 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:32:05,530 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-15 06:32:05,531 INFO L290 TraceCheckUtils]: 12: Hoare triple {12451#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {12397#false} is VALID [2022-04-15 06:32:05,531 INFO L290 TraceCheckUtils]: 11: Hoare triple {12455#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {12451#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:32:05,532 INFO L272 TraceCheckUtils]: 10: Hoare triple {12459#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12455#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:32:05,532 INFO L290 TraceCheckUtils]: 9: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12459#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:32:05,534 INFO L290 TraceCheckUtils]: 8: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:05,534 INFO L290 TraceCheckUtils]: 7: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:05,544 INFO L290 TraceCheckUtils]: 6: Hoare triple {12473#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_760_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_760_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_760_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:05,545 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12473#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_760_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_760_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_760_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:32:05,545 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-15 06:32:05,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-15 06:32:05,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-15 06:32:05,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-15 06:32:05,545 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12396#true} is VALID [2022-04-15 06:32:05,545 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:05,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1674296134] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:32:05,545 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:32:05,545 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:32:06,663 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:32:06,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [248250428] [2022-04-15 06:32:06,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [248250428] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:32:06,663 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:32:06,663 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [29] imperfect sequences [] total 29 [2022-04-15 06:32:06,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779391436] [2022-04-15 06:32:06,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:32:06,664 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 89 [2022-04-15 06:32:06,664 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:32:06,664 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:06,752 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:06,754 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-15 06:32:06,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:06,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-15 06:32:06,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=1173, Unknown=0, NotChecked=0, Total=1332 [2022-04-15 06:32:06,762 INFO L87 Difference]: Start difference. First operand 91 states and 93 transitions. Second operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:09,729 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2022-04-15 06:32:09,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-15 06:32:09,729 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 89 [2022-04-15 06:32:09,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:32:09,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 103 transitions. [2022-04-15 06:32:09,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 103 transitions. [2022-04-15 06:32:09,731 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 103 transitions. [2022-04-15 06:32:09,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:09,815 INFO L225 Difference]: With dead ends: 103 [2022-04-15 06:32:09,815 INFO L226 Difference]: Without dead ends: 95 [2022-04-15 06:32:09,816 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 29 SyntacticMatches, 53 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 831 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=341, Invalid=3565, Unknown=0, NotChecked=0, Total=3906 [2022-04-15 06:32:09,816 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 62 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 2211 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 2239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 2211 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:32:09,816 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [62 Valid, 144 Invalid, 2239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 2211 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-15 06:32:09,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-15 06:32:09,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 94. [2022-04-15 06:32:09,934 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:32:09,934 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,934 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,934 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:09,935 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2022-04-15 06:32:09,936 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 97 transitions. [2022-04-15 06:32:09,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:09,937 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:09,937 INFO L74 IsIncluded]: Start isIncluded. First operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-15 06:32:09,937 INFO L87 Difference]: Start difference. First operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-15 06:32:09,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:09,938 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2022-04-15 06:32:09,938 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 97 transitions. [2022-04-15 06:32:09,938 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:09,938 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:09,938 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:32:09,938 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:32:09,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 96 transitions. [2022-04-15 06:32:09,939 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 96 transitions. Word has length 89 [2022-04-15 06:32:09,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:32:09,939 INFO L478 AbstractCegarLoop]: Abstraction has 94 states and 96 transitions. [2022-04-15 06:32:09,939 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:09,939 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 94 states and 96 transitions. [2022-04-15 06:32:10,056 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:10,057 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 96 transitions. [2022-04-15 06:32:10,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-04-15 06:32:10,057 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:32:10,057 INFO L499 BasicCegarLoop]: trace histogram [27, 27, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:32:10,075 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-15 06:32:10,258 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-15 06:32:10,258 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:32:10,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:32:10,258 INFO L85 PathProgramCache]: Analyzing trace with hash -787247859, now seen corresponding path program 26 times [2022-04-15 06:32:10,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:10,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1518874046] [2022-04-15 06:32:14,563 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:14,760 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:17,526 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:17,689 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:17,690 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:32:17,692 INFO L85 PathProgramCache]: Analyzing trace with hash 302367919, now seen corresponding path program 1 times [2022-04-15 06:32:17,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:32:17,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511905111] [2022-04-15 06:32:17,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:17,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:32:17,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:17,745 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:32:17,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:17,748 INFO L290 TraceCheckUtils]: 0: Hoare triple {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-15 06:32:17,748 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-15 06:32:17,748 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-15 06:32:17,748 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:32:17,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-15 06:32:17,749 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-15 06:32:17,749 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-15 06:32:17,749 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-15 06:32:17,749 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13160#(= main_~x~0 0)} is VALID [2022-04-15 06:32:17,750 INFO L290 TraceCheckUtils]: 6: Hoare triple {13160#(= main_~x~0 0)} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13160#(= main_~x~0 0)} is VALID [2022-04-15 06:32:17,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {13160#(= main_~x~0 0)} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13160#(= main_~x~0 0)} is VALID [2022-04-15 06:32:17,751 INFO L290 TraceCheckUtils]: 8: Hoare triple {13160#(= main_~x~0 0)} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13161#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:32:17,752 INFO L290 TraceCheckUtils]: 9: Hoare triple {13161#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13156#false} is VALID [2022-04-15 06:32:17,752 INFO L272 TraceCheckUtils]: 10: Hoare triple {13156#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13156#false} is VALID [2022-04-15 06:32:17,752 INFO L290 TraceCheckUtils]: 11: Hoare triple {13156#false} ~cond := #in~cond; {13156#false} is VALID [2022-04-15 06:32:17,752 INFO L290 TraceCheckUtils]: 12: Hoare triple {13156#false} assume 0 == ~cond; {13156#false} is VALID [2022-04-15 06:32:17,752 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-15 06:32:17,752 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:17,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:32:17,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511905111] [2022-04-15 06:32:17,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511905111] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:32:17,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1124487396] [2022-04-15 06:32:17,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:17,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:17,753 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:32:17,758 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:32:17,759 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-15 06:32:17,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:17,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:32:17,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:17,808 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:32:17,985 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13155#true} is VALID [2022-04-15 06:32:17,985 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-15 06:32:17,985 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-15 06:32:17,985 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-15 06:32:17,985 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-15 06:32:17,986 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:17,986 INFO L290 TraceCheckUtils]: 6: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:17,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:17,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13191#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:32:17,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {13191#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13156#false} is VALID [2022-04-15 06:32:17,988 INFO L272 TraceCheckUtils]: 10: Hoare triple {13156#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13156#false} is VALID [2022-04-15 06:32:17,988 INFO L290 TraceCheckUtils]: 11: Hoare triple {13156#false} ~cond := #in~cond; {13156#false} is VALID [2022-04-15 06:32:17,988 INFO L290 TraceCheckUtils]: 12: Hoare triple {13156#false} assume 0 == ~cond; {13156#false} is VALID [2022-04-15 06:32:17,989 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-15 06:32:17,989 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:17,989 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:32:19,074 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-15 06:32:19,075 INFO L290 TraceCheckUtils]: 12: Hoare triple {13210#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {13156#false} is VALID [2022-04-15 06:32:19,075 INFO L290 TraceCheckUtils]: 11: Hoare triple {13214#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {13210#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:32:19,076 INFO L272 TraceCheckUtils]: 10: Hoare triple {13218#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13214#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:32:19,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13218#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:32:19,078 INFO L290 TraceCheckUtils]: 8: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:19,079 INFO L290 TraceCheckUtils]: 7: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:19,149 INFO L290 TraceCheckUtils]: 6: Hoare triple {13232#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_803_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_803_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_803_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:19,150 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13232#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_803_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_803_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_803_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:32:19,150 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-15 06:32:19,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-15 06:32:19,150 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-15 06:32:19,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-15 06:32:19,151 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13155#true} is VALID [2022-04-15 06:32:19,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:19,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1124487396] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:32:19,151 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:32:19,151 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:32:20,473 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:32:20,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1518874046] [2022-04-15 06:32:20,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1518874046] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:32:20,474 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:32:20,474 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [30] imperfect sequences [] total 30 [2022-04-15 06:32:20,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [904348253] [2022-04-15 06:32:20,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:32:20,474 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 92 [2022-04-15 06:32:20,474 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:32:20,474 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:20,530 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:20,530 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-15 06:32:20,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:20,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-15 06:32:20,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=1242, Unknown=0, NotChecked=0, Total=1406 [2022-04-15 06:32:20,531 INFO L87 Difference]: Start difference. First operand 94 states and 96 transitions. Second operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:23,735 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2022-04-15 06:32:23,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-15 06:32:23,735 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 92 [2022-04-15 06:32:23,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:32:23,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 106 transitions. [2022-04-15 06:32:23,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 106 transitions. [2022-04-15 06:32:23,738 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 106 transitions. [2022-04-15 06:32:23,840 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:23,841 INFO L225 Difference]: With dead ends: 106 [2022-04-15 06:32:23,841 INFO L226 Difference]: Without dead ends: 98 [2022-04-15 06:32:23,842 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 28 SyntacticMatches, 56 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 876 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=353, Invalid=3807, Unknown=0, NotChecked=0, Total=4160 [2022-04-15 06:32:23,842 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 64 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 2377 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 2406 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 2377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:32:23,842 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [64 Valid, 149 Invalid, 2406 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 2377 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-15 06:32:23,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-15 06:32:23,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2022-04-15 06:32:23,960 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:32:23,960 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,960 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,960 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:23,962 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-15 06:32:23,962 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-15 06:32:23,962 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:23,962 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:23,962 INFO L74 IsIncluded]: Start isIncluded. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-15 06:32:23,962 INFO L87 Difference]: Start difference. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-15 06:32:23,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:23,963 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-15 06:32:23,963 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-15 06:32:23,964 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:23,964 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:23,964 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:32:23,964 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:32:23,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 99 transitions. [2022-04-15 06:32:23,965 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 99 transitions. Word has length 92 [2022-04-15 06:32:23,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:32:23,966 INFO L478 AbstractCegarLoop]: Abstraction has 97 states and 99 transitions. [2022-04-15 06:32:23,966 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:23,966 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 97 states and 99 transitions. [2022-04-15 06:32:24,096 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:24,096 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 99 transitions. [2022-04-15 06:32:24,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-04-15 06:32:24,097 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:32:24,097 INFO L499 BasicCegarLoop]: trace histogram [28, 28, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:32:24,115 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-04-15 06:32:24,297 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-15 06:32:24,297 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:32:24,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:32:24,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1921670587, now seen corresponding path program 27 times [2022-04-15 06:32:24,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:24,298 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1926002429] [2022-04-15 06:32:27,006 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:28,373 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:28,375 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:32:28,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1943067217, now seen corresponding path program 1 times [2022-04-15 06:32:28,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:32:28,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599689100] [2022-04-15 06:32:28,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:28,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:32:28,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:28,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:32:28,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:28,439 INFO L290 TraceCheckUtils]: 0: Hoare triple {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:32:28,440 INFO L290 TraceCheckUtils]: 1: Hoare triple {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-15 06:32:28,440 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-15 06:32:28,441 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {13940#(= main_~x~0 0)} is VALID [2022-04-15 06:32:28,441 INFO L290 TraceCheckUtils]: 6: Hoare triple {13940#(= main_~x~0 0)} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13940#(= main_~x~0 0)} is VALID [2022-04-15 06:32:28,442 INFO L290 TraceCheckUtils]: 7: Hoare triple {13940#(= main_~x~0 0)} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13940#(= main_~x~0 0)} is VALID [2022-04-15 06:32:28,443 INFO L290 TraceCheckUtils]: 8: Hoare triple {13940#(= main_~x~0 0)} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13941#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:32:28,443 INFO L290 TraceCheckUtils]: 9: Hoare triple {13941#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13936#false} is VALID [2022-04-15 06:32:28,443 INFO L272 TraceCheckUtils]: 10: Hoare triple {13936#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13936#false} is VALID [2022-04-15 06:32:28,443 INFO L290 TraceCheckUtils]: 11: Hoare triple {13936#false} ~cond := #in~cond; {13936#false} is VALID [2022-04-15 06:32:28,443 INFO L290 TraceCheckUtils]: 12: Hoare triple {13936#false} assume 0 == ~cond; {13936#false} is VALID [2022-04-15 06:32:28,444 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-15 06:32:28,444 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:28,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:32:28,444 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1599689100] [2022-04-15 06:32:28,444 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1599689100] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:32:28,444 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1299717570] [2022-04-15 06:32:28,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:28,444 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:28,444 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:32:28,445 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:32:28,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-15 06:32:28,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:28,476 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:32:28,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:28,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:32:28,670 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13935#true} is VALID [2022-04-15 06:32:28,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-15 06:32:28,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-15 06:32:28,670 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-15 06:32:28,670 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-15 06:32:28,671 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:28,671 INFO L290 TraceCheckUtils]: 6: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:28,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:28,673 INFO L290 TraceCheckUtils]: 8: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13971#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:32:28,674 INFO L290 TraceCheckUtils]: 9: Hoare triple {13971#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13936#false} is VALID [2022-04-15 06:32:28,674 INFO L272 TraceCheckUtils]: 10: Hoare triple {13936#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13936#false} is VALID [2022-04-15 06:32:28,674 INFO L290 TraceCheckUtils]: 11: Hoare triple {13936#false} ~cond := #in~cond; {13936#false} is VALID [2022-04-15 06:32:28,674 INFO L290 TraceCheckUtils]: 12: Hoare triple {13936#false} assume 0 == ~cond; {13936#false} is VALID [2022-04-15 06:32:28,674 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-15 06:32:28,674 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:28,674 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:32:29,701 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-15 06:32:29,701 INFO L290 TraceCheckUtils]: 12: Hoare triple {13990#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {13936#false} is VALID [2022-04-15 06:32:29,702 INFO L290 TraceCheckUtils]: 11: Hoare triple {13994#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {13990#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:32:29,702 INFO L272 TraceCheckUtils]: 10: Hoare triple {13998#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13994#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:32:29,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13998#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:32:29,705 INFO L290 TraceCheckUtils]: 8: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:29,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:29,714 INFO L290 TraceCheckUtils]: 6: Hoare triple {14012#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_847_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_847_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_847_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:29,715 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {14012#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_847_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_847_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_847_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:32:29,715 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-15 06:32:29,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-15 06:32:29,715 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-15 06:32:29,715 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-15 06:32:29,715 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13935#true} is VALID [2022-04-15 06:32:29,715 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:29,715 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1299717570] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:32:29,715 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:32:29,715 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:32:31,120 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:32:31,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1926002429] [2022-04-15 06:32:31,120 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1926002429] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:32:31,121 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:32:31,121 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [31] imperfect sequences [] total 31 [2022-04-15 06:32:31,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916343036] [2022-04-15 06:32:31,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:32:31,124 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 95 [2022-04-15 06:32:31,125 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:32:31,125 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:31,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:31,182 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-15 06:32:31,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:31,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-15 06:32:31,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=1313, Unknown=0, NotChecked=0, Total=1482 [2022-04-15 06:32:31,183 INFO L87 Difference]: Start difference. First operand 97 states and 99 transitions. Second operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:34,551 INFO L93 Difference]: Finished difference Result 109 states and 113 transitions. [2022-04-15 06:32:34,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-15 06:32:34,552 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 95 [2022-04-15 06:32:34,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:32:34,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 109 transitions. [2022-04-15 06:32:34,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 109 transitions. [2022-04-15 06:32:34,553 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 109 transitions. [2022-04-15 06:32:34,628 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:34,629 INFO L225 Difference]: With dead ends: 109 [2022-04-15 06:32:34,629 INFO L226 Difference]: Without dead ends: 101 [2022-04-15 06:32:34,630 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 28 SyntacticMatches, 58 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 922 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=365, Invalid=4057, Unknown=0, NotChecked=0, Total=4422 [2022-04-15 06:32:34,630 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 66 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 2549 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 154 SdHoareTripleChecker+Invalid, 2579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 2549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:32:34,630 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 154 Invalid, 2579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 2549 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-04-15 06:32:34,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-15 06:32:34,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 100. [2022-04-15 06:32:34,760 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:32:34,760 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,760 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,761 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:34,762 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2022-04-15 06:32:34,762 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 103 transitions. [2022-04-15 06:32:34,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:34,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:34,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-15 06:32:34,762 INFO L87 Difference]: Start difference. First operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-15 06:32:34,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:34,764 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2022-04-15 06:32:34,764 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 103 transitions. [2022-04-15 06:32:34,764 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:34,764 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:34,764 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:32:34,764 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:32:34,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2022-04-15 06:32:34,765 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 95 [2022-04-15 06:32:34,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:32:34,765 INFO L478 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2022-04-15 06:32:34,765 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:34,765 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 100 states and 102 transitions. [2022-04-15 06:32:34,900 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:34,900 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2022-04-15 06:32:34,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-04-15 06:32:34,900 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:32:34,900 INFO L499 BasicCegarLoop]: trace histogram [29, 29, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:32:34,919 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-04-15 06:32:35,101 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:35,101 INFO L403 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:32:35,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:32:35,101 INFO L85 PathProgramCache]: Analyzing trace with hash -411508211, now seen corresponding path program 28 times [2022-04-15 06:32:35,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:35,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1412448052] [2022-04-15 06:32:38,572 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:38,780 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:40,777 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:41,034 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:41,035 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:32:41,038 INFO L85 PathProgramCache]: Analyzing trace with hash 106464943, now seen corresponding path program 1 times [2022-04-15 06:32:41,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:32:41,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376238369] [2022-04-15 06:32:41,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:41,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:32:41,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:41,084 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:32:41,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:41,087 INFO L290 TraceCheckUtils]: 0: Hoare triple {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-15 06:32:41,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-15 06:32:41,087 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-15 06:32:41,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:32:41,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-15 06:32:41,088 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-15 06:32:41,088 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-15 06:32:41,088 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-15 06:32:41,088 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14741#(= main_~x~0 0)} is VALID [2022-04-15 06:32:41,089 INFO L290 TraceCheckUtils]: 6: Hoare triple {14741#(= main_~x~0 0)} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14741#(= main_~x~0 0)} is VALID [2022-04-15 06:32:41,089 INFO L290 TraceCheckUtils]: 7: Hoare triple {14741#(= main_~x~0 0)} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14741#(= main_~x~0 0)} is VALID [2022-04-15 06:32:41,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {14741#(= main_~x~0 0)} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14742#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:32:41,091 INFO L290 TraceCheckUtils]: 9: Hoare triple {14742#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14737#false} is VALID [2022-04-15 06:32:41,091 INFO L272 TraceCheckUtils]: 10: Hoare triple {14737#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14737#false} is VALID [2022-04-15 06:32:41,091 INFO L290 TraceCheckUtils]: 11: Hoare triple {14737#false} ~cond := #in~cond; {14737#false} is VALID [2022-04-15 06:32:41,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {14737#false} assume 0 == ~cond; {14737#false} is VALID [2022-04-15 06:32:41,091 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-15 06:32:41,091 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:41,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:32:41,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376238369] [2022-04-15 06:32:41,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376238369] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:32:41,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1955531596] [2022-04-15 06:32:41,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:41,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:41,092 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:32:41,093 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:32:41,098 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-04-15 06:32:41,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:41,125 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:32:41,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:41,134 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:32:41,317 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14736#true} is VALID [2022-04-15 06:32:41,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-15 06:32:41,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-15 06:32:41,318 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-15 06:32:41,318 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-15 06:32:41,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:41,319 INFO L290 TraceCheckUtils]: 6: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:41,319 INFO L290 TraceCheckUtils]: 7: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:41,320 INFO L290 TraceCheckUtils]: 8: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14772#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:32:41,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {14772#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14737#false} is VALID [2022-04-15 06:32:41,321 INFO L272 TraceCheckUtils]: 10: Hoare triple {14737#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14737#false} is VALID [2022-04-15 06:32:41,321 INFO L290 TraceCheckUtils]: 11: Hoare triple {14737#false} ~cond := #in~cond; {14737#false} is VALID [2022-04-15 06:32:41,321 INFO L290 TraceCheckUtils]: 12: Hoare triple {14737#false} assume 0 == ~cond; {14737#false} is VALID [2022-04-15 06:32:41,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-15 06:32:41,321 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:41,322 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:32:42,154 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-15 06:32:42,155 INFO L290 TraceCheckUtils]: 12: Hoare triple {14791#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {14737#false} is VALID [2022-04-15 06:32:42,155 INFO L290 TraceCheckUtils]: 11: Hoare triple {14795#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {14791#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:32:42,156 INFO L272 TraceCheckUtils]: 10: Hoare triple {14799#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14795#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:32:42,156 INFO L290 TraceCheckUtils]: 9: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14799#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:32:42,158 INFO L290 TraceCheckUtils]: 8: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:42,158 INFO L290 TraceCheckUtils]: 7: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:42,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {14813#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_892_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_892_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_892_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:42,170 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14813#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_892_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_892_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_892_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:32:42,170 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-15 06:32:42,170 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-15 06:32:42,170 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-15 06:32:42,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-15 06:32:42,170 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14736#true} is VALID [2022-04-15 06:32:42,171 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:42,171 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1955531596] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:32:42,171 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:32:42,171 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:32:43,603 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:32:43,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1412448052] [2022-04-15 06:32:43,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1412448052] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:32:43,603 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:32:43,603 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [32] imperfect sequences [] total 32 [2022-04-15 06:32:43,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145640858] [2022-04-15 06:32:43,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:32:43,604 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 98 [2022-04-15 06:32:43,604 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:32:43,604 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:43,669 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:43,669 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-15 06:32:43,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:43,669 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-15 06:32:43,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1386, Unknown=0, NotChecked=0, Total=1560 [2022-04-15 06:32:43,670 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:47,244 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2022-04-15 06:32:47,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-04-15 06:32:47,244 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 98 [2022-04-15 06:32:47,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:32:47,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 112 transitions. [2022-04-15 06:32:47,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 112 transitions. [2022-04-15 06:32:47,245 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 32 states and 112 transitions. [2022-04-15 06:32:47,342 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:47,343 INFO L225 Difference]: With dead ends: 112 [2022-04-15 06:32:47,343 INFO L226 Difference]: Without dead ends: 104 [2022-04-15 06:32:47,343 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 28 SyntacticMatches, 60 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 969 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=377, Invalid=4315, Unknown=0, NotChecked=0, Total=4692 [2022-04-15 06:32:47,344 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 68 mSDsluCounter, 147 mSDsCounter, 0 mSdLazyCounter, 2727 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 159 SdHoareTripleChecker+Invalid, 2758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 2727 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:32:47,344 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [68 Valid, 159 Invalid, 2758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 2727 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-04-15 06:32:47,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2022-04-15 06:32:47,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 103. [2022-04-15 06:32:47,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:32:47,474 INFO L82 GeneralOperation]: Start isEquivalent. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,474 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,474 INFO L87 Difference]: Start difference. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:47,475 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2022-04-15 06:32:47,475 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2022-04-15 06:32:47,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:47,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:47,476 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-15 06:32:47,476 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-15 06:32:47,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:32:47,477 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2022-04-15 06:32:47,477 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2022-04-15 06:32:47,477 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:32:47,477 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:32:47,477 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:32:47,477 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:32:47,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2022-04-15 06:32:47,478 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 105 transitions. Word has length 98 [2022-04-15 06:32:47,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:32:47,478 INFO L478 AbstractCegarLoop]: Abstraction has 103 states and 105 transitions. [2022-04-15 06:32:47,479 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:47,479 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 103 states and 105 transitions. [2022-04-15 06:32:47,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:47,618 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 105 transitions. [2022-04-15 06:32:47,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2022-04-15 06:32:47,618 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:32:47,618 INFO L499 BasicCegarLoop]: trace histogram [30, 30, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:32:47,634 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2022-04-15 06:32:47,831 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:47,831 INFO L403 AbstractCegarLoop]: === Iteration 32 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:32:47,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:32:47,836 INFO L85 PathProgramCache]: Analyzing trace with hash -946590395, now seen corresponding path program 29 times [2022-04-15 06:32:47,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:47,836 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [990348620] [2022-04-15 06:32:51,072 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:32:51,319 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:51,786 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:32:51,787 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:32:51,789 INFO L85 PathProgramCache]: Analyzing trace with hash -2138970193, now seen corresponding path program 1 times [2022-04-15 06:32:51,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:32:51,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218616400] [2022-04-15 06:32:51,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:51,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:32:51,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:51,840 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:32:51,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:51,842 INFO L290 TraceCheckUtils]: 0: Hoare triple {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:32:51,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-15 06:32:51,843 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-15 06:32:51,844 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:51,844 INFO L290 TraceCheckUtils]: 6: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:51,845 INFO L290 TraceCheckUtils]: 7: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:51,846 INFO L290 TraceCheckUtils]: 8: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15564#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:32:51,846 INFO L290 TraceCheckUtils]: 9: Hoare triple {15564#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15559#false} is VALID [2022-04-15 06:32:51,846 INFO L272 TraceCheckUtils]: 10: Hoare triple {15559#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15559#false} is VALID [2022-04-15 06:32:51,846 INFO L290 TraceCheckUtils]: 11: Hoare triple {15559#false} ~cond := #in~cond; {15559#false} is VALID [2022-04-15 06:32:51,846 INFO L290 TraceCheckUtils]: 12: Hoare triple {15559#false} assume 0 == ~cond; {15559#false} is VALID [2022-04-15 06:32:51,846 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-15 06:32:51,846 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:51,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:32:51,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218616400] [2022-04-15 06:32:51,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1218616400] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:32:51,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [199180279] [2022-04-15 06:32:51,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:32:51,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:32:51,847 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:32:51,848 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:32:51,848 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-04-15 06:32:51,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:51,873 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:32:51,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:32:51,880 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:32:52,053 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15558#true} is VALID [2022-04-15 06:32:52,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-15 06:32:52,053 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-15 06:32:52,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-15 06:32:52,053 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-15 06:32:52,054 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:52,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:52,055 INFO L290 TraceCheckUtils]: 7: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:32:52,056 INFO L290 TraceCheckUtils]: 8: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15593#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:32:52,056 INFO L290 TraceCheckUtils]: 9: Hoare triple {15593#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15559#false} is VALID [2022-04-15 06:32:52,057 INFO L272 TraceCheckUtils]: 10: Hoare triple {15559#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15559#false} is VALID [2022-04-15 06:32:52,057 INFO L290 TraceCheckUtils]: 11: Hoare triple {15559#false} ~cond := #in~cond; {15559#false} is VALID [2022-04-15 06:32:52,057 INFO L290 TraceCheckUtils]: 12: Hoare triple {15559#false} assume 0 == ~cond; {15559#false} is VALID [2022-04-15 06:32:52,057 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-15 06:32:52,057 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:52,057 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:32:52,960 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-15 06:32:52,960 INFO L290 TraceCheckUtils]: 12: Hoare triple {15612#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {15559#false} is VALID [2022-04-15 06:32:52,961 INFO L290 TraceCheckUtils]: 11: Hoare triple {15616#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {15612#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:32:52,961 INFO L272 TraceCheckUtils]: 10: Hoare triple {15620#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15616#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:32:52,961 INFO L290 TraceCheckUtils]: 9: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15620#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:32:52,963 INFO L290 TraceCheckUtils]: 8: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:52,964 INFO L290 TraceCheckUtils]: 7: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:53,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {15634#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_938_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_938_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_938_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:32:53,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15634#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_938_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_938_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_938_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:32:53,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-15 06:32:53,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-15 06:32:53,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-15 06:32:53,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-15 06:32:53,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15558#true} is VALID [2022-04-15 06:32:53,176 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:32:53,176 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [199180279] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:32:53,176 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:32:53,176 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:32:55,563 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:32:55,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [990348620] [2022-04-15 06:32:55,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [990348620] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:32:55,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:32:55,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [62] imperfect sequences [] total 62 [2022-04-15 06:32:55,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98129311] [2022-04-15 06:32:55,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:32:55,564 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-15 06:32:55,564 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:32:55,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:32:55,626 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:32:55,626 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 62 states [2022-04-15 06:32:55,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:32:55,627 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2022-04-15 06:32:55,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=405, Invalid=4287, Unknown=0, NotChecked=0, Total=4692 [2022-04-15 06:32:55,627 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. Second operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:03,404 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2022-04-15 06:33:03,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-04-15 06:33:03,404 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-15 06:33:03,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:33:03,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 114 transitions. [2022-04-15 06:33:03,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 114 transitions. [2022-04-15 06:33:03,406 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 62 states and 114 transitions. [2022-04-15 06:33:03,486 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:03,487 INFO L225 Difference]: With dead ends: 114 [2022-04-15 06:33:03,487 INFO L226 Difference]: Without dead ends: 106 [2022-04-15 06:33:03,488 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 30 SyntacticMatches, 32 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3471 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=906, Invalid=15350, Unknown=0, NotChecked=0, Total=16256 [2022-04-15 06:33:03,488 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 39 mSDsluCounter, 297 mSDsCounter, 0 mSdLazyCounter, 5665 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 5726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 5665 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:33:03,489 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [39 Valid, 309 Invalid, 5726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 5665 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2022-04-15 06:33:03,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-15 06:33:03,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-04-15 06:33:03,634 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:33:03,634 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,634 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,634 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:03,635 INFO L93 Difference]: Finished difference Result 106 states and 108 transitions. [2022-04-15 06:33:03,635 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-15 06:33:03,636 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:03,636 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:03,636 INFO L74 IsIncluded]: Start isIncluded. First operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-15 06:33:03,636 INFO L87 Difference]: Start difference. First operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-15 06:33:03,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:03,637 INFO L93 Difference]: Finished difference Result 106 states and 108 transitions. [2022-04-15 06:33:03,637 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-15 06:33:03,637 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:03,637 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:03,637 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:33:03,637 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:33:03,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 108 transitions. [2022-04-15 06:33:03,638 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 108 transitions. Word has length 101 [2022-04-15 06:33:03,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:33:03,638 INFO L478 AbstractCegarLoop]: Abstraction has 106 states and 108 transitions. [2022-04-15 06:33:03,639 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:03,639 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 106 states and 108 transitions. [2022-04-15 06:33:03,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:03,772 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-15 06:33:03,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-04-15 06:33:03,772 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:33:03,772 INFO L499 BasicCegarLoop]: trace histogram [31, 31, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:33:03,788 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-04-15 06:33:03,973 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:03,973 INFO L403 AbstractCegarLoop]: === Iteration 33 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:33:03,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:33:03,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1338668813, now seen corresponding path program 30 times [2022-04-15 06:33:03,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:03,974 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1043481577] [2022-04-15 06:33:06,948 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:12,415 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:33:12,648 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:12,649 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:33:12,651 INFO L85 PathProgramCache]: Analyzing trace with hash -89438033, now seen corresponding path program 1 times [2022-04-15 06:33:12,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:33:12,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283117395] [2022-04-15 06:33:12,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:12,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:33:12,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:12,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:33:12,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:12,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-15 06:33:12,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-15 06:33:12,699 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-15 06:33:12,699 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:33:12,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-15 06:33:12,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-15 06:33:12,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-15 06:33:12,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-15 06:33:12,700 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16488#(= main_~x~0 0)} is VALID [2022-04-15 06:33:12,701 INFO L290 TraceCheckUtils]: 6: Hoare triple {16488#(= main_~x~0 0)} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16488#(= main_~x~0 0)} is VALID [2022-04-15 06:33:12,701 INFO L290 TraceCheckUtils]: 7: Hoare triple {16488#(= main_~x~0 0)} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16488#(= main_~x~0 0)} is VALID [2022-04-15 06:33:12,702 INFO L290 TraceCheckUtils]: 8: Hoare triple {16488#(= main_~x~0 0)} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16489#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:33:12,702 INFO L290 TraceCheckUtils]: 9: Hoare triple {16489#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16484#false} is VALID [2022-04-15 06:33:12,703 INFO L272 TraceCheckUtils]: 10: Hoare triple {16484#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16484#false} is VALID [2022-04-15 06:33:12,703 INFO L290 TraceCheckUtils]: 11: Hoare triple {16484#false} ~cond := #in~cond; {16484#false} is VALID [2022-04-15 06:33:12,703 INFO L290 TraceCheckUtils]: 12: Hoare triple {16484#false} assume 0 == ~cond; {16484#false} is VALID [2022-04-15 06:33:12,703 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-15 06:33:12,703 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:12,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:33:12,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283117395] [2022-04-15 06:33:12,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283117395] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:33:12,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [494821581] [2022-04-15 06:33:12,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:12,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:12,703 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:33:12,704 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:33:12,705 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-04-15 06:33:12,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:12,736 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:33:12,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:12,744 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:33:12,947 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16483#true} is VALID [2022-04-15 06:33:12,948 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-15 06:33:12,948 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-15 06:33:12,948 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-15 06:33:12,948 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-15 06:33:12,948 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:12,949 INFO L290 TraceCheckUtils]: 6: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:12,950 INFO L290 TraceCheckUtils]: 7: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:12,950 INFO L290 TraceCheckUtils]: 8: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16519#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:33:12,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {16519#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16484#false} is VALID [2022-04-15 06:33:12,952 INFO L272 TraceCheckUtils]: 10: Hoare triple {16484#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16484#false} is VALID [2022-04-15 06:33:12,952 INFO L290 TraceCheckUtils]: 11: Hoare triple {16484#false} ~cond := #in~cond; {16484#false} is VALID [2022-04-15 06:33:12,952 INFO L290 TraceCheckUtils]: 12: Hoare triple {16484#false} assume 0 == ~cond; {16484#false} is VALID [2022-04-15 06:33:12,952 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-15 06:33:12,952 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:12,952 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:33:14,001 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-15 06:33:14,001 INFO L290 TraceCheckUtils]: 12: Hoare triple {16538#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {16484#false} is VALID [2022-04-15 06:33:14,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {16542#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {16538#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:33:14,002 INFO L272 TraceCheckUtils]: 10: Hoare triple {16546#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16542#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:33:14,003 INFO L290 TraceCheckUtils]: 9: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16546#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:33:14,005 INFO L290 TraceCheckUtils]: 8: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:14,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:14,028 INFO L290 TraceCheckUtils]: 6: Hoare triple {16560#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_985_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_985_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_985_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:14,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16560#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_985_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_985_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_985_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:33:14,029 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-15 06:33:14,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-15 06:33:14,029 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-15 06:33:14,029 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-15 06:33:14,029 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16483#true} is VALID [2022-04-15 06:33:14,030 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:14,030 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [494821581] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:33:14,030 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:33:14,030 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:33:15,678 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:33:15,678 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1043481577] [2022-04-15 06:33:15,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1043481577] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:33:15,678 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:33:15,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [34] imperfect sequences [] total 34 [2022-04-15 06:33:15,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5538519] [2022-04-15 06:33:15,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:33:15,679 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 104 [2022-04-15 06:33:15,679 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:33:15,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:15,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:15,758 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-15 06:33:15,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:15,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-15 06:33:15,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=1538, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 06:33:15,758 INFO L87 Difference]: Start difference. First operand 106 states and 108 transitions. Second operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:20,193 INFO L93 Difference]: Finished difference Result 118 states and 122 transitions. [2022-04-15 06:33:20,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-15 06:33:20,194 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 104 [2022-04-15 06:33:20,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:33:20,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 118 transitions. [2022-04-15 06:33:20,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 118 transitions. [2022-04-15 06:33:20,195 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 118 transitions. [2022-04-15 06:33:20,282 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:20,283 INFO L225 Difference]: With dead ends: 118 [2022-04-15 06:33:20,283 INFO L226 Difference]: Without dead ends: 110 [2022-04-15 06:33:20,287 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 29 SyntacticMatches, 63 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1066 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=401, Invalid=4855, Unknown=0, NotChecked=0, Total=5256 [2022-04-15 06:33:20,287 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 72 mSDsluCounter, 157 mSDsCounter, 0 mSdLazyCounter, 3101 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 3134 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 3101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:33:20,288 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [72 Valid, 169 Invalid, 3134 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 3101 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-15 06:33:20,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-04-15 06:33:20,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 109. [2022-04-15 06:33:20,425 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:33:20,425 INFO L82 GeneralOperation]: Start isEquivalent. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,425 INFO L74 IsIncluded]: Start isIncluded. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,425 INFO L87 Difference]: Start difference. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:20,427 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2022-04-15 06:33:20,427 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-15 06:33:20,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:20,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:20,428 INFO L74 IsIncluded]: Start isIncluded. First operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 110 states. [2022-04-15 06:33:20,428 INFO L87 Difference]: Start difference. First operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 110 states. [2022-04-15 06:33:20,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:20,429 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2022-04-15 06:33:20,429 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-15 06:33:20,429 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:20,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:20,430 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:33:20,430 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:33:20,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 111 transitions. [2022-04-15 06:33:20,431 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 111 transitions. Word has length 104 [2022-04-15 06:33:20,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:33:20,431 INFO L478 AbstractCegarLoop]: Abstraction has 109 states and 111 transitions. [2022-04-15 06:33:20,432 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:20,432 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 109 states and 111 transitions. [2022-04-15 06:33:20,595 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:20,596 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 111 transitions. [2022-04-15 06:33:20,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-04-15 06:33:20,596 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:33:20,596 INFO L499 BasicCegarLoop]: trace histogram [32, 32, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:33:20,613 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2022-04-15 06:33:20,802 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2022-04-15 06:33:20,802 INFO L403 AbstractCegarLoop]: === Iteration 34 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:33:20,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:33:20,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1969125445, now seen corresponding path program 31 times [2022-04-15 06:33:20,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:20,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1814213874] [2022-04-15 06:33:21,631 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:23,869 WARN L970 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:33:26,198 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:26,199 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:33:26,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1960094127, now seen corresponding path program 1 times [2022-04-15 06:33:26,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:33:26,202 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828258884] [2022-04-15 06:33:26,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:26,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:33:26,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:26,244 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:33:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:26,247 INFO L290 TraceCheckUtils]: 0: Hoare triple {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:33:26,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-15 06:33:26,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-15 06:33:26,249 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17352#(= main_~x~0 0)} is VALID [2022-04-15 06:33:26,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {17352#(= main_~x~0 0)} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17352#(= main_~x~0 0)} is VALID [2022-04-15 06:33:26,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {17352#(= main_~x~0 0)} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17352#(= main_~x~0 0)} is VALID [2022-04-15 06:33:26,251 INFO L290 TraceCheckUtils]: 8: Hoare triple {17352#(= main_~x~0 0)} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17353#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:33:26,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {17353#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17348#false} is VALID [2022-04-15 06:33:26,251 INFO L272 TraceCheckUtils]: 10: Hoare triple {17348#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17348#false} is VALID [2022-04-15 06:33:26,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {17348#false} ~cond := #in~cond; {17348#false} is VALID [2022-04-15 06:33:26,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {17348#false} assume 0 == ~cond; {17348#false} is VALID [2022-04-15 06:33:26,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-15 06:33:26,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:26,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:33:26,252 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828258884] [2022-04-15 06:33:26,252 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [828258884] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:33:26,252 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [711344799] [2022-04-15 06:33:26,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:26,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:26,252 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:33:26,265 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:33:26,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-04-15 06:33:26,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:26,294 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:33:26,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:26,302 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:33:26,471 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17347#true} is VALID [2022-04-15 06:33:26,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-15 06:33:26,471 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-15 06:33:26,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-15 06:33:26,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-15 06:33:26,472 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:26,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:26,473 INFO L290 TraceCheckUtils]: 7: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:26,479 INFO L290 TraceCheckUtils]: 8: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17383#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:33:26,480 INFO L290 TraceCheckUtils]: 9: Hoare triple {17383#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17348#false} is VALID [2022-04-15 06:33:26,480 INFO L272 TraceCheckUtils]: 10: Hoare triple {17348#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17348#false} is VALID [2022-04-15 06:33:26,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {17348#false} ~cond := #in~cond; {17348#false} is VALID [2022-04-15 06:33:26,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {17348#false} assume 0 == ~cond; {17348#false} is VALID [2022-04-15 06:33:26,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-15 06:33:26,481 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:26,481 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:33:27,404 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-15 06:33:27,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {17402#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {17348#false} is VALID [2022-04-15 06:33:27,405 INFO L290 TraceCheckUtils]: 11: Hoare triple {17406#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {17402#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:33:27,405 INFO L272 TraceCheckUtils]: 10: Hoare triple {17410#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17406#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:33:27,405 INFO L290 TraceCheckUtils]: 9: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17410#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:33:27,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:27,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:27,872 INFO L290 TraceCheckUtils]: 6: Hoare triple {17424#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1033_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1033_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1033_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:27,873 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17424#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1033_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1033_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1033_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:33:27,873 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-15 06:33:27,873 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-15 06:33:27,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-15 06:33:27,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-15 06:33:27,874 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17347#true} is VALID [2022-04-15 06:33:27,874 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:27,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [711344799] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:33:27,874 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:33:27,874 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:33:29,608 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:33:29,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1814213874] [2022-04-15 06:33:29,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1814213874] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:33:29,608 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:33:29,608 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [35] imperfect sequences [] total 35 [2022-04-15 06:33:29,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866143015] [2022-04-15 06:33:29,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:33:29,608 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 107 [2022-04-15 06:33:29,609 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:33:29,609 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:29,676 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:29,676 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-15 06:33:29,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:29,676 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-15 06:33:29,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=1617, Unknown=0, NotChecked=0, Total=1806 [2022-04-15 06:33:29,677 INFO L87 Difference]: Start difference. First operand 109 states and 111 transitions. Second operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:34,087 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2022-04-15 06:33:34,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-04-15 06:33:34,087 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 107 [2022-04-15 06:33:34,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:33:34,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 121 transitions. [2022-04-15 06:33:34,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 121 transitions. [2022-04-15 06:33:34,089 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 35 states and 121 transitions. [2022-04-15 06:33:34,174 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 121 edges. 121 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:34,175 INFO L225 Difference]: With dead ends: 121 [2022-04-15 06:33:34,175 INFO L226 Difference]: Without dead ends: 113 [2022-04-15 06:33:34,175 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 29 SyntacticMatches, 65 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1116 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=413, Invalid=5137, Unknown=0, NotChecked=0, Total=5550 [2022-04-15 06:33:34,176 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 74 mSDsluCounter, 162 mSDsCounter, 0 mSdLazyCounter, 3297 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 174 SdHoareTripleChecker+Invalid, 3331 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 3297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:33:34,176 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [74 Valid, 174 Invalid, 3331 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 3297 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-15 06:33:34,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-15 06:33:34,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 112. [2022-04-15 06:33:34,326 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:33:34,327 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,327 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,327 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:34,328 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2022-04-15 06:33:34,328 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2022-04-15 06:33:34,328 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:34,328 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:34,328 INFO L74 IsIncluded]: Start isIncluded. First operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-15 06:33:34,328 INFO L87 Difference]: Start difference. First operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-15 06:33:34,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:34,329 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2022-04-15 06:33:34,329 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2022-04-15 06:33:34,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:34,330 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:34,330 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:33:34,330 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:33:34,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 114 transitions. [2022-04-15 06:33:34,331 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 114 transitions. Word has length 107 [2022-04-15 06:33:34,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:33:34,331 INFO L478 AbstractCegarLoop]: Abstraction has 112 states and 114 transitions. [2022-04-15 06:33:34,331 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:34,331 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 112 states and 114 transitions. [2022-04-15 06:33:34,484 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:34,484 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 114 transitions. [2022-04-15 06:33:34,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-04-15 06:33:34,485 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:33:34,485 INFO L499 BasicCegarLoop]: trace histogram [33, 33, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:33:34,506 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2022-04-15 06:33:34,685 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,32 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:34,685 INFO L403 AbstractCegarLoop]: === Iteration 35 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:33:34,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:33:34,686 INFO L85 PathProgramCache]: Analyzing trace with hash 2010663949, now seen corresponding path program 32 times [2022-04-15 06:33:34,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:34,686 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [550827407] [2022-04-15 06:33:37,925 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:33:38,143 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:42,122 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:33:42,257 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:42,258 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:33:42,265 INFO L85 PathProgramCache]: Analyzing trace with hash -285341009, now seen corresponding path program 1 times [2022-04-15 06:33:42,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:33:42,265 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722348513] [2022-04-15 06:33:42,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:42,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:33:42,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:42,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:33:42,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:42,305 INFO L290 TraceCheckUtils]: 0: Hoare triple {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:33:42,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-15 06:33:42,306 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-15 06:33:42,307 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18237#(= main_~x~0 0)} is VALID [2022-04-15 06:33:42,307 INFO L290 TraceCheckUtils]: 6: Hoare triple {18237#(= main_~x~0 0)} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18237#(= main_~x~0 0)} is VALID [2022-04-15 06:33:42,307 INFO L290 TraceCheckUtils]: 7: Hoare triple {18237#(= main_~x~0 0)} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18237#(= main_~x~0 0)} is VALID [2022-04-15 06:33:42,308 INFO L290 TraceCheckUtils]: 8: Hoare triple {18237#(= main_~x~0 0)} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18238#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:33:42,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {18238#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18233#false} is VALID [2022-04-15 06:33:42,309 INFO L272 TraceCheckUtils]: 10: Hoare triple {18233#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18233#false} is VALID [2022-04-15 06:33:42,309 INFO L290 TraceCheckUtils]: 11: Hoare triple {18233#false} ~cond := #in~cond; {18233#false} is VALID [2022-04-15 06:33:42,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {18233#false} assume 0 == ~cond; {18233#false} is VALID [2022-04-15 06:33:42,309 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-15 06:33:42,309 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:42,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:33:42,309 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722348513] [2022-04-15 06:33:42,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [722348513] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:33:42,309 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [997622920] [2022-04-15 06:33:42,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:42,310 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:42,310 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:33:42,310 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:33:42,311 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-04-15 06:33:42,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:42,336 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:33:42,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:42,344 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:33:42,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18232#true} is VALID [2022-04-15 06:33:42,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-15 06:33:42,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-15 06:33:42,520 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-15 06:33:42,520 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-15 06:33:42,521 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:42,521 INFO L290 TraceCheckUtils]: 6: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:42,522 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:42,522 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18268#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:33:42,523 INFO L290 TraceCheckUtils]: 9: Hoare triple {18268#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18233#false} is VALID [2022-04-15 06:33:42,523 INFO L272 TraceCheckUtils]: 10: Hoare triple {18233#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18233#false} is VALID [2022-04-15 06:33:42,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {18233#false} ~cond := #in~cond; {18233#false} is VALID [2022-04-15 06:33:42,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {18233#false} assume 0 == ~cond; {18233#false} is VALID [2022-04-15 06:33:42,523 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-15 06:33:42,523 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:42,524 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:33:43,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-15 06:33:43,488 INFO L290 TraceCheckUtils]: 12: Hoare triple {18287#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {18233#false} is VALID [2022-04-15 06:33:43,489 INFO L290 TraceCheckUtils]: 11: Hoare triple {18291#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {18287#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:33:43,489 INFO L272 TraceCheckUtils]: 10: Hoare triple {18295#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18291#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:33:43,489 INFO L290 TraceCheckUtils]: 9: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18295#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:33:43,499 INFO L290 TraceCheckUtils]: 8: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:43,500 INFO L290 TraceCheckUtils]: 7: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:43,523 INFO L290 TraceCheckUtils]: 6: Hoare triple {18309#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1082_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1082_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1082_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:43,523 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18309#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1082_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1082_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1082_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:33:43,524 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-15 06:33:43,524 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-15 06:33:43,524 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-15 06:33:43,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-15 06:33:43,524 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18232#true} is VALID [2022-04-15 06:33:43,524 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:43,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [997622920] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:33:43,524 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:33:43,524 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:33:45,304 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:33:45,305 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [550827407] [2022-04-15 06:33:45,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [550827407] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:33:45,305 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:33:45,305 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [36] imperfect sequences [] total 36 [2022-04-15 06:33:45,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795398305] [2022-04-15 06:33:45,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:33:45,305 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 110 [2022-04-15 06:33:45,305 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:33:45,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:45,374 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:45,374 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-15 06:33:45,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:45,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-15 06:33:45,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1698, Unknown=0, NotChecked=0, Total=1892 [2022-04-15 06:33:45,375 INFO L87 Difference]: Start difference. First operand 112 states and 114 transitions. Second operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:49,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:49,970 INFO L93 Difference]: Finished difference Result 124 states and 128 transitions. [2022-04-15 06:33:49,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-15 06:33:49,970 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 110 [2022-04-15 06:33:49,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:33:49,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:49,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 124 transitions. [2022-04-15 06:33:49,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:49,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 124 transitions. [2022-04-15 06:33:49,972 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 124 transitions. [2022-04-15 06:33:50,057 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 124 edges. 124 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:50,058 INFO L225 Difference]: With dead ends: 124 [2022-04-15 06:33:50,058 INFO L226 Difference]: Without dead ends: 116 [2022-04-15 06:33:50,058 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 29 SyntacticMatches, 67 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1167 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=425, Invalid=5427, Unknown=0, NotChecked=0, Total=5852 [2022-04-15 06:33:50,059 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 76 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 3499 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 3534 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 3499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:33:50,059 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [76 Valid, 179 Invalid, 3534 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 3499 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-15 06:33:50,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-15 06:33:50,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 115. [2022-04-15 06:33:50,193 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:33:50,193 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:50,193 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:50,194 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:50,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:50,194 INFO L93 Difference]: Finished difference Result 116 states and 118 transitions. [2022-04-15 06:33:50,195 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 118 transitions. [2022-04-15 06:33:50,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:50,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:50,198 INFO L74 IsIncluded]: Start isIncluded. First operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 116 states. [2022-04-15 06:33:50,198 INFO L87 Difference]: Start difference. First operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 116 states. [2022-04-15 06:33:50,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:33:50,203 INFO L93 Difference]: Finished difference Result 116 states and 118 transitions. [2022-04-15 06:33:50,203 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 118 transitions. [2022-04-15 06:33:50,207 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:33:50,207 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:33:50,207 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:33:50,207 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:33:50,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:50,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 117 transitions. [2022-04-15 06:33:50,208 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 117 transitions. Word has length 110 [2022-04-15 06:33:50,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:33:50,209 INFO L478 AbstractCegarLoop]: Abstraction has 115 states and 117 transitions. [2022-04-15 06:33:50,209 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:50,209 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 115 states and 117 transitions. [2022-04-15 06:33:50,354 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:50,354 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 117 transitions. [2022-04-15 06:33:50,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2022-04-15 06:33:50,354 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:33:50,354 INFO L499 BasicCegarLoop]: trace histogram [34, 34, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:33:50,372 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-04-15 06:33:50,555 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,33 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:50,555 INFO L403 AbstractCegarLoop]: === Iteration 36 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:33:50,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:33:50,555 INFO L85 PathProgramCache]: Analyzing trace with hash -1761311931, now seen corresponding path program 33 times [2022-04-15 06:33:50,555 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:50,555 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [480677224] [2022-04-15 06:33:51,469 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:51,827 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:33:51,828 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:33:51,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1764191151, now seen corresponding path program 1 times [2022-04-15 06:33:51,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:33:51,830 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780063036] [2022-04-15 06:33:51,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:51,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:33:51,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:51,884 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:33:51,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:51,887 INFO L290 TraceCheckUtils]: 0: Hoare triple {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-15 06:33:51,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-15 06:33:51,887 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-15 06:33:51,887 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:33:51,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-15 06:33:51,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-15 06:33:51,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-15 06:33:51,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-15 06:33:51,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19143#(= main_~x~0 0)} is VALID [2022-04-15 06:33:51,889 INFO L290 TraceCheckUtils]: 6: Hoare triple {19143#(= main_~x~0 0)} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19143#(= main_~x~0 0)} is VALID [2022-04-15 06:33:51,889 INFO L290 TraceCheckUtils]: 7: Hoare triple {19143#(= main_~x~0 0)} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19143#(= main_~x~0 0)} is VALID [2022-04-15 06:33:51,890 INFO L290 TraceCheckUtils]: 8: Hoare triple {19143#(= main_~x~0 0)} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19144#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:33:51,890 INFO L290 TraceCheckUtils]: 9: Hoare triple {19144#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19139#false} is VALID [2022-04-15 06:33:51,890 INFO L272 TraceCheckUtils]: 10: Hoare triple {19139#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19139#false} is VALID [2022-04-15 06:33:51,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {19139#false} ~cond := #in~cond; {19139#false} is VALID [2022-04-15 06:33:51,891 INFO L290 TraceCheckUtils]: 12: Hoare triple {19139#false} assume 0 == ~cond; {19139#false} is VALID [2022-04-15 06:33:51,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-15 06:33:51,891 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:51,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:33:51,891 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780063036] [2022-04-15 06:33:51,891 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780063036] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:33:51,891 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1826102883] [2022-04-15 06:33:51,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:33:51,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:33:51,891 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:33:51,892 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:33:51,893 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-04-15 06:33:51,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:51,916 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:33:51,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:33:51,923 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:33:52,105 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19138#true} is VALID [2022-04-15 06:33:52,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-15 06:33:52,105 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-15 06:33:52,105 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-15 06:33:52,105 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-15 06:33:52,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:52,106 INFO L290 TraceCheckUtils]: 6: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:52,107 INFO L290 TraceCheckUtils]: 7: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:33:52,107 INFO L290 TraceCheckUtils]: 8: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19174#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:33:52,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {19174#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19139#false} is VALID [2022-04-15 06:33:52,109 INFO L272 TraceCheckUtils]: 10: Hoare triple {19139#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19139#false} is VALID [2022-04-15 06:33:52,109 INFO L290 TraceCheckUtils]: 11: Hoare triple {19139#false} ~cond := #in~cond; {19139#false} is VALID [2022-04-15 06:33:52,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {19139#false} assume 0 == ~cond; {19139#false} is VALID [2022-04-15 06:33:52,109 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-15 06:33:52,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:52,109 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:33:53,271 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-15 06:33:53,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {19193#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {19139#false} is VALID [2022-04-15 06:33:53,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {19197#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {19193#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:33:53,272 INFO L272 TraceCheckUtils]: 10: Hoare triple {19201#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19197#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:33:53,272 INFO L290 TraceCheckUtils]: 9: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19201#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:33:53,276 INFO L290 TraceCheckUtils]: 8: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:53,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:53,290 INFO L290 TraceCheckUtils]: 6: Hoare triple {19215#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1132_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1132_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1132_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:33:53,291 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19215#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1132_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1132_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1132_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:33:53,291 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-15 06:33:53,291 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-15 06:33:53,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-15 06:33:53,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-15 06:33:53,291 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19138#true} is VALID [2022-04-15 06:33:53,292 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:33:53,292 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1826102883] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:33:53,292 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:33:53,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:33:55,134 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:33:55,134 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [480677224] [2022-04-15 06:33:55,134 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [480677224] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:33:55,134 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:33:55,134 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [37] imperfect sequences [] total 37 [2022-04-15 06:33:55,134 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891623310] [2022-04-15 06:33:55,135 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:33:55,135 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 113 [2022-04-15 06:33:55,135 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:33:55,135 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:33:55,204 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:33:55,204 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-15 06:33:55,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:33:55,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-15 06:33:55,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1781, Unknown=0, NotChecked=0, Total=1980 [2022-04-15 06:33:55,205 INFO L87 Difference]: Start difference. First operand 115 states and 117 transitions. Second operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:00,064 INFO L93 Difference]: Finished difference Result 127 states and 131 transitions. [2022-04-15 06:34:00,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-15 06:34:00,064 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 113 [2022-04-15 06:34:00,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:00,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 127 transitions. [2022-04-15 06:34:00,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 127 transitions. [2022-04-15 06:34:00,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 127 transitions. [2022-04-15 06:34:00,153 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:00,155 INFO L225 Difference]: With dead ends: 127 [2022-04-15 06:34:00,155 INFO L226 Difference]: Without dead ends: 119 [2022-04-15 06:34:00,155 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 29 SyntacticMatches, 69 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1219 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=437, Invalid=5725, Unknown=0, NotChecked=0, Total=6162 [2022-04-15 06:34:00,156 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 78 mSDsluCounter, 172 mSDsCounter, 0 mSdLazyCounter, 3707 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 3743 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 3707 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:00,156 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [78 Valid, 184 Invalid, 3743 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 3707 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2022-04-15 06:34:00,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-04-15 06:34:00,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 118. [2022-04-15 06:34:00,300 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:00,300 INFO L82 GeneralOperation]: Start isEquivalent. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,300 INFO L74 IsIncluded]: Start isIncluded. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,300 INFO L87 Difference]: Start difference. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:00,301 INFO L93 Difference]: Finished difference Result 119 states and 121 transitions. [2022-04-15 06:34:00,302 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 121 transitions. [2022-04-15 06:34:00,302 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:00,302 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:00,302 INFO L74 IsIncluded]: Start isIncluded. First operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-15 06:34:00,302 INFO L87 Difference]: Start difference. First operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-15 06:34:00,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:00,303 INFO L93 Difference]: Finished difference Result 119 states and 121 transitions. [2022-04-15 06:34:00,303 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 121 transitions. [2022-04-15 06:34:00,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:00,303 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:00,303 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:00,303 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:00,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 120 transitions. [2022-04-15 06:34:00,304 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 120 transitions. Word has length 113 [2022-04-15 06:34:00,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:00,305 INFO L478 AbstractCegarLoop]: Abstraction has 118 states and 120 transitions. [2022-04-15 06:34:00,305 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:00,305 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 118 states and 120 transitions. [2022-04-15 06:34:00,450 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 120 edges. 120 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:00,451 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 120 transitions. [2022-04-15 06:34:00,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2022-04-15 06:34:00,451 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:00,451 INFO L499 BasicCegarLoop]: trace histogram [35, 35, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:00,469 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:00,655 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2022-04-15 06:34:00,655 INFO L403 AbstractCegarLoop]: === Iteration 37 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:00,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:00,656 INFO L85 PathProgramCache]: Analyzing trace with hash 829579533, now seen corresponding path program 34 times [2022-04-15 06:34:00,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:00,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1338860263] [2022-04-15 06:34:01,758 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:06,279 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:34:06,452 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:06,453 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:34:06,456 INFO L85 PathProgramCache]: Analyzing trace with hash -481243985, now seen corresponding path program 1 times [2022-04-15 06:34:06,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:06,456 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913876983] [2022-04-15 06:34:06,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:06,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:06,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:06,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:06,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:06,517 INFO L290 TraceCheckUtils]: 0: Hoare triple {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-15 06:34:06,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-15 06:34:06,517 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-15 06:34:06,518 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:06,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-15 06:34:06,518 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-15 06:34:06,518 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-15 06:34:06,518 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-15 06:34:06,518 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20070#(= main_~x~0 0)} is VALID [2022-04-15 06:34:06,519 INFO L290 TraceCheckUtils]: 6: Hoare triple {20070#(= main_~x~0 0)} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20070#(= main_~x~0 0)} is VALID [2022-04-15 06:34:06,519 INFO L290 TraceCheckUtils]: 7: Hoare triple {20070#(= main_~x~0 0)} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20070#(= main_~x~0 0)} is VALID [2022-04-15 06:34:06,520 INFO L290 TraceCheckUtils]: 8: Hoare triple {20070#(= main_~x~0 0)} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20071#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:34:06,521 INFO L290 TraceCheckUtils]: 9: Hoare triple {20071#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20066#false} is VALID [2022-04-15 06:34:06,521 INFO L272 TraceCheckUtils]: 10: Hoare triple {20066#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20066#false} is VALID [2022-04-15 06:34:06,521 INFO L290 TraceCheckUtils]: 11: Hoare triple {20066#false} ~cond := #in~cond; {20066#false} is VALID [2022-04-15 06:34:06,521 INFO L290 TraceCheckUtils]: 12: Hoare triple {20066#false} assume 0 == ~cond; {20066#false} is VALID [2022-04-15 06:34:06,521 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-15 06:34:06,521 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:06,521 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:06,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913876983] [2022-04-15 06:34:06,522 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913876983] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:06,522 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1499245775] [2022-04-15 06:34:06,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:06,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:06,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:06,523 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:06,524 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-04-15 06:34:06,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:06,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:34:06,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:06,558 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:06,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20065#true} is VALID [2022-04-15 06:34:06,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-15 06:34:06,742 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-15 06:34:06,742 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-15 06:34:06,742 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-15 06:34:06,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:06,743 INFO L290 TraceCheckUtils]: 6: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:06,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:06,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20101#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:34:06,745 INFO L290 TraceCheckUtils]: 9: Hoare triple {20101#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20066#false} is VALID [2022-04-15 06:34:06,746 INFO L272 TraceCheckUtils]: 10: Hoare triple {20066#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20066#false} is VALID [2022-04-15 06:34:06,746 INFO L290 TraceCheckUtils]: 11: Hoare triple {20066#false} ~cond := #in~cond; {20066#false} is VALID [2022-04-15 06:34:06,746 INFO L290 TraceCheckUtils]: 12: Hoare triple {20066#false} assume 0 == ~cond; {20066#false} is VALID [2022-04-15 06:34:06,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-15 06:34:06,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:06,746 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:08,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-15 06:34:08,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {20120#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {20066#false} is VALID [2022-04-15 06:34:08,164 INFO L290 TraceCheckUtils]: 11: Hoare triple {20124#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {20120#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:34:08,171 INFO L272 TraceCheckUtils]: 10: Hoare triple {20128#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20124#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:34:08,171 INFO L290 TraceCheckUtils]: 9: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20128#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:34:08,173 INFO L290 TraceCheckUtils]: 8: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:08,173 INFO L290 TraceCheckUtils]: 7: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:08,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {20142#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1183_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1183_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1183_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:08,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20142#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1183_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1183_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1183_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:34:08,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-15 06:34:08,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-15 06:34:08,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-15 06:34:08,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-15 06:34:08,221 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20065#true} is VALID [2022-04-15 06:34:08,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:08,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1499245775] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:08,222 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:08,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:34:10,100 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:10,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1338860263] [2022-04-15 06:34:10,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1338860263] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:10,101 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:10,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [38] imperfect sequences [] total 38 [2022-04-15 06:34:10,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967935469] [2022-04-15 06:34:10,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:10,101 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 116 [2022-04-15 06:34:10,101 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:10,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:10,171 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:10,172 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-15 06:34:10,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:10,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-15 06:34:10,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=1866, Unknown=0, NotChecked=0, Total=2070 [2022-04-15 06:34:10,172 INFO L87 Difference]: Start difference. First operand 118 states and 120 transitions. Second operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:15,347 INFO L93 Difference]: Finished difference Result 130 states and 134 transitions. [2022-04-15 06:34:15,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-15 06:34:15,348 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 116 [2022-04-15 06:34:15,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:15,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 130 transitions. [2022-04-15 06:34:15,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 130 transitions. [2022-04-15 06:34:15,349 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 130 transitions. [2022-04-15 06:34:15,446 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:15,447 INFO L225 Difference]: With dead ends: 130 [2022-04-15 06:34:15,447 INFO L226 Difference]: Without dead ends: 122 [2022-04-15 06:34:15,448 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 29 SyntacticMatches, 71 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1272 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=449, Invalid=6031, Unknown=0, NotChecked=0, Total=6480 [2022-04-15 06:34:15,448 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 80 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 3921 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 3958 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 3921 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:15,448 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [80 Valid, 189 Invalid, 3958 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 3921 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-04-15 06:34:15,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2022-04-15 06:34:15,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 121. [2022-04-15 06:34:15,600 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:15,600 INFO L82 GeneralOperation]: Start isEquivalent. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,600 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,601 INFO L87 Difference]: Start difference. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:15,604 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-15 06:34:15,604 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2022-04-15 06:34:15,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:15,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:15,604 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 122 states. [2022-04-15 06:34:15,604 INFO L87 Difference]: Start difference. First operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 122 states. [2022-04-15 06:34:15,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:15,605 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-15 06:34:15,605 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2022-04-15 06:34:15,605 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:15,605 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:15,606 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:15,606 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:15,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 123 transitions. [2022-04-15 06:34:15,607 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 123 transitions. Word has length 116 [2022-04-15 06:34:15,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:15,607 INFO L478 AbstractCegarLoop]: Abstraction has 121 states and 123 transitions. [2022-04-15 06:34:15,607 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:15,607 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 121 states and 123 transitions. [2022-04-15 06:34:15,763 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 123 edges. 123 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:15,764 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 123 transitions. [2022-04-15 06:34:15,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2022-04-15 06:34:15,764 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:15,764 INFO L499 BasicCegarLoop]: trace histogram [36, 36, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:15,780 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2022-04-15 06:34:15,964 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2022-04-15 06:34:15,965 INFO L403 AbstractCegarLoop]: === Iteration 38 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:15,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:15,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1219907141, now seen corresponding path program 35 times [2022-04-15 06:34:15,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:15,966 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1098971766] [2022-04-15 06:34:17,914 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:21,619 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:34:21,824 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:21,825 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:34:21,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1568288175, now seen corresponding path program 1 times [2022-04-15 06:34:21,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:21,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265627122] [2022-04-15 06:34:21,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:21,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:21,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:21,878 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:21,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:21,881 INFO L290 TraceCheckUtils]: 0: Hoare triple {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-15 06:34:21,881 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-15 06:34:21,881 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-15 06:34:21,882 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:21,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-15 06:34:21,882 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-15 06:34:21,882 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-15 06:34:21,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-15 06:34:21,882 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21018#(= main_~x~0 0)} is VALID [2022-04-15 06:34:21,883 INFO L290 TraceCheckUtils]: 6: Hoare triple {21018#(= main_~x~0 0)} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21018#(= main_~x~0 0)} is VALID [2022-04-15 06:34:21,883 INFO L290 TraceCheckUtils]: 7: Hoare triple {21018#(= main_~x~0 0)} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21018#(= main_~x~0 0)} is VALID [2022-04-15 06:34:21,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {21018#(= main_~x~0 0)} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21019#(<= (* 4294967296 (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296))) main_~x~0)} is VALID [2022-04-15 06:34:21,885 INFO L290 TraceCheckUtils]: 9: Hoare triple {21019#(<= (* 4294967296 (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296))) main_~x~0)} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21014#false} is VALID [2022-04-15 06:34:21,885 INFO L272 TraceCheckUtils]: 10: Hoare triple {21014#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21014#false} is VALID [2022-04-15 06:34:21,885 INFO L290 TraceCheckUtils]: 11: Hoare triple {21014#false} ~cond := #in~cond; {21014#false} is VALID [2022-04-15 06:34:21,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {21014#false} assume 0 == ~cond; {21014#false} is VALID [2022-04-15 06:34:21,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-15 06:34:21,886 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:21,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:21,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265627122] [2022-04-15 06:34:21,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [265627122] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:21,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [394584552] [2022-04-15 06:34:21,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:21,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:21,887 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:21,887 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:21,898 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-04-15 06:34:21,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:21,926 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:34:21,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:21,934 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:22,124 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21013#true} is VALID [2022-04-15 06:34:22,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-15 06:34:22,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-15 06:34:22,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-15 06:34:22,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-15 06:34:22,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:22,126 INFO L290 TraceCheckUtils]: 6: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:22,126 INFO L290 TraceCheckUtils]: 7: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:22,127 INFO L290 TraceCheckUtils]: 8: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21049#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:34:22,128 INFO L290 TraceCheckUtils]: 9: Hoare triple {21049#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21014#false} is VALID [2022-04-15 06:34:22,128 INFO L272 TraceCheckUtils]: 10: Hoare triple {21014#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21014#false} is VALID [2022-04-15 06:34:22,128 INFO L290 TraceCheckUtils]: 11: Hoare triple {21014#false} ~cond := #in~cond; {21014#false} is VALID [2022-04-15 06:34:22,128 INFO L290 TraceCheckUtils]: 12: Hoare triple {21014#false} assume 0 == ~cond; {21014#false} is VALID [2022-04-15 06:34:22,128 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-15 06:34:22,128 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:22,128 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:22,945 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-15 06:34:22,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {21068#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {21014#false} is VALID [2022-04-15 06:34:22,946 INFO L290 TraceCheckUtils]: 11: Hoare triple {21072#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {21068#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:34:22,946 INFO L272 TraceCheckUtils]: 10: Hoare triple {21076#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21072#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:34:22,947 INFO L290 TraceCheckUtils]: 9: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21076#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:34:22,949 INFO L290 TraceCheckUtils]: 8: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:22,949 INFO L290 TraceCheckUtils]: 7: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:22,954 INFO L290 TraceCheckUtils]: 6: Hoare triple {21090#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1235_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1235_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1235_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:22,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21090#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1235_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1235_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1235_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:34:22,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-15 06:34:22,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-15 06:34:22,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-15 06:34:22,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-15 06:34:22,955 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21013#true} is VALID [2022-04-15 06:34:22,955 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:22,956 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [394584552] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:22,956 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:22,956 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:34:24,912 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:24,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1098971766] [2022-04-15 06:34:24,913 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1098971766] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:24,913 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:24,913 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [39] imperfect sequences [] total 39 [2022-04-15 06:34:24,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574131913] [2022-04-15 06:34:24,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:24,913 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 119 [2022-04-15 06:34:24,913 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:24,913 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:24,987 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:24,987 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-04-15 06:34:24,987 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:24,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-04-15 06:34:24,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1953, Unknown=0, NotChecked=0, Total=2162 [2022-04-15 06:34:24,988 INFO L87 Difference]: Start difference. First operand 121 states and 123 transitions. Second operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:30,557 INFO L93 Difference]: Finished difference Result 133 states and 137 transitions. [2022-04-15 06:34:30,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-04-15 06:34:30,557 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 119 [2022-04-15 06:34:30,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:30,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 133 transitions. [2022-04-15 06:34:30,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 133 transitions. [2022-04-15 06:34:30,563 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 39 states and 133 transitions. [2022-04-15 06:34:30,661 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:30,662 INFO L225 Difference]: With dead ends: 133 [2022-04-15 06:34:30,663 INFO L226 Difference]: Without dead ends: 125 [2022-04-15 06:34:30,663 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 29 SyntacticMatches, 73 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1326 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=461, Invalid=6345, Unknown=0, NotChecked=0, Total=6806 [2022-04-15 06:34:30,663 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 82 mSDsluCounter, 182 mSDsCounter, 0 mSdLazyCounter, 4141 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 4179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 4141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:30,664 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [82 Valid, 194 Invalid, 4179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 4141 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2022-04-15 06:34:30,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2022-04-15 06:34:30,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2022-04-15 06:34:30,821 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:30,821 INFO L82 GeneralOperation]: Start isEquivalent. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,822 INFO L74 IsIncluded]: Start isIncluded. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,822 INFO L87 Difference]: Start difference. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:30,823 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2022-04-15 06:34:30,823 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2022-04-15 06:34:30,823 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:30,823 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:30,823 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 125 states. [2022-04-15 06:34:30,823 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 125 states. [2022-04-15 06:34:30,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:30,824 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2022-04-15 06:34:30,824 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2022-04-15 06:34:30,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:30,825 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:30,825 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:30,825 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:30,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 126 transitions. [2022-04-15 06:34:30,826 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 126 transitions. Word has length 119 [2022-04-15 06:34:30,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:30,826 INFO L478 AbstractCegarLoop]: Abstraction has 124 states and 126 transitions. [2022-04-15 06:34:30,826 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:30,826 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 124 states and 126 transitions. [2022-04-15 06:34:31,007 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:31,007 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 126 transitions. [2022-04-15 06:34:31,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2022-04-15 06:34:31,007 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:31,007 INFO L499 BasicCegarLoop]: trace histogram [37, 37, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:31,023 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:31,208 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-04-15 06:34:31,208 INFO L403 AbstractCegarLoop]: === Iteration 39 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:31,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:31,208 INFO L85 PathProgramCache]: Analyzing trace with hash -1301760499, now seen corresponding path program 36 times [2022-04-15 06:34:31,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:31,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1740118553] [2022-04-15 06:34:34,359 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:36,983 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:34:37,115 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:37,116 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:34:37,118 INFO L85 PathProgramCache]: Analyzing trace with hash -677146961, now seen corresponding path program 1 times [2022-04-15 06:34:37,118 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:37,119 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201010782] [2022-04-15 06:34:37,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:37,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:37,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,177 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:37,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,180 INFO L290 TraceCheckUtils]: 0: Hoare triple {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-15 06:34:37,180 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-15 06:34:37,180 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-15 06:34:37,181 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:37,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-15 06:34:37,181 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-15 06:34:37,181 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-15 06:34:37,181 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-15 06:34:37,181 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,182 INFO L290 TraceCheckUtils]: 6: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,183 INFO L290 TraceCheckUtils]: 7: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,184 INFO L290 TraceCheckUtils]: 8: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21988#(<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) (div main_~x~0 4294967296))} is VALID [2022-04-15 06:34:37,184 INFO L290 TraceCheckUtils]: 9: Hoare triple {21988#(<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) (div main_~x~0 4294967296))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21983#false} is VALID [2022-04-15 06:34:37,184 INFO L272 TraceCheckUtils]: 10: Hoare triple {21983#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21983#false} is VALID [2022-04-15 06:34:37,184 INFO L290 TraceCheckUtils]: 11: Hoare triple {21983#false} ~cond := #in~cond; {21983#false} is VALID [2022-04-15 06:34:37,184 INFO L290 TraceCheckUtils]: 12: Hoare triple {21983#false} assume 0 == ~cond; {21983#false} is VALID [2022-04-15 06:34:37,184 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-15 06:34:37,185 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:37,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:37,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201010782] [2022-04-15 06:34:37,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [201010782] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:37,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [301540456] [2022-04-15 06:34:37,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:37,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:37,185 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:37,186 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:37,187 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-04-15 06:34:37,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,214 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:34:37,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,223 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:37,388 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21982#true} is VALID [2022-04-15 06:34:37,388 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-15 06:34:37,388 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-15 06:34:37,388 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-15 06:34:37,388 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-15 06:34:37,389 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,389 INFO L290 TraceCheckUtils]: 6: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,390 INFO L290 TraceCheckUtils]: 7: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:37,390 INFO L290 TraceCheckUtils]: 8: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {22017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:34:37,392 INFO L290 TraceCheckUtils]: 9: Hoare triple {22017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21983#false} is VALID [2022-04-15 06:34:37,392 INFO L272 TraceCheckUtils]: 10: Hoare triple {21983#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21983#false} is VALID [2022-04-15 06:34:37,392 INFO L290 TraceCheckUtils]: 11: Hoare triple {21983#false} ~cond := #in~cond; {21983#false} is VALID [2022-04-15 06:34:37,392 INFO L290 TraceCheckUtils]: 12: Hoare triple {21983#false} assume 0 == ~cond; {21983#false} is VALID [2022-04-15 06:34:37,392 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-15 06:34:37,392 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:37,392 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:38,269 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-15 06:34:38,270 INFO L290 TraceCheckUtils]: 12: Hoare triple {22036#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {21983#false} is VALID [2022-04-15 06:34:38,270 INFO L290 TraceCheckUtils]: 11: Hoare triple {22040#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {22036#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:34:38,271 INFO L272 TraceCheckUtils]: 10: Hoare triple {22044#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {22040#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:34:38,271 INFO L290 TraceCheckUtils]: 9: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {22044#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:34:38,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:38,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:38,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {22058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1288_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1288_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1288_33 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:38,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {22058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1288_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1288_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1288_33 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:34:38,282 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-15 06:34:38,283 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-15 06:34:38,283 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-15 06:34:38,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-15 06:34:38,283 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21982#true} is VALID [2022-04-15 06:34:38,283 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:38,283 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [301540456] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:38,283 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:38,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:34:41,899 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:41,899 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1740118553] [2022-04-15 06:34:41,899 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1740118553] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:41,899 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:41,900 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [76] imperfect sequences [] total 76 [2022-04-15 06:34:41,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926897079] [2022-04-15 06:34:41,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:41,900 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 122 [2022-04-15 06:34:41,900 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:41,900 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:41,975 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:41,976 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 76 states [2022-04-15 06:34:41,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:41,976 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2022-04-15 06:34:41,976 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=6310, Unknown=0, NotChecked=0, Total=6806 [2022-04-15 06:34:41,976 INFO L87 Difference]: Start difference. First operand 124 states and 126 transitions. Second operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:53,614 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2022-04-15 06:34:53,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2022-04-15 06:34:53,614 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 122 [2022-04-15 06:34:53,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:53,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 135 transitions. [2022-04-15 06:34:53,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 135 transitions. [2022-04-15 06:34:53,627 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 135 transitions. [2022-04-15 06:34:53,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:53,728 INFO L225 Difference]: With dead ends: 135 [2022-04-15 06:34:53,728 INFO L226 Difference]: Without dead ends: 127 [2022-04-15 06:34:53,729 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 30 SyntacticMatches, 39 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5186 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=1116, Invalid=23064, Unknown=0, NotChecked=0, Total=24180 [2022-04-15 06:34:53,730 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 367 mSDsCounter, 0 mSdLazyCounter, 8542 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 379 SdHoareTripleChecker+Invalid, 8617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 8542 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:53,730 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 379 Invalid, 8617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 8542 Invalid, 0 Unknown, 0 Unchecked, 5.6s Time] [2022-04-15 06:34:53,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-04-15 06:34:53,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-04-15 06:34:53,896 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:53,897 INFO L82 GeneralOperation]: Start isEquivalent. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,897 INFO L74 IsIncluded]: Start isIncluded. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,897 INFO L87 Difference]: Start difference. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:53,899 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2022-04-15 06:34:53,899 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-15 06:34:53,899 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:53,899 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:53,899 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 127 states. [2022-04-15 06:34:53,899 INFO L87 Difference]: Start difference. First operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 127 states. [2022-04-15 06:34:53,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:53,901 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2022-04-15 06:34:53,901 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-15 06:34:53,901 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:53,901 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:53,901 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:53,901 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:53,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2022-04-15 06:34:53,903 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 122 [2022-04-15 06:34:53,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:53,903 INFO L478 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2022-04-15 06:34:53,903 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:34:53,903 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 127 states and 129 transitions. [2022-04-15 06:34:54,078 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 129 edges. 129 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:54,078 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-15 06:34:54,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2022-04-15 06:34:54,078 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:54,079 INFO L499 BasicCegarLoop]: trace histogram [38, 38, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:54,096 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:54,279 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-04-15 06:34:54,279 INFO L403 AbstractCegarLoop]: === Iteration 40 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:54,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:54,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1029449403, now seen corresponding path program 37 times [2022-04-15 06:34:54,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:54,280 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1705976242] [2022-04-15 06:34:56,629 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:56,987 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:34:56,988 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:34:56,990 INFO L85 PathProgramCache]: Analyzing trace with hash 1372385199, now seen corresponding path program 1 times [2022-04-15 06:34:56,990 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:56,990 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089307198] [2022-04-15 06:34:56,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:56,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:57,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:57,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:57,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:57,059 INFO L290 TraceCheckUtils]: 0: Hoare triple {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:57,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-15 06:34:57,060 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-15 06:34:57,061 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23080#(= main_~x~0 0)} is VALID [2022-04-15 06:34:57,061 INFO L290 TraceCheckUtils]: 6: Hoare triple {23080#(= main_~x~0 0)} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23080#(= main_~x~0 0)} is VALID [2022-04-15 06:34:57,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {23080#(= main_~x~0 0)} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23080#(= main_~x~0 0)} is VALID [2022-04-15 06:34:57,063 INFO L290 TraceCheckUtils]: 8: Hoare triple {23080#(= main_~x~0 0)} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23081#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:34:57,063 INFO L290 TraceCheckUtils]: 9: Hoare triple {23081#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23076#false} is VALID [2022-04-15 06:34:57,063 INFO L272 TraceCheckUtils]: 10: Hoare triple {23076#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23076#false} is VALID [2022-04-15 06:34:57,063 INFO L290 TraceCheckUtils]: 11: Hoare triple {23076#false} ~cond := #in~cond; {23076#false} is VALID [2022-04-15 06:34:57,063 INFO L290 TraceCheckUtils]: 12: Hoare triple {23076#false} assume 0 == ~cond; {23076#false} is VALID [2022-04-15 06:34:57,063 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-15 06:34:57,064 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:57,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:57,064 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089307198] [2022-04-15 06:34:57,064 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089307198] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:57,064 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [214659530] [2022-04-15 06:34:57,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:57,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:57,064 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:57,065 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:57,066 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-04-15 06:34:57,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:57,093 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:34:57,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:57,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:57,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23075#true} is VALID [2022-04-15 06:34:57,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-15 06:34:57,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-15 06:34:57,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-15 06:34:57,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-15 06:34:57,313 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:57,313 INFO L290 TraceCheckUtils]: 6: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:57,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:34:57,314 INFO L290 TraceCheckUtils]: 8: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23111#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:34:57,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {23111#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23076#false} is VALID [2022-04-15 06:34:57,315 INFO L272 TraceCheckUtils]: 10: Hoare triple {23076#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23076#false} is VALID [2022-04-15 06:34:57,315 INFO L290 TraceCheckUtils]: 11: Hoare triple {23076#false} ~cond := #in~cond; {23076#false} is VALID [2022-04-15 06:34:57,315 INFO L290 TraceCheckUtils]: 12: Hoare triple {23076#false} assume 0 == ~cond; {23076#false} is VALID [2022-04-15 06:34:57,315 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-15 06:34:57,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:57,316 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:58,162 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-15 06:34:58,163 INFO L290 TraceCheckUtils]: 12: Hoare triple {23130#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {23076#false} is VALID [2022-04-15 06:34:58,163 INFO L290 TraceCheckUtils]: 11: Hoare triple {23134#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {23130#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:34:58,164 INFO L272 TraceCheckUtils]: 10: Hoare triple {23138#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23134#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:34:58,164 INFO L290 TraceCheckUtils]: 9: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23138#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:34:58,168 INFO L290 TraceCheckUtils]: 8: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:58,168 INFO L290 TraceCheckUtils]: 7: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:58,175 INFO L290 TraceCheckUtils]: 6: Hoare triple {23152#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1342_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1342_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1342_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:34:58,176 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23152#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1342_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1342_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1342_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:34:58,176 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-15 06:34:58,176 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-15 06:34:58,176 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-15 06:34:58,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-15 06:34:58,176 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23075#true} is VALID [2022-04-15 06:34:58,176 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:58,177 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [214659530] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:58,177 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:58,177 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:35:00,454 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:00,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1705976242] [2022-04-15 06:35:00,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1705976242] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:00,454 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:00,455 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [41] imperfect sequences [] total 41 [2022-04-15 06:35:00,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [686263102] [2022-04-15 06:35:00,455 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:00,455 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 125 [2022-04-15 06:35:00,455 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:00,455 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:00,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:00,532 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-15 06:35:00,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:00,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-15 06:35:00,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=2133, Unknown=0, NotChecked=0, Total=2352 [2022-04-15 06:35:00,533 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:06,514 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2022-04-15 06:35:06,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-04-15 06:35:06,514 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 125 [2022-04-15 06:35:06,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:06,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 139 transitions. [2022-04-15 06:35:06,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 139 transitions. [2022-04-15 06:35:06,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 41 states and 139 transitions. [2022-04-15 06:35:06,612 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:06,613 INFO L225 Difference]: With dead ends: 139 [2022-04-15 06:35:06,613 INFO L226 Difference]: Without dead ends: 131 [2022-04-15 06:35:06,614 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 28 SyntacticMatches, 78 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1437 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=485, Invalid=6997, Unknown=0, NotChecked=0, Total=7482 [2022-04-15 06:35:06,614 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 86 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 4599 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 204 SdHoareTripleChecker+Invalid, 4639 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 4599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:06,614 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [86 Valid, 204 Invalid, 4639 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 4599 Invalid, 0 Unknown, 0 Unchecked, 3.0s Time] [2022-04-15 06:35:06,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-04-15 06:35:06,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 130. [2022-04-15 06:35:06,790 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:06,790 INFO L82 GeneralOperation]: Start isEquivalent. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,790 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,790 INFO L87 Difference]: Start difference. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:06,791 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2022-04-15 06:35:06,791 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2022-04-15 06:35:06,791 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:06,791 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:06,795 INFO L74 IsIncluded]: Start isIncluded. First operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-15 06:35:06,795 INFO L87 Difference]: Start difference. First operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-15 06:35:06,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:06,796 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2022-04-15 06:35:06,796 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2022-04-15 06:35:06,796 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:06,796 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:06,796 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:06,797 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:06,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2022-04-15 06:35:06,798 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 125 [2022-04-15 06:35:06,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:06,798 INFO L478 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2022-04-15 06:35:06,798 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:06,798 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 130 states and 132 transitions. [2022-04-15 06:35:06,981 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 132 edges. 132 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:06,981 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2022-04-15 06:35:06,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2022-04-15 06:35:06,982 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:06,982 INFO L499 BasicCegarLoop]: trace histogram [39, 39, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:07,006 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Ended with exit code 0 [2022-04-15 06:35:07,182 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2022-04-15 06:35:07,182 INFO L403 AbstractCegarLoop]: === Iteration 41 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:07,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:07,183 INFO L85 PathProgramCache]: Analyzing trace with hash -1802810611, now seen corresponding path program 38 times [2022-04-15 06:35:07,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:07,183 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1511602479] [2022-04-15 06:35:07,751 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:08,209 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:08,210 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:35:08,212 INFO L85 PathProgramCache]: Analyzing trace with hash -873049937, now seen corresponding path program 1 times [2022-04-15 06:35:08,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:08,213 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872589313] [2022-04-15 06:35:08,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:08,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:08,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:08,288 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:08,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:08,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-15 06:35:08,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-15 06:35:08,291 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-15 06:35:08,292 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:08,292 INFO L290 TraceCheckUtils]: 1: Hoare triple {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-15 06:35:08,292 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-15 06:35:08,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-15 06:35:08,292 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-15 06:35:08,292 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24091#(= main_~x~0 0)} is VALID [2022-04-15 06:35:08,293 INFO L290 TraceCheckUtils]: 6: Hoare triple {24091#(= main_~x~0 0)} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24091#(= main_~x~0 0)} is VALID [2022-04-15 06:35:08,293 INFO L290 TraceCheckUtils]: 7: Hoare triple {24091#(= main_~x~0 0)} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24091#(= main_~x~0 0)} is VALID [2022-04-15 06:35:08,294 INFO L290 TraceCheckUtils]: 8: Hoare triple {24091#(= main_~x~0 0)} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24092#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:35:08,295 INFO L290 TraceCheckUtils]: 9: Hoare triple {24092#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24087#false} is VALID [2022-04-15 06:35:08,295 INFO L272 TraceCheckUtils]: 10: Hoare triple {24087#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24087#false} is VALID [2022-04-15 06:35:08,295 INFO L290 TraceCheckUtils]: 11: Hoare triple {24087#false} ~cond := #in~cond; {24087#false} is VALID [2022-04-15 06:35:08,295 INFO L290 TraceCheckUtils]: 12: Hoare triple {24087#false} assume 0 == ~cond; {24087#false} is VALID [2022-04-15 06:35:08,295 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-15 06:35:08,295 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:08,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:08,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872589313] [2022-04-15 06:35:08,295 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1872589313] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:08,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [5733314] [2022-04-15 06:35:08,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:08,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:08,296 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:08,296 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:08,297 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-04-15 06:35:08,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:08,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:35:08,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:08,328 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:08,496 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24086#true} is VALID [2022-04-15 06:35:08,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-15 06:35:08,496 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-15 06:35:08,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-15 06:35:08,496 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-15 06:35:08,497 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:08,497 INFO L290 TraceCheckUtils]: 6: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:08,497 INFO L290 TraceCheckUtils]: 7: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:08,498 INFO L290 TraceCheckUtils]: 8: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24122#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:35:08,499 INFO L290 TraceCheckUtils]: 9: Hoare triple {24122#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24087#false} is VALID [2022-04-15 06:35:08,499 INFO L272 TraceCheckUtils]: 10: Hoare triple {24087#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24087#false} is VALID [2022-04-15 06:35:08,499 INFO L290 TraceCheckUtils]: 11: Hoare triple {24087#false} ~cond := #in~cond; {24087#false} is VALID [2022-04-15 06:35:08,500 INFO L290 TraceCheckUtils]: 12: Hoare triple {24087#false} assume 0 == ~cond; {24087#false} is VALID [2022-04-15 06:35:08,500 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-15 06:35:08,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:08,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:11,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-15 06:35:11,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {24141#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {24087#false} is VALID [2022-04-15 06:35:11,206 INFO L290 TraceCheckUtils]: 11: Hoare triple {24145#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {24141#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:35:11,206 INFO L272 TraceCheckUtils]: 10: Hoare triple {24149#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24145#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:35:11,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24149#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:35:11,208 INFO L290 TraceCheckUtils]: 8: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:11,209 INFO L290 TraceCheckUtils]: 7: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:11,241 INFO L290 TraceCheckUtils]: 6: Hoare triple {24163#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1397_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1397_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1397_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:11,241 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24163#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1397_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1397_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1397_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:35:11,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-15 06:35:11,242 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-15 06:35:11,242 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-15 06:35:11,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-15 06:35:11,242 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24086#true} is VALID [2022-04-15 06:35:11,242 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:11,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [5733314] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:11,242 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:11,242 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:35:13,513 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:13,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1511602479] [2022-04-15 06:35:13,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1511602479] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:13,514 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:13,514 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [42] imperfect sequences [] total 42 [2022-04-15 06:35:13,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946125733] [2022-04-15 06:35:13,514 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:13,514 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 128 [2022-04-15 06:35:13,515 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:13,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:13,611 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:13,611 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-15 06:35:13,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:13,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-15 06:35:13,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=224, Invalid=2226, Unknown=0, NotChecked=0, Total=2450 [2022-04-15 06:35:13,612 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:19,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:19,923 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2022-04-15 06:35:19,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2022-04-15 06:35:19,923 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 128 [2022-04-15 06:35:19,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:19,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:19,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 142 transitions. [2022-04-15 06:35:19,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:19,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 142 transitions. [2022-04-15 06:35:19,925 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 42 states and 142 transitions. [2022-04-15 06:35:20,023 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:20,024 INFO L225 Difference]: With dead ends: 142 [2022-04-15 06:35:20,024 INFO L226 Difference]: Without dead ends: 134 [2022-04-15 06:35:20,024 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 28 SyntacticMatches, 80 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1494 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=497, Invalid=7335, Unknown=0, NotChecked=0, Total=7832 [2022-04-15 06:35:20,025 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 88 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 4837 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 209 SdHoareTripleChecker+Invalid, 4878 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 4837 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:20,025 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [88 Valid, 209 Invalid, 4878 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 4837 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-04-15 06:35:20,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2022-04-15 06:35:20,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 133. [2022-04-15 06:35:20,183 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:20,183 INFO L82 GeneralOperation]: Start isEquivalent. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:20,183 INFO L74 IsIncluded]: Start isIncluded. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:20,183 INFO L87 Difference]: Start difference. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:20,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:20,184 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2022-04-15 06:35:20,184 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2022-04-15 06:35:20,184 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:20,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:20,185 INFO L74 IsIncluded]: Start isIncluded. First operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 134 states. [2022-04-15 06:35:20,185 INFO L87 Difference]: Start difference. First operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 134 states. [2022-04-15 06:35:20,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:20,186 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2022-04-15 06:35:20,186 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2022-04-15 06:35:20,186 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:20,186 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:20,186 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:20,186 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:20,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:20,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 135 transitions. [2022-04-15 06:35:20,187 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 135 transitions. Word has length 128 [2022-04-15 06:35:20,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:20,188 INFO L478 AbstractCegarLoop]: Abstraction has 133 states and 135 transitions. [2022-04-15 06:35:20,188 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:20,188 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 133 states and 135 transitions. [2022-04-15 06:35:20,363 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:20,363 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 135 transitions. [2022-04-15 06:35:20,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2022-04-15 06:35:20,363 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:20,364 INFO L499 BasicCegarLoop]: trace histogram [40, 40, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:20,379 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:20,564 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2022-04-15 06:35:20,564 INFO L403 AbstractCegarLoop]: === Iteration 42 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:20,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:20,564 INFO L85 PathProgramCache]: Analyzing trace with hash 1492984901, now seen corresponding path program 39 times [2022-04-15 06:35:20,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:20,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [456952319] [2022-04-15 06:35:25,190 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:35:25,464 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:26,195 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:26,196 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:35:26,198 INFO L85 PathProgramCache]: Analyzing trace with hash 1176482223, now seen corresponding path program 1 times [2022-04-15 06:35:26,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:26,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005593420] [2022-04-15 06:35:26,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:26,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:26,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:26,246 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:26,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:26,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-15 06:35:26,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-15 06:35:26,249 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-15 06:35:26,249 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:26,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-15 06:35:26,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-15 06:35:26,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-15 06:35:26,249 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-15 06:35:26,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25123#(= main_~x~0 0)} is VALID [2022-04-15 06:35:26,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {25123#(= main_~x~0 0)} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25123#(= main_~x~0 0)} is VALID [2022-04-15 06:35:26,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {25123#(= main_~x~0 0)} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25123#(= main_~x~0 0)} is VALID [2022-04-15 06:35:26,251 INFO L290 TraceCheckUtils]: 8: Hoare triple {25123#(= main_~x~0 0)} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25124#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:35:26,252 INFO L290 TraceCheckUtils]: 9: Hoare triple {25124#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25119#false} is VALID [2022-04-15 06:35:26,252 INFO L272 TraceCheckUtils]: 10: Hoare triple {25119#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25119#false} is VALID [2022-04-15 06:35:26,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {25119#false} ~cond := #in~cond; {25119#false} is VALID [2022-04-15 06:35:26,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {25119#false} assume 0 == ~cond; {25119#false} is VALID [2022-04-15 06:35:26,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-15 06:35:26,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:26,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:26,253 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005593420] [2022-04-15 06:35:26,253 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005593420] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:26,253 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1391899932] [2022-04-15 06:35:26,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:26,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:26,253 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:26,254 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:26,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-04-15 06:35:26,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:26,280 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:35:26,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:26,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:26,448 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25118#true} is VALID [2022-04-15 06:35:26,448 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-15 06:35:26,448 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-15 06:35:26,448 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-15 06:35:26,448 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-15 06:35:26,449 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:26,449 INFO L290 TraceCheckUtils]: 6: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:26,450 INFO L290 TraceCheckUtils]: 7: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:26,450 INFO L290 TraceCheckUtils]: 8: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25154#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:35:26,451 INFO L290 TraceCheckUtils]: 9: Hoare triple {25154#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25119#false} is VALID [2022-04-15 06:35:26,451 INFO L272 TraceCheckUtils]: 10: Hoare triple {25119#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25119#false} is VALID [2022-04-15 06:35:26,451 INFO L290 TraceCheckUtils]: 11: Hoare triple {25119#false} ~cond := #in~cond; {25119#false} is VALID [2022-04-15 06:35:26,451 INFO L290 TraceCheckUtils]: 12: Hoare triple {25119#false} assume 0 == ~cond; {25119#false} is VALID [2022-04-15 06:35:26,451 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-15 06:35:26,452 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:26,452 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:27,584 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-15 06:35:27,585 INFO L290 TraceCheckUtils]: 12: Hoare triple {25173#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {25119#false} is VALID [2022-04-15 06:35:27,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {25177#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {25173#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:35:27,585 INFO L272 TraceCheckUtils]: 10: Hoare triple {25181#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25177#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:35:27,586 INFO L290 TraceCheckUtils]: 9: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25181#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:35:27,589 INFO L290 TraceCheckUtils]: 8: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:27,589 INFO L290 TraceCheckUtils]: 7: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:27,814 INFO L290 TraceCheckUtils]: 6: Hoare triple {25195#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1453_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1453_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1453_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:27,814 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25195#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1453_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1453_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1453_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:35:27,815 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-15 06:35:27,815 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-15 06:35:27,815 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-15 06:35:27,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-15 06:35:27,815 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25118#true} is VALID [2022-04-15 06:35:27,815 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:27,815 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1391899932] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:27,815 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:27,815 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:35:30,181 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:30,181 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [456952319] [2022-04-15 06:35:30,181 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [456952319] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:30,181 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:30,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [43] imperfect sequences [] total 43 [2022-04-15 06:35:30,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916934349] [2022-04-15 06:35:30,181 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:30,182 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 131 [2022-04-15 06:35:30,182 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:30,182 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:30,270 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:30,270 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-15 06:35:30,270 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:30,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-15 06:35:30,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=229, Invalid=2321, Unknown=0, NotChecked=0, Total=2550 [2022-04-15 06:35:30,271 INFO L87 Difference]: Start difference. First operand 133 states and 135 transitions. Second operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:36,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:36,957 INFO L93 Difference]: Finished difference Result 145 states and 149 transitions. [2022-04-15 06:35:36,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-15 06:35:36,957 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 131 [2022-04-15 06:35:36,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:36,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:36,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 145 transitions. [2022-04-15 06:35:36,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:36,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 145 transitions. [2022-04-15 06:35:36,959 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 145 transitions. [2022-04-15 06:35:37,060 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 145 edges. 145 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:37,065 INFO L225 Difference]: With dead ends: 145 [2022-04-15 06:35:37,065 INFO L226 Difference]: Without dead ends: 137 [2022-04-15 06:35:37,066 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 28 SyntacticMatches, 82 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1552 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=509, Invalid=7681, Unknown=0, NotChecked=0, Total=8190 [2022-04-15 06:35:37,066 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 90 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 5081 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 214 SdHoareTripleChecker+Invalid, 5123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 5081 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:37,066 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [90 Valid, 214 Invalid, 5123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 5081 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2022-04-15 06:35:37,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2022-04-15 06:35:37,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 136. [2022-04-15 06:35:37,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:37,237 INFO L82 GeneralOperation]: Start isEquivalent. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:37,237 INFO L74 IsIncluded]: Start isIncluded. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:37,238 INFO L87 Difference]: Start difference. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:37,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:37,239 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2022-04-15 06:35:37,239 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 139 transitions. [2022-04-15 06:35:37,239 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:37,239 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:37,239 INFO L74 IsIncluded]: Start isIncluded. First operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 137 states. [2022-04-15 06:35:37,239 INFO L87 Difference]: Start difference. First operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 137 states. [2022-04-15 06:35:37,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:37,240 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2022-04-15 06:35:37,240 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 139 transitions. [2022-04-15 06:35:37,240 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:37,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:37,241 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:37,241 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:37,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:37,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2022-04-15 06:35:37,242 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 131 [2022-04-15 06:35:37,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:37,242 INFO L478 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2022-04-15 06:35:37,242 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:37,242 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 136 states and 138 transitions. [2022-04-15 06:35:37,425 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:37,426 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2022-04-15 06:35:37,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2022-04-15 06:35:37,426 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:37,426 INFO L499 BasicCegarLoop]: trace histogram [41, 41, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:37,442 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:37,639 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2022-04-15 06:35:37,639 INFO L403 AbstractCegarLoop]: === Iteration 43 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:37,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:37,640 INFO L85 PathProgramCache]: Analyzing trace with hash -710270963, now seen corresponding path program 40 times [2022-04-15 06:35:37,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:37,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1476541987] [2022-04-15 06:35:39,597 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:40,066 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:40,067 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:35:40,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1068952913, now seen corresponding path program 1 times [2022-04-15 06:35:40,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:40,070 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083557293] [2022-04-15 06:35:40,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:40,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:40,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:40,110 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:40,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:40,131 INFO L290 TraceCheckUtils]: 0: Hoare triple {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-15 06:35:40,131 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-15 06:35:40,131 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-15 06:35:40,132 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:40,132 INFO L290 TraceCheckUtils]: 1: Hoare triple {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-15 06:35:40,132 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-15 06:35:40,132 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-15 06:35:40,132 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-15 06:35:40,133 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26176#(= main_~x~0 0)} is VALID [2022-04-15 06:35:40,133 INFO L290 TraceCheckUtils]: 6: Hoare triple {26176#(= main_~x~0 0)} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26176#(= main_~x~0 0)} is VALID [2022-04-15 06:35:40,133 INFO L290 TraceCheckUtils]: 7: Hoare triple {26176#(= main_~x~0 0)} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26176#(= main_~x~0 0)} is VALID [2022-04-15 06:35:40,134 INFO L290 TraceCheckUtils]: 8: Hoare triple {26176#(= main_~x~0 0)} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26177#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:35:40,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {26177#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26172#false} is VALID [2022-04-15 06:35:40,135 INFO L272 TraceCheckUtils]: 10: Hoare triple {26172#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26172#false} is VALID [2022-04-15 06:35:40,135 INFO L290 TraceCheckUtils]: 11: Hoare triple {26172#false} ~cond := #in~cond; {26172#false} is VALID [2022-04-15 06:35:40,135 INFO L290 TraceCheckUtils]: 12: Hoare triple {26172#false} assume 0 == ~cond; {26172#false} is VALID [2022-04-15 06:35:40,135 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-15 06:35:40,135 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:40,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:40,136 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1083557293] [2022-04-15 06:35:40,136 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1083557293] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:40,136 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1644240007] [2022-04-15 06:35:40,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:40,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:40,136 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:40,137 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:40,138 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-04-15 06:35:40,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:40,165 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:35:40,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:40,173 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:40,339 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26171#true} is VALID [2022-04-15 06:35:40,339 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-15 06:35:40,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-15 06:35:40,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-15 06:35:40,339 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-15 06:35:40,339 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:40,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:40,340 INFO L290 TraceCheckUtils]: 7: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:40,341 INFO L290 TraceCheckUtils]: 8: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26207#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:35:40,342 INFO L290 TraceCheckUtils]: 9: Hoare triple {26207#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26172#false} is VALID [2022-04-15 06:35:40,342 INFO L272 TraceCheckUtils]: 10: Hoare triple {26172#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26172#false} is VALID [2022-04-15 06:35:40,342 INFO L290 TraceCheckUtils]: 11: Hoare triple {26172#false} ~cond := #in~cond; {26172#false} is VALID [2022-04-15 06:35:40,342 INFO L290 TraceCheckUtils]: 12: Hoare triple {26172#false} assume 0 == ~cond; {26172#false} is VALID [2022-04-15 06:35:40,342 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-15 06:35:40,342 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:40,342 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:41,183 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-15 06:35:41,184 INFO L290 TraceCheckUtils]: 12: Hoare triple {26226#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {26172#false} is VALID [2022-04-15 06:35:41,184 INFO L290 TraceCheckUtils]: 11: Hoare triple {26230#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {26226#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:35:41,184 INFO L272 TraceCheckUtils]: 10: Hoare triple {26234#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26230#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:35:41,185 INFO L290 TraceCheckUtils]: 9: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26234#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:35:41,187 INFO L290 TraceCheckUtils]: 8: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:41,187 INFO L290 TraceCheckUtils]: 7: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:41,213 INFO L290 TraceCheckUtils]: 6: Hoare triple {26248#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1510_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1510_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1510_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:41,214 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26248#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1510_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1510_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1510_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:35:41,214 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-15 06:35:41,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-15 06:35:41,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-15 06:35:41,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-15 06:35:41,214 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26171#true} is VALID [2022-04-15 06:35:41,214 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:41,214 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1644240007] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:41,214 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:41,214 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:35:43,687 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:43,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1476541987] [2022-04-15 06:35:43,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1476541987] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:43,688 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:43,688 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [44] imperfect sequences [] total 44 [2022-04-15 06:35:43,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [159351327] [2022-04-15 06:35:43,688 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:43,688 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 134 [2022-04-15 06:35:43,688 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:43,689 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:43,774 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:43,775 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-04-15 06:35:43,775 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:43,775 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-04-15 06:35:43,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=2418, Unknown=0, NotChecked=0, Total=2652 [2022-04-15 06:35:43,775 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:50,653 INFO L93 Difference]: Finished difference Result 148 states and 152 transitions. [2022-04-15 06:35:50,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2022-04-15 06:35:50,653 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 134 [2022-04-15 06:35:50,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:50,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 148 transitions. [2022-04-15 06:35:50,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 148 transitions. [2022-04-15 06:35:50,655 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 44 states and 148 transitions. [2022-04-15 06:35:50,758 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 148 edges. 148 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:50,759 INFO L225 Difference]: With dead ends: 148 [2022-04-15 06:35:50,759 INFO L226 Difference]: Without dead ends: 140 [2022-04-15 06:35:50,759 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 29 SyntacticMatches, 83 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1611 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=521, Invalid=8035, Unknown=0, NotChecked=0, Total=8556 [2022-04-15 06:35:50,760 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 92 mSDsluCounter, 207 mSDsCounter, 0 mSdLazyCounter, 5331 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 5374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 5331 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:50,760 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [92 Valid, 219 Invalid, 5374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 5331 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-15 06:35:50,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2022-04-15 06:35:50,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 139. [2022-04-15 06:35:50,953 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:50,953 INFO L82 GeneralOperation]: Start isEquivalent. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,953 INFO L74 IsIncluded]: Start isIncluded. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,955 INFO L87 Difference]: Start difference. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:50,957 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2022-04-15 06:35:50,957 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2022-04-15 06:35:50,957 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:50,957 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:50,958 INFO L74 IsIncluded]: Start isIncluded. First operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 140 states. [2022-04-15 06:35:50,958 INFO L87 Difference]: Start difference. First operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 140 states. [2022-04-15 06:35:50,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:50,959 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2022-04-15 06:35:50,959 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2022-04-15 06:35:50,959 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:50,959 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:50,959 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:50,959 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:50,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 141 transitions. [2022-04-15 06:35:50,961 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 141 transitions. Word has length 134 [2022-04-15 06:35:50,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:50,961 INFO L478 AbstractCegarLoop]: Abstraction has 139 states and 141 transitions. [2022-04-15 06:35:50,961 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:35:50,961 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 139 states and 141 transitions. [2022-04-15 06:35:51,162 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 141 edges. 141 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:51,162 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 141 transitions. [2022-04-15 06:35:51,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2022-04-15 06:35:51,163 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:51,163 INFO L499 BasicCegarLoop]: trace histogram [42, 42, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:51,183 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:51,363 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2022-04-15 06:35:51,363 INFO L403 AbstractCegarLoop]: === Iteration 44 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:51,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:51,363 INFO L85 PathProgramCache]: Analyzing trace with hash 2079469381, now seen corresponding path program 41 times [2022-04-15 06:35:51,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:51,364 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1148650832] [2022-04-15 06:35:54,276 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:35:54,479 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:56,860 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:35:56,862 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:35:56,864 INFO L85 PathProgramCache]: Analyzing trace with hash 980579247, now seen corresponding path program 1 times [2022-04-15 06:35:56,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:56,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834508248] [2022-04-15 06:35:56,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:56,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:56,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:56,918 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:56,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:56,929 INFO L290 TraceCheckUtils]: 0: Hoare triple {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-15 06:35:56,929 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-15 06:35:56,929 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-15 06:35:56,930 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:56,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-15 06:35:56,930 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-15 06:35:56,930 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-15 06:35:56,930 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-15 06:35:56,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:56,931 INFO L290 TraceCheckUtils]: 6: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:56,932 INFO L290 TraceCheckUtils]: 7: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:56,933 INFO L290 TraceCheckUtils]: 8: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:35:56,933 INFO L290 TraceCheckUtils]: 9: Hoare triple {27251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27246#false} is VALID [2022-04-15 06:35:56,933 INFO L272 TraceCheckUtils]: 10: Hoare triple {27246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27246#false} is VALID [2022-04-15 06:35:56,933 INFO L290 TraceCheckUtils]: 11: Hoare triple {27246#false} ~cond := #in~cond; {27246#false} is VALID [2022-04-15 06:35:56,933 INFO L290 TraceCheckUtils]: 12: Hoare triple {27246#false} assume 0 == ~cond; {27246#false} is VALID [2022-04-15 06:35:56,933 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-15 06:35:56,933 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:56,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:56,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834508248] [2022-04-15 06:35:56,934 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1834508248] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:56,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [140908844] [2022-04-15 06:35:56,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:56,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:56,934 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:56,935 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:56,936 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-04-15 06:35:56,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:56,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:35:56,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:56,971 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:57,153 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27245#true} is VALID [2022-04-15 06:35:57,153 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-15 06:35:57,153 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-15 06:35:57,153 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-15 06:35:57,153 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-15 06:35:57,154 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:57,154 INFO L290 TraceCheckUtils]: 6: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:57,155 INFO L290 TraceCheckUtils]: 7: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:35:57,156 INFO L290 TraceCheckUtils]: 8: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27280#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:35:57,157 INFO L290 TraceCheckUtils]: 9: Hoare triple {27280#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27246#false} is VALID [2022-04-15 06:35:57,157 INFO L272 TraceCheckUtils]: 10: Hoare triple {27246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27246#false} is VALID [2022-04-15 06:35:57,157 INFO L290 TraceCheckUtils]: 11: Hoare triple {27246#false} ~cond := #in~cond; {27246#false} is VALID [2022-04-15 06:35:57,157 INFO L290 TraceCheckUtils]: 12: Hoare triple {27246#false} assume 0 == ~cond; {27246#false} is VALID [2022-04-15 06:35:57,157 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-15 06:35:57,157 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:57,157 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:57,959 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-15 06:35:57,960 INFO L290 TraceCheckUtils]: 12: Hoare triple {27299#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {27246#false} is VALID [2022-04-15 06:35:57,960 INFO L290 TraceCheckUtils]: 11: Hoare triple {27303#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {27299#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:35:57,961 INFO L272 TraceCheckUtils]: 10: Hoare triple {27307#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27303#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:35:57,961 INFO L290 TraceCheckUtils]: 9: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27307#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:35:57,963 INFO L290 TraceCheckUtils]: 8: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:57,963 INFO L290 TraceCheckUtils]: 7: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:58,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {27321#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1568_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1568_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1568_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:35:58,063 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27321#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1568_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1568_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1568_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:35:58,063 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-15 06:35:58,063 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-15 06:35:58,063 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-15 06:35:58,063 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-15 06:35:58,063 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27245#true} is VALID [2022-04-15 06:35:58,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:35:58,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [140908844] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:58,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:58,064 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-15 06:36:02,359 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:02,359 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1148650832] [2022-04-15 06:36:02,359 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1148650832] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:02,359 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:02,359 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [86] imperfect sequences [] total 86 [2022-04-15 06:36:02,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710622595] [2022-04-15 06:36:02,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:02,361 INFO L78 Accepts]: Start accepts. Automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 137 [2022-04-15 06:36:02,361 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:02,362 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:02,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:02,445 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 86 states [2022-04-15 06:36:02,445 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:02,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2022-04-15 06:36:02,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=7995, Unknown=0, NotChecked=0, Total=8556 [2022-04-15 06:36:02,446 INFO L87 Difference]: Start difference. First operand 139 states and 141 transitions. Second operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:17,218 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2022-04-15 06:36:17,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2022-04-15 06:36:17,219 INFO L78 Accepts]: Start accepts. Automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 137 [2022-04-15 06:36:17,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:36:17,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 150 transitions. [2022-04-15 06:36:17,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 150 transitions. [2022-04-15 06:36:17,230 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 86 states and 150 transitions. [2022-04-15 06:36:17,334 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:17,335 INFO L225 Difference]: With dead ends: 150 [2022-04-15 06:36:17,335 INFO L226 Difference]: Without dead ends: 142 [2022-04-15 06:36:17,336 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 248 GetRequests, 30 SyntacticMatches, 44 SemanticMatches, 174 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6621 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=1266, Invalid=29534, Unknown=0, NotChecked=0, Total=30800 [2022-04-15 06:36:17,336 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 51 mSDsluCounter, 417 mSDsCounter, 0 mSdLazyCounter, 10957 mSolverCounterSat, 85 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 429 SdHoareTripleChecker+Invalid, 11042 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 10957 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:17,337 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [51 Valid, 429 Invalid, 11042 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 10957 Invalid, 0 Unknown, 0 Unchecked, 7.1s Time] [2022-04-15 06:36:17,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-04-15 06:36:17,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2022-04-15 06:36:17,517 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:17,517 INFO L82 GeneralOperation]: Start isEquivalent. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,517 INFO L74 IsIncluded]: Start isIncluded. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,517 INFO L87 Difference]: Start difference. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:17,519 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2022-04-15 06:36:17,519 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-15 06:36:17,519 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:17,519 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:17,519 INFO L74 IsIncluded]: Start isIncluded. First operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 142 states. [2022-04-15 06:36:17,519 INFO L87 Difference]: Start difference. First operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 142 states. [2022-04-15 06:36:17,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:17,520 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2022-04-15 06:36:17,520 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-15 06:36:17,520 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:17,520 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:17,520 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:17,520 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:17,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 144 transitions. [2022-04-15 06:36:17,522 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 144 transitions. Word has length 137 [2022-04-15 06:36:17,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:17,522 INFO L478 AbstractCegarLoop]: Abstraction has 142 states and 144 transitions. [2022-04-15 06:36:17,522 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:17,522 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 142 states and 144 transitions. [2022-04-15 06:36:17,703 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 144 edges. 144 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:17,703 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-15 06:36:17,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2022-04-15 06:36:17,704 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:17,704 INFO L499 BasicCegarLoop]: trace histogram [43, 43, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:17,719 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Forceful destruction successful, exit code 0 [2022-04-15 06:36:17,907 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,42 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:17,907 INFO L403 AbstractCegarLoop]: === Iteration 45 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:17,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:17,908 INFO L85 PathProgramCache]: Analyzing trace with hash -678087411, now seen corresponding path program 42 times [2022-04-15 06:36:17,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:17,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2094076495] [2022-04-15 06:36:19,169 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:19,911 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:19,912 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:36:19,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1264855889, now seen corresponding path program 1 times [2022-04-15 06:36:19,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:19,914 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085639205] [2022-04-15 06:36:19,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:19,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:19,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:19,961 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:19,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:19,964 INFO L290 TraceCheckUtils]: 0: Hoare triple {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-15 06:36:19,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-15 06:36:19,964 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-15 06:36:19,965 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:19,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-15 06:36:19,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-15 06:36:19,965 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-15 06:36:19,965 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-15 06:36:19,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28463#(= main_~x~0 0)} is VALID [2022-04-15 06:36:19,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {28463#(= main_~x~0 0)} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28463#(= main_~x~0 0)} is VALID [2022-04-15 06:36:19,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {28463#(= main_~x~0 0)} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28463#(= main_~x~0 0)} is VALID [2022-04-15 06:36:19,967 INFO L290 TraceCheckUtils]: 8: Hoare triple {28463#(= main_~x~0 0)} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28464#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:36:19,968 INFO L290 TraceCheckUtils]: 9: Hoare triple {28464#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28459#false} is VALID [2022-04-15 06:36:19,968 INFO L272 TraceCheckUtils]: 10: Hoare triple {28459#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28459#false} is VALID [2022-04-15 06:36:19,968 INFO L290 TraceCheckUtils]: 11: Hoare triple {28459#false} ~cond := #in~cond; {28459#false} is VALID [2022-04-15 06:36:19,968 INFO L290 TraceCheckUtils]: 12: Hoare triple {28459#false} assume 0 == ~cond; {28459#false} is VALID [2022-04-15 06:36:19,968 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-15 06:36:19,968 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:19,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:19,968 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085639205] [2022-04-15 06:36:19,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1085639205] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:19,968 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [83463879] [2022-04-15 06:36:19,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:19,968 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:19,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:19,969 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:19,970 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-04-15 06:36:19,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:19,998 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:36:20,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:20,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:20,174 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28458#true} is VALID [2022-04-15 06:36:20,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-15 06:36:20,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-15 06:36:20,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-15 06:36:20,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-15 06:36:20,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:20,176 INFO L290 TraceCheckUtils]: 6: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:20,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:20,177 INFO L290 TraceCheckUtils]: 8: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28494#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:36:20,178 INFO L290 TraceCheckUtils]: 9: Hoare triple {28494#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28459#false} is VALID [2022-04-15 06:36:20,178 INFO L272 TraceCheckUtils]: 10: Hoare triple {28459#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28459#false} is VALID [2022-04-15 06:36:20,178 INFO L290 TraceCheckUtils]: 11: Hoare triple {28459#false} ~cond := #in~cond; {28459#false} is VALID [2022-04-15 06:36:20,178 INFO L290 TraceCheckUtils]: 12: Hoare triple {28459#false} assume 0 == ~cond; {28459#false} is VALID [2022-04-15 06:36:20,178 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-15 06:36:20,178 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:20,178 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:21,320 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-15 06:36:21,320 INFO L290 TraceCheckUtils]: 12: Hoare triple {28513#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {28459#false} is VALID [2022-04-15 06:36:21,320 INFO L290 TraceCheckUtils]: 11: Hoare triple {28517#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {28513#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:36:21,321 INFO L272 TraceCheckUtils]: 10: Hoare triple {28521#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28517#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:36:21,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28521#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:36:21,323 INFO L290 TraceCheckUtils]: 8: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:21,323 INFO L290 TraceCheckUtils]: 7: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:21,329 INFO L290 TraceCheckUtils]: 6: Hoare triple {28535#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1627_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1627_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1627_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:21,330 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28535#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1627_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1627_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1627_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} is VALID [2022-04-15 06:36:21,330 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-15 06:36:21,330 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-15 06:36:21,330 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-15 06:36:21,330 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-15 06:36:21,330 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28458#true} is VALID [2022-04-15 06:36:21,330 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:21,330 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [83463879] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:21,331 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:21,331 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:36:23,951 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:23,951 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2094076495] [2022-04-15 06:36:23,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2094076495] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:23,951 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:23,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [46] imperfect sequences [] total 46 [2022-04-15 06:36:23,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502384067] [2022-04-15 06:36:23,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:23,952 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 140 [2022-04-15 06:36:23,952 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:23,952 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:24,045 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:24,045 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-04-15 06:36:24,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:24,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-04-15 06:36:24,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=2618, Unknown=0, NotChecked=0, Total=2862 [2022-04-15 06:36:24,046 INFO L87 Difference]: Start difference. First operand 142 states and 144 transitions. Second operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:31,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:31,930 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2022-04-15 06:36:31,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-15 06:36:31,931 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 140 [2022-04-15 06:36:31,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:36:31,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:31,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 154 transitions. [2022-04-15 06:36:31,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:31,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 154 transitions. [2022-04-15 06:36:31,932 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 154 transitions. [2022-04-15 06:36:32,054 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:32,055 INFO L225 Difference]: With dead ends: 154 [2022-04-15 06:36:32,056 INFO L226 Difference]: Without dead ends: 146 [2022-04-15 06:36:32,056 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 29 SyntacticMatches, 87 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1732 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=545, Invalid=8767, Unknown=0, NotChecked=0, Total=9312 [2022-04-15 06:36:32,056 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 96 mSDsluCounter, 217 mSDsCounter, 0 mSdLazyCounter, 5849 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 96 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 5894 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 5849 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.9s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:32,056 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [96 Valid, 229 Invalid, 5894 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 5849 Invalid, 0 Unknown, 0 Unchecked, 3.9s Time] [2022-04-15 06:36:32,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-04-15 06:36:32,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 145. [2022-04-15 06:36:32,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:32,237 INFO L82 GeneralOperation]: Start isEquivalent. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:32,237 INFO L74 IsIncluded]: Start isIncluded. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:32,238 INFO L87 Difference]: Start difference. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:32,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:32,239 INFO L93 Difference]: Finished difference Result 146 states and 148 transitions. [2022-04-15 06:36:32,239 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 148 transitions. [2022-04-15 06:36:32,239 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:32,239 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:32,239 INFO L74 IsIncluded]: Start isIncluded. First operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 146 states. [2022-04-15 06:36:32,239 INFO L87 Difference]: Start difference. First operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 146 states. [2022-04-15 06:36:32,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:32,240 INFO L93 Difference]: Finished difference Result 146 states and 148 transitions. [2022-04-15 06:36:32,240 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 148 transitions. [2022-04-15 06:36:32,240 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:32,240 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:32,241 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:32,241 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:32,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:32,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 147 transitions. [2022-04-15 06:36:32,242 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 147 transitions. Word has length 140 [2022-04-15 06:36:32,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:32,242 INFO L478 AbstractCegarLoop]: Abstraction has 145 states and 147 transitions. [2022-04-15 06:36:32,242 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:32,242 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 145 states and 147 transitions. [2022-04-15 06:36:32,438 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:32,438 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 147 transitions. [2022-04-15 06:36:32,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-04-15 06:36:32,439 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:32,439 INFO L499 BasicCegarLoop]: trace histogram [44, 44, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:32,459 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2022-04-15 06:36:32,639 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,43 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:32,639 INFO L403 AbstractCegarLoop]: === Iteration 46 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:32,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:32,640 INFO L85 PathProgramCache]: Analyzing trace with hash -1213007291, now seen corresponding path program 43 times [2022-04-15 06:36:32,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:32,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [905077131] [2022-04-15 06:36:33,581 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:37,132 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:36:37,283 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:37,284 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:36:37,286 INFO L85 PathProgramCache]: Analyzing trace with hash 784676271, now seen corresponding path program 1 times [2022-04-15 06:36:37,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:37,286 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1538647763] [2022-04-15 06:36:37,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:37,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:37,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:37,329 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:37,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:37,331 INFO L290 TraceCheckUtils]: 0: Hoare triple {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:37,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-15 06:36:37,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-15 06:36:37,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29579#(= main_~x~0 0)} is VALID [2022-04-15 06:36:37,333 INFO L290 TraceCheckUtils]: 6: Hoare triple {29579#(= main_~x~0 0)} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29579#(= main_~x~0 0)} is VALID [2022-04-15 06:36:37,334 INFO L290 TraceCheckUtils]: 7: Hoare triple {29579#(= main_~x~0 0)} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29579#(= main_~x~0 0)} is VALID [2022-04-15 06:36:37,335 INFO L290 TraceCheckUtils]: 8: Hoare triple {29579#(= main_~x~0 0)} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29580#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:36:37,335 INFO L290 TraceCheckUtils]: 9: Hoare triple {29580#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29575#false} is VALID [2022-04-15 06:36:37,335 INFO L272 TraceCheckUtils]: 10: Hoare triple {29575#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29575#false} is VALID [2022-04-15 06:36:37,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {29575#false} ~cond := #in~cond; {29575#false} is VALID [2022-04-15 06:36:37,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {29575#false} assume 0 == ~cond; {29575#false} is VALID [2022-04-15 06:36:37,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-15 06:36:37,335 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:37,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:37,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1538647763] [2022-04-15 06:36:37,336 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1538647763] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:37,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [100027532] [2022-04-15 06:36:37,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:37,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:37,336 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:37,337 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:37,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-04-15 06:36:37,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:37,365 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:36:37,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:37,372 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:37,535 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29574#true} is VALID [2022-04-15 06:36:37,535 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-15 06:36:37,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-15 06:36:37,535 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-15 06:36:37,536 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-15 06:36:37,536 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:37,536 INFO L290 TraceCheckUtils]: 6: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:37,537 INFO L290 TraceCheckUtils]: 7: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:37,538 INFO L290 TraceCheckUtils]: 8: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29610#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:36:37,539 INFO L290 TraceCheckUtils]: 9: Hoare triple {29610#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29575#false} is VALID [2022-04-15 06:36:37,539 INFO L272 TraceCheckUtils]: 10: Hoare triple {29575#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29575#false} is VALID [2022-04-15 06:36:37,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {29575#false} ~cond := #in~cond; {29575#false} is VALID [2022-04-15 06:36:37,539 INFO L290 TraceCheckUtils]: 12: Hoare triple {29575#false} assume 0 == ~cond; {29575#false} is VALID [2022-04-15 06:36:37,539 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-15 06:36:37,539 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:37,539 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:38,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-15 06:36:38,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {29629#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {29575#false} is VALID [2022-04-15 06:36:38,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {29633#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {29629#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:36:38,658 INFO L272 TraceCheckUtils]: 10: Hoare triple {29637#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29633#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:36:38,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29637#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:36:38,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:38,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:38,695 INFO L290 TraceCheckUtils]: 6: Hoare triple {29651#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1687_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1687_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1687_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:38,696 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29651#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1687_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1687_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1687_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:36:38,696 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-15 06:36:38,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-15 06:36:38,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-15 06:36:38,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-15 06:36:38,696 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29574#true} is VALID [2022-04-15 06:36:38,696 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:38,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [100027532] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:38,696 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:38,696 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:36:41,375 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:41,376 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [905077131] [2022-04-15 06:36:41,376 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [905077131] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:41,376 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:41,376 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [47] imperfect sequences [] total 47 [2022-04-15 06:36:41,376 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1746614064] [2022-04-15 06:36:41,376 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:41,376 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 143 [2022-04-15 06:36:41,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:41,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:41,462 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:41,462 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-04-15 06:36:41,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:41,462 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-04-15 06:36:41,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=2721, Unknown=0, NotChecked=0, Total=2970 [2022-04-15 06:36:41,463 INFO L87 Difference]: Start difference. First operand 145 states and 147 transitions. Second operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,299 INFO L93 Difference]: Finished difference Result 157 states and 161 transitions. [2022-04-15 06:36:49,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2022-04-15 06:36:49,299 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 143 [2022-04-15 06:36:49,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:36:49,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 157 transitions. [2022-04-15 06:36:49,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 157 transitions. [2022-04-15 06:36:49,301 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 47 states and 157 transitions. [2022-04-15 06:36:49,412 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 157 edges. 157 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:49,413 INFO L225 Difference]: With dead ends: 157 [2022-04-15 06:36:49,414 INFO L226 Difference]: Without dead ends: 149 [2022-04-15 06:36:49,414 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 29 SyntacticMatches, 89 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1794 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=557, Invalid=9145, Unknown=0, NotChecked=0, Total=9702 [2022-04-15 06:36:49,414 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 98 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 6117 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 98 SdHoareTripleChecker+Valid, 234 SdHoareTripleChecker+Invalid, 6163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 6117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.9s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:49,415 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [98 Valid, 234 Invalid, 6163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 6117 Invalid, 0 Unknown, 0 Unchecked, 3.9s Time] [2022-04-15 06:36:49,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-04-15 06:36:49,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 148. [2022-04-15 06:36:49,596 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:49,596 INFO L82 GeneralOperation]: Start isEquivalent. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,596 INFO L74 IsIncluded]: Start isIncluded. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,596 INFO L87 Difference]: Start difference. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,597 INFO L93 Difference]: Finished difference Result 149 states and 151 transitions. [2022-04-15 06:36:49,597 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2022-04-15 06:36:49,597 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:49,597 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:49,598 INFO L74 IsIncluded]: Start isIncluded. First operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-15 06:36:49,598 INFO L87 Difference]: Start difference. First operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-15 06:36:49,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,599 INFO L93 Difference]: Finished difference Result 149 states and 151 transitions. [2022-04-15 06:36:49,599 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2022-04-15 06:36:49,599 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:49,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:49,599 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:49,599 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:49,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 150 transitions. [2022-04-15 06:36:49,601 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 150 transitions. Word has length 143 [2022-04-15 06:36:49,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:49,601 INFO L478 AbstractCegarLoop]: Abstraction has 148 states and 150 transitions. [2022-04-15 06:36:49,601 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:49,601 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 148 states and 150 transitions. [2022-04-15 06:36:49,792 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:49,792 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 150 transitions. [2022-04-15 06:36:49,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2022-04-15 06:36:49,793 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:49,793 INFO L499 BasicCegarLoop]: trace histogram [45, 45, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:49,808 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Forceful destruction successful, exit code 0 [2022-04-15 06:36:49,993 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 44 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2022-04-15 06:36:49,993 INFO L403 AbstractCegarLoop]: === Iteration 47 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:49,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:49,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1612483085, now seen corresponding path program 44 times [2022-04-15 06:36:49,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:49,994 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [545054538] [2022-04-15 06:36:50,931 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:51,277 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:36:51,278 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:36:51,280 INFO L85 PathProgramCache]: Analyzing trace with hash -1460758865, now seen corresponding path program 1 times [2022-04-15 06:36:51,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:51,280 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948115298] [2022-04-15 06:36:51,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:51,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:51,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,316 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:51,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,319 INFO L290 TraceCheckUtils]: 0: Hoare triple {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-15 06:36:51,319 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-15 06:36:51,319 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-15 06:36:51,320 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:51,320 INFO L290 TraceCheckUtils]: 1: Hoare triple {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-15 06:36:51,320 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-15 06:36:51,320 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-15 06:36:51,320 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-15 06:36:51,321 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30716#(= main_~x~0 0)} is VALID [2022-04-15 06:36:51,321 INFO L290 TraceCheckUtils]: 6: Hoare triple {30716#(= main_~x~0 0)} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30716#(= main_~x~0 0)} is VALID [2022-04-15 06:36:51,321 INFO L290 TraceCheckUtils]: 7: Hoare triple {30716#(= main_~x~0 0)} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30716#(= main_~x~0 0)} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 8: Hoare triple {30716#(= main_~x~0 0)} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30717#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 9: Hoare triple {30717#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30712#false} is VALID [2022-04-15 06:36:51,323 INFO L272 TraceCheckUtils]: 10: Hoare triple {30712#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30712#false} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 11: Hoare triple {30712#false} ~cond := #in~cond; {30712#false} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 12: Hoare triple {30712#false} assume 0 == ~cond; {30712#false} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-15 06:36:51,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:51,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:51,324 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948115298] [2022-04-15 06:36:51,324 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [948115298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:51,324 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491119043] [2022-04-15 06:36:51,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:51,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:51,324 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:51,325 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:51,326 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2022-04-15 06:36:51,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,354 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:36:51,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:51,531 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30711#true} is VALID [2022-04-15 06:36:51,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-15 06:36:51,531 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-15 06:36:51,531 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-15 06:36:51,531 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-15 06:36:51,532 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:51,532 INFO L290 TraceCheckUtils]: 6: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:51,533 INFO L290 TraceCheckUtils]: 7: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:36:51,533 INFO L290 TraceCheckUtils]: 8: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30747#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:36:51,534 INFO L290 TraceCheckUtils]: 9: Hoare triple {30747#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30712#false} is VALID [2022-04-15 06:36:51,534 INFO L272 TraceCheckUtils]: 10: Hoare triple {30712#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30712#false} is VALID [2022-04-15 06:36:51,534 INFO L290 TraceCheckUtils]: 11: Hoare triple {30712#false} ~cond := #in~cond; {30712#false} is VALID [2022-04-15 06:36:51,534 INFO L290 TraceCheckUtils]: 12: Hoare triple {30712#false} assume 0 == ~cond; {30712#false} is VALID [2022-04-15 06:36:51,534 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-15 06:36:51,535 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:51,535 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:52,485 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-15 06:36:52,486 INFO L290 TraceCheckUtils]: 12: Hoare triple {30766#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {30712#false} is VALID [2022-04-15 06:36:52,486 INFO L290 TraceCheckUtils]: 11: Hoare triple {30770#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {30766#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:36:52,487 INFO L272 TraceCheckUtils]: 10: Hoare triple {30774#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30770#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:36:52,487 INFO L290 TraceCheckUtils]: 9: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30774#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:36:52,493 INFO L290 TraceCheckUtils]: 8: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:52,493 INFO L290 TraceCheckUtils]: 7: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:52,629 INFO L290 TraceCheckUtils]: 6: Hoare triple {30788#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1748_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1748_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1748_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:36:52,630 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30788#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1748_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1748_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1748_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:36:52,630 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-15 06:36:52,630 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-15 06:36:52,630 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-15 06:36:52,631 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-15 06:36:52,631 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30711#true} is VALID [2022-04-15 06:36:52,631 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:36:52,631 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491119043] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:52,631 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:52,631 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:36:55,407 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:55,407 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [545054538] [2022-04-15 06:36:55,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [545054538] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:55,407 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:55,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [48] imperfect sequences [] total 48 [2022-04-15 06:36:55,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1966342371] [2022-04-15 06:36:55,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:55,408 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 146 [2022-04-15 06:36:55,408 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:55,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:36:55,496 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:55,496 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-04-15 06:36:55,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:55,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-04-15 06:36:55,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=2826, Unknown=0, NotChecked=0, Total=3080 [2022-04-15 06:36:55,497 INFO L87 Difference]: Start difference. First operand 148 states and 150 transitions. Second operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:03,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:03,906 INFO L93 Difference]: Finished difference Result 160 states and 164 transitions. [2022-04-15 06:37:03,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-04-15 06:37:03,906 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 146 [2022-04-15 06:37:03,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:37:03,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:03,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 160 transitions. [2022-04-15 06:37:03,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:03,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 160 transitions. [2022-04-15 06:37:03,908 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 48 states and 160 transitions. [2022-04-15 06:37:04,019 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 160 edges. 160 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:04,021 INFO L225 Difference]: With dead ends: 160 [2022-04-15 06:37:04,021 INFO L226 Difference]: Without dead ends: 152 [2022-04-15 06:37:04,021 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 29 SyntacticMatches, 91 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1857 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=569, Invalid=9531, Unknown=0, NotChecked=0, Total=10100 [2022-04-15 06:37:04,022 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 100 mSDsluCounter, 227 mSDsCounter, 0 mSdLazyCounter, 6391 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 6438 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 6391 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:37:04,022 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [100 Valid, 239 Invalid, 6438 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 6391 Invalid, 0 Unknown, 0 Unchecked, 4.2s Time] [2022-04-15 06:37:04,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-04-15 06:37:04,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 151. [2022-04-15 06:37:04,206 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:37:04,207 INFO L82 GeneralOperation]: Start isEquivalent. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:04,207 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:04,207 INFO L87 Difference]: Start difference. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:04,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:04,208 INFO L93 Difference]: Finished difference Result 152 states and 154 transitions. [2022-04-15 06:37:04,208 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 154 transitions. [2022-04-15 06:37:04,208 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:04,208 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:04,208 INFO L74 IsIncluded]: Start isIncluded. First operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 152 states. [2022-04-15 06:37:04,209 INFO L87 Difference]: Start difference. First operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 152 states. [2022-04-15 06:37:04,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:04,210 INFO L93 Difference]: Finished difference Result 152 states and 154 transitions. [2022-04-15 06:37:04,210 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 154 transitions. [2022-04-15 06:37:04,210 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:04,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:04,210 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:37:04,210 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:37:04,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:04,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2022-04-15 06:37:04,211 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 146 [2022-04-15 06:37:04,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:37:04,212 INFO L478 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2022-04-15 06:37:04,212 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:04,212 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 151 states and 153 transitions. [2022-04-15 06:37:04,415 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 153 edges. 153 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:04,415 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2022-04-15 06:37:04,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2022-04-15 06:37:04,416 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:37:04,416 INFO L499 BasicCegarLoop]: trace histogram [46, 46, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:37:04,434 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Ended with exit code 0 [2022-04-15 06:37:04,632 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable46 [2022-04-15 06:37:04,632 INFO L403 AbstractCegarLoop]: === Iteration 48 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:37:04,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:37:04,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1267759803, now seen corresponding path program 45 times [2022-04-15 06:37:04,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:04,632 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1936380132] [2022-04-15 06:37:05,845 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:06,379 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:06,381 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:37:06,383 INFO L85 PathProgramCache]: Analyzing trace with hash 588773295, now seen corresponding path program 1 times [2022-04-15 06:37:06,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:37:06,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683655350] [2022-04-15 06:37:06,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:06,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:37:06,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:06,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:37:06,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:06,427 INFO L290 TraceCheckUtils]: 0: Hoare triple {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-15 06:37:06,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-15 06:37:06,427 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-15 06:37:06,428 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:37:06,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-15 06:37:06,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-15 06:37:06,428 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-15 06:37:06,428 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-15 06:37:06,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31874#(= main_~x~0 0)} is VALID [2022-04-15 06:37:06,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {31874#(= main_~x~0 0)} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31874#(= main_~x~0 0)} is VALID [2022-04-15 06:37:06,429 INFO L290 TraceCheckUtils]: 7: Hoare triple {31874#(= main_~x~0 0)} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31874#(= main_~x~0 0)} is VALID [2022-04-15 06:37:06,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {31874#(= main_~x~0 0)} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31875#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:37:06,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {31875#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31870#false} is VALID [2022-04-15 06:37:06,431 INFO L272 TraceCheckUtils]: 10: Hoare triple {31870#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31870#false} is VALID [2022-04-15 06:37:06,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {31870#false} ~cond := #in~cond; {31870#false} is VALID [2022-04-15 06:37:06,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {31870#false} assume 0 == ~cond; {31870#false} is VALID [2022-04-15 06:37:06,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-15 06:37:06,431 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:06,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:37:06,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683655350] [2022-04-15 06:37:06,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683655350] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:37:06,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1395563483] [2022-04-15 06:37:06,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:06,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:06,432 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:37:06,441 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:37:06,442 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2022-04-15 06:37:06,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:06,470 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:37:06,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:06,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:37:06,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31869#true} is VALID [2022-04-15 06:37:06,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-15 06:37:06,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-15 06:37:06,665 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-15 06:37:06,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-15 06:37:06,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:06,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:06,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:06,667 INFO L290 TraceCheckUtils]: 8: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31905#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:37:06,667 INFO L290 TraceCheckUtils]: 9: Hoare triple {31905#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31870#false} is VALID [2022-04-15 06:37:06,667 INFO L272 TraceCheckUtils]: 10: Hoare triple {31870#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31870#false} is VALID [2022-04-15 06:37:06,668 INFO L290 TraceCheckUtils]: 11: Hoare triple {31870#false} ~cond := #in~cond; {31870#false} is VALID [2022-04-15 06:37:06,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {31870#false} assume 0 == ~cond; {31870#false} is VALID [2022-04-15 06:37:06,668 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-15 06:37:06,668 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:06,668 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:37:07,547 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-15 06:37:07,547 INFO L290 TraceCheckUtils]: 12: Hoare triple {31924#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {31870#false} is VALID [2022-04-15 06:37:07,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {31928#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {31924#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:37:07,548 INFO L272 TraceCheckUtils]: 10: Hoare triple {31932#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31928#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:37:07,548 INFO L290 TraceCheckUtils]: 9: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31932#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:37:07,555 INFO L290 TraceCheckUtils]: 8: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:07,555 INFO L290 TraceCheckUtils]: 7: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:07,564 INFO L290 TraceCheckUtils]: 6: Hoare triple {31946#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1810_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1810_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1810_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:07,565 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31946#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1810_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1810_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1810_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:37:07,565 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-15 06:37:07,565 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-15 06:37:07,565 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-15 06:37:07,565 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-15 06:37:07,565 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31869#true} is VALID [2022-04-15 06:37:07,565 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:07,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1395563483] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:37:07,566 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:37:07,566 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:37:10,491 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:37:10,491 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1936380132] [2022-04-15 06:37:10,491 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1936380132] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:37:10,491 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:37:10,491 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [49] imperfect sequences [] total 49 [2022-04-15 06:37:10,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781274080] [2022-04-15 06:37:10,491 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:37:10,492 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 149 [2022-04-15 06:37:10,492 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:37:10,492 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:10,582 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 149 edges. 149 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:10,583 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2022-04-15 06:37:10,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:10,583 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-04-15 06:37:10,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=2933, Unknown=0, NotChecked=0, Total=3192 [2022-04-15 06:37:10,583 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:19,131 INFO L93 Difference]: Finished difference Result 163 states and 167 transitions. [2022-04-15 06:37:19,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-15 06:37:19,131 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 149 [2022-04-15 06:37:19,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:37:19,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 163 transitions. [2022-04-15 06:37:19,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 163 transitions. [2022-04-15 06:37:19,133 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 163 transitions. [2022-04-15 06:37:19,247 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:19,248 INFO L225 Difference]: With dead ends: 163 [2022-04-15 06:37:19,248 INFO L226 Difference]: Without dead ends: 155 [2022-04-15 06:37:19,249 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 29 SyntacticMatches, 93 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1921 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=581, Invalid=9925, Unknown=0, NotChecked=0, Total=10506 [2022-04-15 06:37:19,249 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 102 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 6671 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 244 SdHoareTripleChecker+Invalid, 6719 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 6671 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:37:19,249 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [102 Valid, 244 Invalid, 6719 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 6671 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-04-15 06:37:19,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-04-15 06:37:19,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 154. [2022-04-15 06:37:19,437 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:37:19,437 INFO L82 GeneralOperation]: Start isEquivalent. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,437 INFO L74 IsIncluded]: Start isIncluded. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,437 INFO L87 Difference]: Start difference. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:19,439 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2022-04-15 06:37:19,439 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2022-04-15 06:37:19,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:19,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:19,439 INFO L74 IsIncluded]: Start isIncluded. First operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-15 06:37:19,439 INFO L87 Difference]: Start difference. First operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-15 06:37:19,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:19,440 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2022-04-15 06:37:19,440 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2022-04-15 06:37:19,440 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:19,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:19,441 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:37:19,441 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:37:19,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 156 transitions. [2022-04-15 06:37:19,442 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 156 transitions. Word has length 149 [2022-04-15 06:37:19,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:37:19,442 INFO L478 AbstractCegarLoop]: Abstraction has 154 states and 156 transitions. [2022-04-15 06:37:19,442 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:19,442 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 154 states and 156 transitions. [2022-04-15 06:37:19,648 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:19,649 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 156 transitions. [2022-04-15 06:37:19,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2022-04-15 06:37:19,649 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:37:19,649 INFO L499 BasicCegarLoop]: trace histogram [47, 47, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:37:19,665 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Forceful destruction successful, exit code 0 [2022-04-15 06:37:19,850 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2022-04-15 06:37:19,850 INFO L403 AbstractCegarLoop]: === Iteration 49 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:37:19,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:37:19,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1726996723, now seen corresponding path program 46 times [2022-04-15 06:37:19,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:19,850 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1779052111] [2022-04-15 06:37:20,649 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:21,073 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:21,074 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:37:21,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1656661841, now seen corresponding path program 1 times [2022-04-15 06:37:21,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:37:21,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909519660] [2022-04-15 06:37:21,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:21,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:37:21,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:21,116 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:37:21,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:21,119 INFO L290 TraceCheckUtils]: 0: Hoare triple {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-15 06:37:21,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-15 06:37:21,119 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-15 06:37:21,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:37:21,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-15 06:37:21,120 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-15 06:37:21,120 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-15 06:37:21,120 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-15 06:37:21,120 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33053#(= main_~x~0 0)} is VALID [2022-04-15 06:37:21,121 INFO L290 TraceCheckUtils]: 6: Hoare triple {33053#(= main_~x~0 0)} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33053#(= main_~x~0 0)} is VALID [2022-04-15 06:37:21,121 INFO L290 TraceCheckUtils]: 7: Hoare triple {33053#(= main_~x~0 0)} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33053#(= main_~x~0 0)} is VALID [2022-04-15 06:37:21,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {33053#(= main_~x~0 0)} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33054#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:37:21,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {33054#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33049#false} is VALID [2022-04-15 06:37:21,123 INFO L272 TraceCheckUtils]: 10: Hoare triple {33049#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33049#false} is VALID [2022-04-15 06:37:21,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {33049#false} ~cond := #in~cond; {33049#false} is VALID [2022-04-15 06:37:21,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {33049#false} assume 0 == ~cond; {33049#false} is VALID [2022-04-15 06:37:21,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-15 06:37:21,123 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:21,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:37:21,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909519660] [2022-04-15 06:37:21,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1909519660] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:37:21,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [466253134] [2022-04-15 06:37:21,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:21,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:21,123 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:37:21,124 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:37:21,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-04-15 06:37:21,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:21,155 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:37:21,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:21,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:37:21,352 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33048#true} is VALID [2022-04-15 06:37:21,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-15 06:37:21,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-15 06:37:21,353 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-15 06:37:21,353 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-15 06:37:21,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:21,354 INFO L290 TraceCheckUtils]: 6: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:21,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:21,355 INFO L290 TraceCheckUtils]: 8: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33084#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:37:21,369 INFO L290 TraceCheckUtils]: 9: Hoare triple {33084#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33049#false} is VALID [2022-04-15 06:37:21,369 INFO L272 TraceCheckUtils]: 10: Hoare triple {33049#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33049#false} is VALID [2022-04-15 06:37:21,369 INFO L290 TraceCheckUtils]: 11: Hoare triple {33049#false} ~cond := #in~cond; {33049#false} is VALID [2022-04-15 06:37:21,369 INFO L290 TraceCheckUtils]: 12: Hoare triple {33049#false} assume 0 == ~cond; {33049#false} is VALID [2022-04-15 06:37:21,370 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-15 06:37:21,370 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:21,370 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:37:22,191 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-15 06:37:22,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {33103#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {33049#false} is VALID [2022-04-15 06:37:22,198 INFO L290 TraceCheckUtils]: 11: Hoare triple {33107#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {33103#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:37:22,198 INFO L272 TraceCheckUtils]: 10: Hoare triple {33111#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33107#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:37:22,199 INFO L290 TraceCheckUtils]: 9: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33111#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:37:22,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:22,201 INFO L290 TraceCheckUtils]: 7: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:22,561 INFO L290 TraceCheckUtils]: 6: Hoare triple {33125#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1873_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1873_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1873_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:37:22,561 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33125#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1873_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1873_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1873_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:37:22,562 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-15 06:37:22,562 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-15 06:37:22,562 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-15 06:37:22,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-15 06:37:22,562 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33048#true} is VALID [2022-04-15 06:37:22,562 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:22,562 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [466253134] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:37:22,562 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:37:22,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:37:25,609 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:37:25,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1779052111] [2022-04-15 06:37:25,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1779052111] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:37:25,610 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:37:25,610 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [50] imperfect sequences [] total 50 [2022-04-15 06:37:25,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578284530] [2022-04-15 06:37:25,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:37:25,610 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 152 [2022-04-15 06:37:25,611 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:37:25,611 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:25,703 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 152 edges. 152 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:25,703 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-15 06:37:25,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:25,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-15 06:37:25,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=3042, Unknown=0, NotChecked=0, Total=3306 [2022-04-15 06:37:25,704 INFO L87 Difference]: Start difference. First operand 154 states and 156 transitions. Second operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:34,622 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2022-04-15 06:37:34,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-04-15 06:37:34,623 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 152 [2022-04-15 06:37:34,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:37:34,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 166 transitions. [2022-04-15 06:37:34,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 166 transitions. [2022-04-15 06:37:34,624 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 50 states and 166 transitions. [2022-04-15 06:37:34,744 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:34,746 INFO L225 Difference]: With dead ends: 166 [2022-04-15 06:37:34,746 INFO L226 Difference]: Without dead ends: 158 [2022-04-15 06:37:34,746 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 28 SyntacticMatches, 96 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1986 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=593, Invalid=10327, Unknown=0, NotChecked=0, Total=10920 [2022-04-15 06:37:34,747 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 104 mSDsluCounter, 237 mSDsCounter, 0 mSdLazyCounter, 6957 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 249 SdHoareTripleChecker+Invalid, 7006 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 6957 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:37:34,747 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [104 Valid, 249 Invalid, 7006 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 6957 Invalid, 0 Unknown, 0 Unchecked, 4.5s Time] [2022-04-15 06:37:34,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-04-15 06:37:34,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 157. [2022-04-15 06:37:34,962 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:37:34,962 INFO L82 GeneralOperation]: Start isEquivalent. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,962 INFO L74 IsIncluded]: Start isIncluded. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,962 INFO L87 Difference]: Start difference. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:34,964 INFO L93 Difference]: Finished difference Result 158 states and 160 transitions. [2022-04-15 06:37:34,964 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 160 transitions. [2022-04-15 06:37:34,964 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:34,964 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:34,964 INFO L74 IsIncluded]: Start isIncluded. First operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-15 06:37:34,964 INFO L87 Difference]: Start difference. First operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-15 06:37:34,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:34,965 INFO L93 Difference]: Finished difference Result 158 states and 160 transitions. [2022-04-15 06:37:34,965 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 160 transitions. [2022-04-15 06:37:34,965 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:34,965 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:34,966 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:37:34,966 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:37:34,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 159 transitions. [2022-04-15 06:37:34,969 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 159 transitions. Word has length 152 [2022-04-15 06:37:34,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:37:34,969 INFO L478 AbstractCegarLoop]: Abstraction has 157 states and 159 transitions. [2022-04-15 06:37:34,969 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:34,969 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 157 states and 159 transitions. [2022-04-15 06:37:35,184 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:35,184 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 159 transitions. [2022-04-15 06:37:35,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2022-04-15 06:37:35,185 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:37:35,185 INFO L499 BasicCegarLoop]: trace histogram [48, 48, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:37:35,201 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Forceful destruction successful, exit code 0 [2022-04-15 06:37:35,385 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48,47 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:35,386 INFO L403 AbstractCegarLoop]: === Iteration 50 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:37:35,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:37:35,386 INFO L85 PathProgramCache]: Analyzing trace with hash 911724613, now seen corresponding path program 47 times [2022-04-15 06:37:35,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:35,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [9795681] [2022-04-15 06:37:36,229 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:39,273 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:37:39,469 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:37:39,470 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:37:39,472 INFO L85 PathProgramCache]: Analyzing trace with hash 392870319, now seen corresponding path program 1 times [2022-04-15 06:37:39,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:37:39,473 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930587390] [2022-04-15 06:37:39,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:39,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:37:39,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:39,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:37:39,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:39,558 INFO L290 TraceCheckUtils]: 0: Hoare triple {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-15 06:37:39,558 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-15 06:37:39,558 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-15 06:37:39,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:37:39,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-15 06:37:39,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-15 06:37:39,559 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-15 06:37:39,559 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-15 06:37:39,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:39,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:39,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:37:39,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34254#(or (and (<= main_~x~0 0) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} is VALID [2022-04-15 06:37:39,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {34254#(or (and (<= main_~x~0 0) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34255#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:37:39,573 INFO L272 TraceCheckUtils]: 10: Hoare triple {34255#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34256#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 06:37:39,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {34256#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {34257#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:37:39,574 INFO L290 TraceCheckUtils]: 12: Hoare triple {34257#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {34249#false} is VALID [2022-04-15 06:37:39,574 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-15 06:37:39,574 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:39,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:37:39,574 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930587390] [2022-04-15 06:37:39,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930587390] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:37:39,574 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1245784582] [2022-04-15 06:37:39,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:39,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:39,574 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:37:39,575 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:37:39,576 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-04-15 06:37:39,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:39,603 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-15 06:37:39,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:39,610 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:37:39,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34248#true} is VALID [2022-04-15 06:37:39,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-15 06:37:39,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-15 06:37:39,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-15 06:37:39,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-15 06:37:39,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34277#(= main_~x~0 0)} is VALID [2022-04-15 06:37:39,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {34277#(= main_~x~0 0)} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34277#(= main_~x~0 0)} is VALID [2022-04-15 06:37:39,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {34277#(= main_~x~0 0)} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34277#(= main_~x~0 0)} is VALID [2022-04-15 06:37:39,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {34277#(= main_~x~0 0)} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34287#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:37:39,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {34287#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34249#false} is VALID [2022-04-15 06:37:39,759 INFO L272 TraceCheckUtils]: 10: Hoare triple {34249#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34249#false} is VALID [2022-04-15 06:37:39,759 INFO L290 TraceCheckUtils]: 11: Hoare triple {34249#false} ~cond := #in~cond; {34249#false} is VALID [2022-04-15 06:37:39,759 INFO L290 TraceCheckUtils]: 12: Hoare triple {34249#false} assume 0 == ~cond; {34249#false} is VALID [2022-04-15 06:37:39,759 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-15 06:37:39,759 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:39,759 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:37:40,273 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-15 06:37:40,273 INFO L290 TraceCheckUtils]: 12: Hoare triple {34249#false} assume 0 == ~cond; {34249#false} is VALID [2022-04-15 06:37:40,273 INFO L290 TraceCheckUtils]: 11: Hoare triple {34249#false} ~cond := #in~cond; {34249#false} is VALID [2022-04-15 06:37:40,274 INFO L272 TraceCheckUtils]: 10: Hoare triple {34249#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34249#false} is VALID [2022-04-15 06:37:40,274 INFO L290 TraceCheckUtils]: 9: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34249#false} is VALID [2022-04-15 06:37:40,294 INFO L290 TraceCheckUtils]: 8: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:37:40,295 INFO L290 TraceCheckUtils]: 7: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:37:40,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {34325#(< (mod main_~x~0 4294967296) 500000)} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:37:40,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34325#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-15 06:37:40,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-15 06:37:40,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-15 06:37:40,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-15 06:37:40,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-15 06:37:40,296 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34248#true} is VALID [2022-04-15 06:37:40,296 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:37:40,297 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1245784582] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:37:40,297 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:37:40,297 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4, 4] total 12 [2022-04-15 06:37:45,981 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:37:45,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [9795681] [2022-04-15 06:37:45,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [9795681] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:37:45,982 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:37:45,982 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [101] imperfect sequences [] total 101 [2022-04-15 06:37:45,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1257812633] [2022-04-15 06:37:45,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:37:45,982 INFO L78 Accepts]: Start accepts. Automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 155 [2022-04-15 06:37:45,982 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:37:45,983 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:37:46,078 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:46,078 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 101 states [2022-04-15 06:37:46,079 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:46,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2022-04-15 06:37:46,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=692, Invalid=10438, Unknown=0, NotChecked=0, Total=11130 [2022-04-15 06:37:46,080 INFO L87 Difference]: Start difference. First operand 157 states and 159 transitions. Second operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:05,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:05,984 INFO L93 Difference]: Finished difference Result 171 states and 176 transitions. [2022-04-15 06:38:05,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2022-04-15 06:38:05,984 INFO L78 Accepts]: Start accepts. Automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 155 [2022-04-15 06:38:05,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:38:05,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:05,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 172 transitions. [2022-04-15 06:38:05,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:05,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 172 transitions. [2022-04-15 06:38:05,986 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 99 states and 172 transitions. [2022-04-15 06:38:06,106 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:06,108 INFO L225 Difference]: With dead ends: 171 [2022-04-15 06:38:06,108 INFO L226 Difference]: Without dead ends: 163 [2022-04-15 06:38:06,110 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 28 SyntacticMatches, 51 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5851 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=1647, Invalid=38955, Unknown=0, NotChecked=0, Total=40602 [2022-04-15 06:38:06,110 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 108 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 14146 mSolverCounterSat, 194 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 243 SdHoareTripleChecker+Invalid, 14340 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 194 IncrementalHoareTripleChecker+Valid, 14146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:38:06,110 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [108 Valid, 243 Invalid, 14340 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [194 Valid, 14146 Invalid, 0 Unknown, 0 Unchecked, 9.3s Time] [2022-04-15 06:38:06,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2022-04-15 06:38:06,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 160. [2022-04-15 06:38:06,332 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:38:06,333 INFO L82 GeneralOperation]: Start isEquivalent. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:06,333 INFO L74 IsIncluded]: Start isIncluded. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:06,333 INFO L87 Difference]: Start difference. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:06,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:06,334 INFO L93 Difference]: Finished difference Result 163 states and 166 transitions. [2022-04-15 06:38:06,334 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 166 transitions. [2022-04-15 06:38:06,335 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:06,335 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:06,335 INFO L74 IsIncluded]: Start isIncluded. First operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-15 06:38:06,335 INFO L87 Difference]: Start difference. First operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-15 06:38:06,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:06,336 INFO L93 Difference]: Finished difference Result 163 states and 166 transitions. [2022-04-15 06:38:06,336 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 166 transitions. [2022-04-15 06:38:06,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:06,336 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:06,336 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:38:06,336 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:38:06,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:06,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 162 transitions. [2022-04-15 06:38:06,338 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 162 transitions. Word has length 155 [2022-04-15 06:38:06,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:38:06,338 INFO L478 AbstractCegarLoop]: Abstraction has 160 states and 162 transitions. [2022-04-15 06:38:06,338 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:06,338 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 160 states and 162 transitions. [2022-04-15 06:38:06,551 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:06,551 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 162 transitions. [2022-04-15 06:38:06,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-04-15 06:38:06,552 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:38:06,552 INFO L499 BasicCegarLoop]: trace histogram [49, 49, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:38:06,568 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Forceful destruction successful, exit code 0 [2022-04-15 06:38:06,752 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 48 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2022-04-15 06:38:06,752 INFO L403 AbstractCegarLoop]: === Iteration 51 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:38:06,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:38:06,754 INFO L85 PathProgramCache]: Analyzing trace with hash 272626701, now seen corresponding path program 48 times [2022-04-15 06:38:06,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:06,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1263050345] [2022-04-15 06:38:09,697 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:38:09,933 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:10,455 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:10,457 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:38:10,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1852564817, now seen corresponding path program 1 times [2022-04-15 06:38:10,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:38:10,459 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695644129] [2022-04-15 06:38:10,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:10,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:38:10,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:10,503 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:38:10,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:10,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:38:10,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-15 06:38:10,506 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-15 06:38:10,519 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35625#(= main_~x~0 0)} is VALID [2022-04-15 06:38:10,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {35625#(= main_~x~0 0)} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35625#(= main_~x~0 0)} is VALID [2022-04-15 06:38:10,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {35625#(= main_~x~0 0)} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35625#(= main_~x~0 0)} is VALID [2022-04-15 06:38:10,521 INFO L290 TraceCheckUtils]: 8: Hoare triple {35625#(= main_~x~0 0)} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35626#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-15 06:38:10,521 INFO L290 TraceCheckUtils]: 9: Hoare triple {35626#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35621#false} is VALID [2022-04-15 06:38:10,522 INFO L272 TraceCheckUtils]: 10: Hoare triple {35621#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35621#false} is VALID [2022-04-15 06:38:10,522 INFO L290 TraceCheckUtils]: 11: Hoare triple {35621#false} ~cond := #in~cond; {35621#false} is VALID [2022-04-15 06:38:10,522 INFO L290 TraceCheckUtils]: 12: Hoare triple {35621#false} assume 0 == ~cond; {35621#false} is VALID [2022-04-15 06:38:10,522 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-15 06:38:10,522 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:10,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:38:10,522 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695644129] [2022-04-15 06:38:10,522 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [695644129] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:38:10,522 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [730643316] [2022-04-15 06:38:10,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:10,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:38:10,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:38:10,523 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:38:10,524 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-04-15 06:38:10,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:10,552 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:38:10,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:10,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:38:10,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35620#true} is VALID [2022-04-15 06:38:10,743 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-15 06:38:10,743 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-15 06:38:10,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-15 06:38:10,743 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-15 06:38:10,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:10,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:10,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:10,745 INFO L290 TraceCheckUtils]: 8: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35656#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:38:10,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {35656#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35621#false} is VALID [2022-04-15 06:38:10,747 INFO L272 TraceCheckUtils]: 10: Hoare triple {35621#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35621#false} is VALID [2022-04-15 06:38:10,747 INFO L290 TraceCheckUtils]: 11: Hoare triple {35621#false} ~cond := #in~cond; {35621#false} is VALID [2022-04-15 06:38:10,747 INFO L290 TraceCheckUtils]: 12: Hoare triple {35621#false} assume 0 == ~cond; {35621#false} is VALID [2022-04-15 06:38:10,747 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-15 06:38:10,747 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:10,747 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:38:11,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-15 06:38:11,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {35675#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {35621#false} is VALID [2022-04-15 06:38:11,547 INFO L290 TraceCheckUtils]: 11: Hoare triple {35679#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {35675#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:38:11,547 INFO L272 TraceCheckUtils]: 10: Hoare triple {35683#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35679#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:38:11,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35683#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:38:11,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:11,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:11,567 INFO L290 TraceCheckUtils]: 6: Hoare triple {35697#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2002_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2002_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2002_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:11,567 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35697#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2002_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2002_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2002_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:38:11,567 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-15 06:38:11,567 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-15 06:38:11,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-15 06:38:11,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-15 06:38:11,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35620#true} is VALID [2022-04-15 06:38:11,568 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:11,568 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [730643316] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:38:11,568 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:38:11,568 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:38:14,810 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:38:14,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1263050345] [2022-04-15 06:38:14,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1263050345] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:38:14,811 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:38:14,811 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [52] imperfect sequences [] total 52 [2022-04-15 06:38:14,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630475255] [2022-04-15 06:38:14,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:38:14,811 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 158 [2022-04-15 06:38:14,812 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:38:14,812 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:14,910 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:14,911 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2022-04-15 06:38:14,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:14,911 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2022-04-15 06:38:14,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=274, Invalid=3266, Unknown=0, NotChecked=0, Total=3540 [2022-04-15 06:38:14,911 INFO L87 Difference]: Start difference. First operand 160 states and 162 transitions. Second operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:24,504 INFO L93 Difference]: Finished difference Result 172 states and 176 transitions. [2022-04-15 06:38:24,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-15 06:38:24,504 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 158 [2022-04-15 06:38:24,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:38:24,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 172 transitions. [2022-04-15 06:38:24,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 172 transitions. [2022-04-15 06:38:24,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 172 transitions. [2022-04-15 06:38:24,625 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:24,627 INFO L225 Difference]: With dead ends: 172 [2022-04-15 06:38:24,627 INFO L226 Difference]: Without dead ends: 164 [2022-04-15 06:38:24,627 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 29 SyntacticMatches, 99 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2119 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=617, Invalid=11155, Unknown=0, NotChecked=0, Total=11772 [2022-04-15 06:38:24,627 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 108 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 7547 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 259 SdHoareTripleChecker+Invalid, 7598 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 7547 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.8s IncrementalHoareTripleChecker+Time [2022-04-15 06:38:24,628 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [108 Valid, 259 Invalid, 7598 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 7547 Invalid, 0 Unknown, 0 Unchecked, 4.8s Time] [2022-04-15 06:38:24,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2022-04-15 06:38:24,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 163. [2022-04-15 06:38:24,839 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:38:24,839 INFO L82 GeneralOperation]: Start isEquivalent. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,839 INFO L74 IsIncluded]: Start isIncluded. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,840 INFO L87 Difference]: Start difference. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:24,841 INFO L93 Difference]: Finished difference Result 164 states and 166 transitions. [2022-04-15 06:38:24,841 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 166 transitions. [2022-04-15 06:38:24,841 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:24,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:24,841 INFO L74 IsIncluded]: Start isIncluded. First operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 164 states. [2022-04-15 06:38:24,841 INFO L87 Difference]: Start difference. First operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 164 states. [2022-04-15 06:38:24,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:24,843 INFO L93 Difference]: Finished difference Result 164 states and 166 transitions. [2022-04-15 06:38:24,843 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 166 transitions. [2022-04-15 06:38:24,843 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:24,843 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:24,843 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:38:24,843 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:38:24,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 165 transitions. [2022-04-15 06:38:24,845 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 165 transitions. Word has length 158 [2022-04-15 06:38:24,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:38:24,845 INFO L478 AbstractCegarLoop]: Abstraction has 163 states and 165 transitions. [2022-04-15 06:38:24,845 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:24,845 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 163 states and 165 transitions. [2022-04-15 06:38:25,063 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:25,063 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 165 transitions. [2022-04-15 06:38:25,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2022-04-15 06:38:25,063 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:38:25,063 INFO L499 BasicCegarLoop]: trace histogram [50, 50, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:38:25,079 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Ended with exit code 0 [2022-04-15 06:38:25,264 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,49 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:38:25,264 INFO L403 AbstractCegarLoop]: === Iteration 52 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:38:25,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:38:25,264 INFO L85 PathProgramCache]: Analyzing trace with hash 496753477, now seen corresponding path program 49 times [2022-04-15 06:38:25,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:25,264 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1492844263] [2022-04-15 06:38:28,041 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:28,457 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:28,458 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:38:28,460 INFO L85 PathProgramCache]: Analyzing trace with hash 196967343, now seen corresponding path program 1 times [2022-04-15 06:38:28,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:38:28,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076743779] [2022-04-15 06:38:28,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:28,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:38:28,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:28,503 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:38:28,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:28,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-15 06:38:28,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-15 06:38:28,505 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-15 06:38:28,506 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:38:28,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-15 06:38:28,506 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-15 06:38:28,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-15 06:38:28,506 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-15 06:38:28,506 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36867#(= main_~x~0 0)} is VALID [2022-04-15 06:38:28,507 INFO L290 TraceCheckUtils]: 6: Hoare triple {36867#(= main_~x~0 0)} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36867#(= main_~x~0 0)} is VALID [2022-04-15 06:38:28,507 INFO L290 TraceCheckUtils]: 7: Hoare triple {36867#(= main_~x~0 0)} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36867#(= main_~x~0 0)} is VALID [2022-04-15 06:38:28,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {36867#(= main_~x~0 0)} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36868#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} is VALID [2022-04-15 06:38:28,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {36868#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36863#false} is VALID [2022-04-15 06:38:28,508 INFO L272 TraceCheckUtils]: 10: Hoare triple {36863#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36863#false} is VALID [2022-04-15 06:38:28,509 INFO L290 TraceCheckUtils]: 11: Hoare triple {36863#false} ~cond := #in~cond; {36863#false} is VALID [2022-04-15 06:38:28,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {36863#false} assume 0 == ~cond; {36863#false} is VALID [2022-04-15 06:38:28,509 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-15 06:38:28,509 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:28,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:38:28,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076743779] [2022-04-15 06:38:28,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076743779] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:38:28,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2045518680] [2022-04-15 06:38:28,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:28,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:38:28,509 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:38:28,510 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:38:28,511 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-04-15 06:38:28,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:28,537 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:38:28,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:28,544 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:38:28,718 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36862#true} is VALID [2022-04-15 06:38:28,718 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-15 06:38:28,718 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-15 06:38:28,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-15 06:38:28,718 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-15 06:38:28,719 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:28,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:28,720 INFO L290 TraceCheckUtils]: 7: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:28,721 INFO L290 TraceCheckUtils]: 8: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36898#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:38:28,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {36898#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36863#false} is VALID [2022-04-15 06:38:28,721 INFO L272 TraceCheckUtils]: 10: Hoare triple {36863#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36863#false} is VALID [2022-04-15 06:38:28,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {36863#false} ~cond := #in~cond; {36863#false} is VALID [2022-04-15 06:38:28,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {36863#false} assume 0 == ~cond; {36863#false} is VALID [2022-04-15 06:38:28,722 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-15 06:38:28,722 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:28,722 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:38:29,517 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-15 06:38:29,518 INFO L290 TraceCheckUtils]: 12: Hoare triple {36917#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {36863#false} is VALID [2022-04-15 06:38:29,518 INFO L290 TraceCheckUtils]: 11: Hoare triple {36921#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {36917#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:38:29,519 INFO L272 TraceCheckUtils]: 10: Hoare triple {36925#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36921#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:38:29,519 INFO L290 TraceCheckUtils]: 9: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36925#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:38:29,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:29,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:29,676 INFO L290 TraceCheckUtils]: 6: Hoare triple {36939#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2068_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2068_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2068_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:29,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36939#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2068_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2068_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2068_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:38:29,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-15 06:38:29,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-15 06:38:29,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-15 06:38:29,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-15 06:38:29,677 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36862#true} is VALID [2022-04-15 06:38:29,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:29,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2045518680] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:38:29,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:38:29,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:38:32,963 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:38:32,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1492844263] [2022-04-15 06:38:32,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1492844263] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:38:32,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:38:32,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [53] imperfect sequences [] total 53 [2022-04-15 06:38:32,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [226523961] [2022-04-15 06:38:32,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:38:32,964 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 161 [2022-04-15 06:38:32,964 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:38:32,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:33,068 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:33,068 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2022-04-15 06:38:33,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:33,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2022-04-15 06:38:33,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=279, Invalid=3381, Unknown=0, NotChecked=0, Total=3660 [2022-04-15 06:38:33,068 INFO L87 Difference]: Start difference. First operand 163 states and 165 transitions. Second operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:43,072 INFO L93 Difference]: Finished difference Result 175 states and 179 transitions. [2022-04-15 06:38:43,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2022-04-15 06:38:43,073 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 161 [2022-04-15 06:38:43,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:38:43,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 175 transitions. [2022-04-15 06:38:43,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 175 transitions. [2022-04-15 06:38:43,075 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 53 states and 175 transitions. [2022-04-15 06:38:43,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:43,199 INFO L225 Difference]: With dead ends: 175 [2022-04-15 06:38:43,199 INFO L226 Difference]: Without dead ends: 167 [2022-04-15 06:38:43,199 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 239 GetRequests, 29 SyntacticMatches, 101 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2187 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=629, Invalid=11581, Unknown=0, NotChecked=0, Total=12210 [2022-04-15 06:38:43,200 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 110 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7851 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 264 SdHoareTripleChecker+Invalid, 7903 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 7851 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:38:43,200 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [110 Valid, 264 Invalid, 7903 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 7851 Invalid, 0 Unknown, 0 Unchecked, 5.0s Time] [2022-04-15 06:38:43,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2022-04-15 06:38:43,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 166. [2022-04-15 06:38:43,420 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:38:43,420 INFO L82 GeneralOperation]: Start isEquivalent. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,420 INFO L74 IsIncluded]: Start isIncluded. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,420 INFO L87 Difference]: Start difference. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:43,422 INFO L93 Difference]: Finished difference Result 167 states and 169 transitions. [2022-04-15 06:38:43,422 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2022-04-15 06:38:43,422 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:43,422 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:43,422 INFO L74 IsIncluded]: Start isIncluded. First operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 167 states. [2022-04-15 06:38:43,422 INFO L87 Difference]: Start difference. First operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 167 states. [2022-04-15 06:38:43,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:38:43,424 INFO L93 Difference]: Finished difference Result 167 states and 169 transitions. [2022-04-15 06:38:43,424 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2022-04-15 06:38:43,424 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:38:43,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:38:43,424 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:38:43,424 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:38:43,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 168 transitions. [2022-04-15 06:38:43,436 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 168 transitions. Word has length 161 [2022-04-15 06:38:43,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:38:43,436 INFO L478 AbstractCegarLoop]: Abstraction has 166 states and 168 transitions. [2022-04-15 06:38:43,436 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:43,436 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 166 states and 168 transitions. [2022-04-15 06:38:43,660 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:43,660 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 168 transitions. [2022-04-15 06:38:43,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2022-04-15 06:38:43,661 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:38:43,661 INFO L499 BasicCegarLoop]: trace histogram [51, 51, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:38:43,676 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Ended with exit code 0 [2022-04-15 06:38:43,861 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable51 [2022-04-15 06:38:43,861 INFO L403 AbstractCegarLoop]: === Iteration 53 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:38:43,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:38:43,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1216607987, now seen corresponding path program 50 times [2022-04-15 06:38:43,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:43,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1799763919] [2022-04-15 06:38:45,788 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:38:46,038 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:46,487 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:38:46,488 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:38:46,490 INFO L85 PathProgramCache]: Analyzing trace with hash -2048467793, now seen corresponding path program 1 times [2022-04-15 06:38:46,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:38:46,491 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897786867] [2022-04-15 06:38:46,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:46,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:38:46,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:46,543 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:38:46,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:46,546 INFO L290 TraceCheckUtils]: 0: Hoare triple {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-15 06:38:46,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-15 06:38:46,546 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-15 06:38:46,547 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:38:46,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-15 06:38:46,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-15 06:38:46,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-15 06:38:46,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-15 06:38:46,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38130#(= main_~x~0 0)} is VALID [2022-04-15 06:38:46,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {38130#(= main_~x~0 0)} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38130#(= main_~x~0 0)} is VALID [2022-04-15 06:38:46,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {38130#(= main_~x~0 0)} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38130#(= main_~x~0 0)} is VALID [2022-04-15 06:38:46,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {38130#(= main_~x~0 0)} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38131#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:38:46,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {38131#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38126#false} is VALID [2022-04-15 06:38:46,551 INFO L272 TraceCheckUtils]: 10: Hoare triple {38126#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38126#false} is VALID [2022-04-15 06:38:46,551 INFO L290 TraceCheckUtils]: 11: Hoare triple {38126#false} ~cond := #in~cond; {38126#false} is VALID [2022-04-15 06:38:46,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {38126#false} assume 0 == ~cond; {38126#false} is VALID [2022-04-15 06:38:46,551 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-15 06:38:46,551 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:46,551 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:38:46,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897786867] [2022-04-15 06:38:46,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1897786867] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:38:46,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [628344604] [2022-04-15 06:38:46,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:38:46,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:38:46,552 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:38:46,555 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:38:46,556 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2022-04-15 06:38:46,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:46,583 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:38:46,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:38:46,591 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:38:46,793 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38125#true} is VALID [2022-04-15 06:38:46,793 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-15 06:38:46,793 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-15 06:38:46,793 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-15 06:38:46,793 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-15 06:38:46,793 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:46,794 INFO L290 TraceCheckUtils]: 6: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:46,794 INFO L290 TraceCheckUtils]: 7: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:38:46,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38161#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:38:46,796 INFO L290 TraceCheckUtils]: 9: Hoare triple {38161#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38126#false} is VALID [2022-04-15 06:38:46,796 INFO L272 TraceCheckUtils]: 10: Hoare triple {38126#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38126#false} is VALID [2022-04-15 06:38:46,797 INFO L290 TraceCheckUtils]: 11: Hoare triple {38126#false} ~cond := #in~cond; {38126#false} is VALID [2022-04-15 06:38:46,797 INFO L290 TraceCheckUtils]: 12: Hoare triple {38126#false} assume 0 == ~cond; {38126#false} is VALID [2022-04-15 06:38:46,797 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-15 06:38:46,797 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:46,797 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:38:48,256 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-15 06:38:48,256 INFO L290 TraceCheckUtils]: 12: Hoare triple {38180#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {38126#false} is VALID [2022-04-15 06:38:48,256 INFO L290 TraceCheckUtils]: 11: Hoare triple {38184#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {38180#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:38:48,257 INFO L272 TraceCheckUtils]: 10: Hoare triple {38188#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38184#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:38:48,257 INFO L290 TraceCheckUtils]: 9: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38188#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:38:48,279 INFO L290 TraceCheckUtils]: 8: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:48,280 INFO L290 TraceCheckUtils]: 7: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:48,286 INFO L290 TraceCheckUtils]: 6: Hoare triple {38202#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2135_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2135_33) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2135_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:38:48,286 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38202#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2135_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2135_33) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2135_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:38:48,287 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-15 06:38:48,287 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-15 06:38:48,287 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-15 06:38:48,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-15 06:38:48,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38125#true} is VALID [2022-04-15 06:38:48,287 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:38:48,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [628344604] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:38:48,287 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:38:48,287 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:38:51,842 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:38:51,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1799763919] [2022-04-15 06:38:51,842 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1799763919] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:38:51,842 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:38:51,842 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [54] imperfect sequences [] total 54 [2022-04-15 06:38:51,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234525173] [2022-04-15 06:38:51,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:38:51,843 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 164 [2022-04-15 06:38:51,843 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:38:51,843 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:38:51,946 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:38:51,946 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-04-15 06:38:51,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:38:51,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-04-15 06:38:51,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=3498, Unknown=0, NotChecked=0, Total=3782 [2022-04-15 06:38:51,947 INFO L87 Difference]: Start difference. First operand 166 states and 168 transitions. Second operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:02,355 INFO L93 Difference]: Finished difference Result 178 states and 182 transitions. [2022-04-15 06:39:02,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2022-04-15 06:39:02,355 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 164 [2022-04-15 06:39:02,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:39:02,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 178 transitions. [2022-04-15 06:39:02,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 178 transitions. [2022-04-15 06:39:02,357 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 54 states and 178 transitions. [2022-04-15 06:39:02,497 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 178 edges. 178 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:02,498 INFO L225 Difference]: With dead ends: 178 [2022-04-15 06:39:02,499 INFO L226 Difference]: Without dead ends: 170 [2022-04-15 06:39:02,499 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 29 SyntacticMatches, 103 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2256 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=641, Invalid=12015, Unknown=0, NotChecked=0, Total=12656 [2022-04-15 06:39:02,499 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 112 mSDsluCounter, 257 mSDsCounter, 0 mSdLazyCounter, 8161 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 8214 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 8161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:39:02,500 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [112 Valid, 269 Invalid, 8214 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 8161 Invalid, 0 Unknown, 0 Unchecked, 5.2s Time] [2022-04-15 06:39:02,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2022-04-15 06:39:02,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 169. [2022-04-15 06:39:02,739 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:39:02,740 INFO L82 GeneralOperation]: Start isEquivalent. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,740 INFO L74 IsIncluded]: Start isIncluded. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,740 INFO L87 Difference]: Start difference. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:02,741 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions. [2022-04-15 06:39:02,741 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 172 transitions. [2022-04-15 06:39:02,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:02,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:02,742 INFO L74 IsIncluded]: Start isIncluded. First operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 170 states. [2022-04-15 06:39:02,742 INFO L87 Difference]: Start difference. First operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 170 states. [2022-04-15 06:39:02,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:02,743 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions. [2022-04-15 06:39:02,743 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 172 transitions. [2022-04-15 06:39:02,743 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:02,743 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:02,743 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:39:02,743 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:39:02,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 171 transitions. [2022-04-15 06:39:02,745 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 171 transitions. Word has length 164 [2022-04-15 06:39:02,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:39:02,745 INFO L478 AbstractCegarLoop]: Abstraction has 169 states and 171 transitions. [2022-04-15 06:39:02,745 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:02,745 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 169 states and 171 transitions. [2022-04-15 06:39:02,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:02,977 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 171 transitions. [2022-04-15 06:39:02,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2022-04-15 06:39:02,978 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:39:02,978 INFO L499 BasicCegarLoop]: trace histogram [52, 52, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:39:02,996 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Forceful destruction successful, exit code 0 [2022-04-15 06:39:03,178 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable52 [2022-04-15 06:39:03,179 INFO L403 AbstractCegarLoop]: === Iteration 54 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:39:03,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:39:03,179 INFO L85 PathProgramCache]: Analyzing trace with hash 1718330949, now seen corresponding path program 51 times [2022-04-15 06:39:03,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:03,179 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2064004041] [2022-04-15 06:39:03,885 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:05,797 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:39:05,964 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:05,965 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:39:05,968 INFO L85 PathProgramCache]: Analyzing trace with hash 1064367, now seen corresponding path program 1 times [2022-04-15 06:39:05,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:39:05,968 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840731810] [2022-04-15 06:39:05,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:05,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:39:05,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:06,021 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:39:06,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:06,023 INFO L290 TraceCheckUtils]: 0: Hoare triple {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:39:06,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-15 06:39:06,024 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-15 06:39:06,025 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39414#(= main_~x~0 0)} is VALID [2022-04-15 06:39:06,025 INFO L290 TraceCheckUtils]: 6: Hoare triple {39414#(= main_~x~0 0)} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39414#(= main_~x~0 0)} is VALID [2022-04-15 06:39:06,026 INFO L290 TraceCheckUtils]: 7: Hoare triple {39414#(= main_~x~0 0)} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39414#(= main_~x~0 0)} is VALID [2022-04-15 06:39:06,027 INFO L290 TraceCheckUtils]: 8: Hoare triple {39414#(= main_~x~0 0)} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39415#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:39:06,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {39415#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39410#false} is VALID [2022-04-15 06:39:06,027 INFO L272 TraceCheckUtils]: 10: Hoare triple {39410#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39410#false} is VALID [2022-04-15 06:39:06,027 INFO L290 TraceCheckUtils]: 11: Hoare triple {39410#false} ~cond := #in~cond; {39410#false} is VALID [2022-04-15 06:39:06,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {39410#false} assume 0 == ~cond; {39410#false} is VALID [2022-04-15 06:39:06,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-15 06:39:06,028 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:06,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:39:06,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840731810] [2022-04-15 06:39:06,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840731810] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:39:06,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [952792392] [2022-04-15 06:39:06,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:06,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:39:06,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:39:06,029 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:39:06,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-04-15 06:39:06,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:06,055 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:39:06,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:06,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:39:06,222 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39409#true} is VALID [2022-04-15 06:39:06,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-15 06:39:06,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-15 06:39:06,222 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-15 06:39:06,222 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-15 06:39:06,223 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:06,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:06,224 INFO L290 TraceCheckUtils]: 7: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:06,224 INFO L290 TraceCheckUtils]: 8: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39445#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:39:06,225 INFO L290 TraceCheckUtils]: 9: Hoare triple {39445#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39410#false} is VALID [2022-04-15 06:39:06,225 INFO L272 TraceCheckUtils]: 10: Hoare triple {39410#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39410#false} is VALID [2022-04-15 06:39:06,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {39410#false} ~cond := #in~cond; {39410#false} is VALID [2022-04-15 06:39:06,225 INFO L290 TraceCheckUtils]: 12: Hoare triple {39410#false} assume 0 == ~cond; {39410#false} is VALID [2022-04-15 06:39:06,225 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-15 06:39:06,226 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:06,226 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:39:07,058 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-15 06:39:07,059 INFO L290 TraceCheckUtils]: 12: Hoare triple {39464#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {39410#false} is VALID [2022-04-15 06:39:07,059 INFO L290 TraceCheckUtils]: 11: Hoare triple {39468#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {39464#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:39:07,059 INFO L272 TraceCheckUtils]: 10: Hoare triple {39472#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39468#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:39:07,060 INFO L290 TraceCheckUtils]: 9: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39472#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:39:07,066 INFO L290 TraceCheckUtils]: 8: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:07,066 INFO L290 TraceCheckUtils]: 7: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:07,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {39486#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2203_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2203_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2203_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:07,074 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39486#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2203_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2203_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2203_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:39:07,074 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-15 06:39:07,074 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-15 06:39:07,074 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-15 06:39:07,074 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-15 06:39:07,074 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39409#true} is VALID [2022-04-15 06:39:07,074 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:07,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [952792392] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:39:07,074 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:39:07,075 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:39:10,715 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:39:10,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2064004041] [2022-04-15 06:39:10,715 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2064004041] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:39:10,715 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:39:10,715 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [55] imperfect sequences [] total 55 [2022-04-15 06:39:10,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115643993] [2022-04-15 06:39:10,715 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:39:10,716 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 167 [2022-04-15 06:39:10,716 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:39:10,716 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:10,817 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:10,818 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2022-04-15 06:39:10,818 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:10,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2022-04-15 06:39:10,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=289, Invalid=3617, Unknown=0, NotChecked=0, Total=3906 [2022-04-15 06:39:10,818 INFO L87 Difference]: Start difference. First operand 169 states and 171 transitions. Second operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:21,535 INFO L93 Difference]: Finished difference Result 181 states and 185 transitions. [2022-04-15 06:39:21,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2022-04-15 06:39:21,536 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 167 [2022-04-15 06:39:21,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:39:21,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 181 transitions. [2022-04-15 06:39:21,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 181 transitions. [2022-04-15 06:39:21,538 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 55 states and 181 transitions. [2022-04-15 06:39:21,672 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 181 edges. 181 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:21,673 INFO L225 Difference]: With dead ends: 181 [2022-04-15 06:39:21,673 INFO L226 Difference]: Without dead ends: 173 [2022-04-15 06:39:21,674 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 247 GetRequests, 28 SyntacticMatches, 106 SemanticMatches, 113 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2326 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=653, Invalid=12457, Unknown=0, NotChecked=0, Total=13110 [2022-04-15 06:39:21,674 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 114 mSDsluCounter, 262 mSDsCounter, 0 mSdLazyCounter, 8477 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 8531 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 8477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:39:21,674 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 274 Invalid, 8531 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 8477 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-04-15 06:39:21,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-04-15 06:39:21,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 172. [2022-04-15 06:39:21,915 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:39:21,916 INFO L82 GeneralOperation]: Start isEquivalent. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,916 INFO L74 IsIncluded]: Start isIncluded. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,916 INFO L87 Difference]: Start difference. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:21,917 INFO L93 Difference]: Finished difference Result 173 states and 175 transitions. [2022-04-15 06:39:21,917 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2022-04-15 06:39:21,917 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:21,918 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:21,918 INFO L74 IsIncluded]: Start isIncluded. First operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-15 06:39:21,918 INFO L87 Difference]: Start difference. First operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-15 06:39:21,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:21,919 INFO L93 Difference]: Finished difference Result 173 states and 175 transitions. [2022-04-15 06:39:21,919 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2022-04-15 06:39:21,919 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:21,919 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:21,919 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:39:21,919 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:39:21,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 174 transitions. [2022-04-15 06:39:21,921 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 174 transitions. Word has length 167 [2022-04-15 06:39:21,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:39:21,921 INFO L478 AbstractCegarLoop]: Abstraction has 172 states and 174 transitions. [2022-04-15 06:39:21,921 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:21,922 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 172 states and 174 transitions. [2022-04-15 06:39:22,181 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:22,181 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 174 transitions. [2022-04-15 06:39:22,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2022-04-15 06:39:22,181 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:39:22,181 INFO L499 BasicCegarLoop]: trace histogram [53, 53, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:39:22,198 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Forceful destruction successful, exit code 0 [2022-04-15 06:39:22,382 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53,52 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:39:22,382 INFO L403 AbstractCegarLoop]: === Iteration 55 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:39:22,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:39:22,382 INFO L85 PathProgramCache]: Analyzing trace with hash -460038643, now seen corresponding path program 52 times [2022-04-15 06:39:22,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:22,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1786447929] [2022-04-15 06:39:25,602 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:39:25,818 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:26,257 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:26,258 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:39:26,261 INFO L85 PathProgramCache]: Analyzing trace with hash 2050596527, now seen corresponding path program 1 times [2022-04-15 06:39:26,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:39:26,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133416436] [2022-04-15 06:39:26,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:26,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:39:26,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:26,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:39:26,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:26,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-15 06:39:26,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-15 06:39:26,303 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-15 06:39:26,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:39:26,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-15 06:39:26,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-15 06:39:26,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-15 06:39:26,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-15 06:39:26,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40719#(= main_~x~0 0)} is VALID [2022-04-15 06:39:26,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {40719#(= main_~x~0 0)} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40719#(= main_~x~0 0)} is VALID [2022-04-15 06:39:26,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {40719#(= main_~x~0 0)} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40719#(= main_~x~0 0)} is VALID [2022-04-15 06:39:26,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {40719#(= main_~x~0 0)} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40720#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:39:26,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {40720#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40715#false} is VALID [2022-04-15 06:39:26,306 INFO L272 TraceCheckUtils]: 10: Hoare triple {40715#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40715#false} is VALID [2022-04-15 06:39:26,306 INFO L290 TraceCheckUtils]: 11: Hoare triple {40715#false} ~cond := #in~cond; {40715#false} is VALID [2022-04-15 06:39:26,306 INFO L290 TraceCheckUtils]: 12: Hoare triple {40715#false} assume 0 == ~cond; {40715#false} is VALID [2022-04-15 06:39:26,306 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-15 06:39:26,307 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:26,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:39:26,307 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133416436] [2022-04-15 06:39:26,307 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2133416436] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:39:26,307 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [565443917] [2022-04-15 06:39:26,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:26,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:39:26,307 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:39:26,308 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:39:26,309 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2022-04-15 06:39:26,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:26,337 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:39:26,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:26,345 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:39:26,542 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40714#true} is VALID [2022-04-15 06:39:26,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-15 06:39:26,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-15 06:39:26,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-15 06:39:26,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-15 06:39:26,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:26,544 INFO L290 TraceCheckUtils]: 6: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:26,544 INFO L290 TraceCheckUtils]: 7: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:26,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40750#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:39:26,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {40750#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40715#false} is VALID [2022-04-15 06:39:26,546 INFO L272 TraceCheckUtils]: 10: Hoare triple {40715#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40715#false} is VALID [2022-04-15 06:39:26,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {40715#false} ~cond := #in~cond; {40715#false} is VALID [2022-04-15 06:39:26,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {40715#false} assume 0 == ~cond; {40715#false} is VALID [2022-04-15 06:39:26,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-15 06:39:26,546 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:26,546 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:39:27,398 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-15 06:39:27,398 INFO L290 TraceCheckUtils]: 12: Hoare triple {40769#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {40715#false} is VALID [2022-04-15 06:39:27,399 INFO L290 TraceCheckUtils]: 11: Hoare triple {40773#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {40769#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:39:27,399 INFO L272 TraceCheckUtils]: 10: Hoare triple {40777#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40773#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:39:27,399 INFO L290 TraceCheckUtils]: 9: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40777#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:39:27,401 INFO L290 TraceCheckUtils]: 8: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:27,401 INFO L290 TraceCheckUtils]: 7: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:27,449 INFO L290 TraceCheckUtils]: 6: Hoare triple {40791#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2272_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2272_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2272_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:27,449 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40791#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2272_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2272_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2272_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:39:27,449 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-15 06:39:27,449 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-15 06:39:27,449 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-15 06:39:27,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-15 06:39:27,450 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40714#true} is VALID [2022-04-15 06:39:27,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:27,450 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [565443917] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:39:27,450 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:39:27,450 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:39:31,160 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:39:31,161 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1786447929] [2022-04-15 06:39:31,161 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1786447929] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:39:31,161 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:39:31,161 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [56] imperfect sequences [] total 56 [2022-04-15 06:39:31,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111805115] [2022-04-15 06:39:31,161 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:39:31,161 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 170 [2022-04-15 06:39:31,161 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:39:31,161 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:31,263 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:31,263 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 56 states [2022-04-15 06:39:31,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:31,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2022-04-15 06:39:31,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=3738, Unknown=0, NotChecked=0, Total=4032 [2022-04-15 06:39:31,264 INFO L87 Difference]: Start difference. First operand 172 states and 174 transitions. Second operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:42,334 INFO L93 Difference]: Finished difference Result 184 states and 188 transitions. [2022-04-15 06:39:42,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2022-04-15 06:39:42,334 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 170 [2022-04-15 06:39:42,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:39:42,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 184 transitions. [2022-04-15 06:39:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 184 transitions. [2022-04-15 06:39:42,336 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 56 states and 184 transitions. [2022-04-15 06:39:42,476 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:42,478 INFO L225 Difference]: With dead ends: 184 [2022-04-15 06:39:42,478 INFO L226 Difference]: Without dead ends: 176 [2022-04-15 06:39:42,479 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 29 SyntacticMatches, 107 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2397 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=665, Invalid=12907, Unknown=0, NotChecked=0, Total=13572 [2022-04-15 06:39:42,480 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 116 mSDsluCounter, 267 mSDsCounter, 0 mSdLazyCounter, 8799 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 8854 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 8799 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:39:42,480 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [116 Valid, 279 Invalid, 8854 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 8799 Invalid, 0 Unknown, 0 Unchecked, 5.6s Time] [2022-04-15 06:39:42,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2022-04-15 06:39:42,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 175. [2022-04-15 06:39:42,708 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:39:42,708 INFO L82 GeneralOperation]: Start isEquivalent. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,708 INFO L74 IsIncluded]: Start isIncluded. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,709 INFO L87 Difference]: Start difference. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:42,710 INFO L93 Difference]: Finished difference Result 176 states and 178 transitions. [2022-04-15 06:39:42,710 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 178 transitions. [2022-04-15 06:39:42,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:42,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:42,710 INFO L74 IsIncluded]: Start isIncluded. First operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 176 states. [2022-04-15 06:39:42,711 INFO L87 Difference]: Start difference. First operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 176 states. [2022-04-15 06:39:42,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:39:42,712 INFO L93 Difference]: Finished difference Result 176 states and 178 transitions. [2022-04-15 06:39:42,712 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 178 transitions. [2022-04-15 06:39:42,712 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:39:42,712 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:39:42,712 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:39:42,712 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:39:42,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 177 transitions. [2022-04-15 06:39:42,714 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 177 transitions. Word has length 170 [2022-04-15 06:39:42,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:39:42,714 INFO L478 AbstractCegarLoop]: Abstraction has 175 states and 177 transitions. [2022-04-15 06:39:42,714 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:42,714 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 175 states and 177 transitions. [2022-04-15 06:39:42,969 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:42,969 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 177 transitions. [2022-04-15 06:39:42,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2022-04-15 06:39:42,969 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:39:42,969 INFO L499 BasicCegarLoop]: trace histogram [54, 54, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:39:42,987 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Forceful destruction successful, exit code 0 [2022-04-15 06:39:43,170 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2022-04-15 06:39:43,170 INFO L403 AbstractCegarLoop]: === Iteration 56 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:39:43,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:39:43,170 INFO L85 PathProgramCache]: Analyzing trace with hash 687288645, now seen corresponding path program 53 times [2022-04-15 06:39:43,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:43,170 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [77880770] [2022-04-15 06:39:45,074 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:39:45,357 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:45,825 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:39:45,826 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:39:45,829 INFO L85 PathProgramCache]: Analyzing trace with hash -194838609, now seen corresponding path program 1 times [2022-04-15 06:39:45,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:39:45,829 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084896513] [2022-04-15 06:39:45,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:45,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:39:45,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:45,877 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:39:45,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:45,879 INFO L290 TraceCheckUtils]: 0: Hoare triple {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:39:45,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-15 06:39:45,880 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-15 06:39:45,881 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42045#(= main_~x~0 0)} is VALID [2022-04-15 06:39:45,881 INFO L290 TraceCheckUtils]: 6: Hoare triple {42045#(= main_~x~0 0)} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42045#(= main_~x~0 0)} is VALID [2022-04-15 06:39:45,882 INFO L290 TraceCheckUtils]: 7: Hoare triple {42045#(= main_~x~0 0)} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42045#(= main_~x~0 0)} is VALID [2022-04-15 06:39:45,883 INFO L290 TraceCheckUtils]: 8: Hoare triple {42045#(= main_~x~0 0)} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42046#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:39:45,883 INFO L290 TraceCheckUtils]: 9: Hoare triple {42046#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42041#false} is VALID [2022-04-15 06:39:45,883 INFO L272 TraceCheckUtils]: 10: Hoare triple {42041#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42041#false} is VALID [2022-04-15 06:39:45,883 INFO L290 TraceCheckUtils]: 11: Hoare triple {42041#false} ~cond := #in~cond; {42041#false} is VALID [2022-04-15 06:39:45,883 INFO L290 TraceCheckUtils]: 12: Hoare triple {42041#false} assume 0 == ~cond; {42041#false} is VALID [2022-04-15 06:39:45,884 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-15 06:39:45,884 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:45,884 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:39:45,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084896513] [2022-04-15 06:39:45,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1084896513] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:39:45,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1658003716] [2022-04-15 06:39:45,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:39:45,884 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:39:45,884 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:39:45,885 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:39:45,886 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-04-15 06:39:45,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:45,918 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:39:45,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:39:45,926 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:39:46,104 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42040#true} is VALID [2022-04-15 06:39:46,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-15 06:39:46,105 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-15 06:39:46,105 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-15 06:39:46,105 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-15 06:39:46,105 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:46,106 INFO L290 TraceCheckUtils]: 6: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:46,107 INFO L290 TraceCheckUtils]: 7: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:39:46,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42076#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:39:46,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {42076#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42041#false} is VALID [2022-04-15 06:39:46,109 INFO L272 TraceCheckUtils]: 10: Hoare triple {42041#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42041#false} is VALID [2022-04-15 06:39:46,109 INFO L290 TraceCheckUtils]: 11: Hoare triple {42041#false} ~cond := #in~cond; {42041#false} is VALID [2022-04-15 06:39:46,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {42041#false} assume 0 == ~cond; {42041#false} is VALID [2022-04-15 06:39:46,109 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-15 06:39:46,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:46,109 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:39:47,249 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-15 06:39:47,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {42095#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {42041#false} is VALID [2022-04-15 06:39:47,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {42099#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {42095#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:39:47,251 INFO L272 TraceCheckUtils]: 10: Hoare triple {42103#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42099#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:39:47,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42103#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:39:47,254 INFO L290 TraceCheckUtils]: 8: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:47,254 INFO L290 TraceCheckUtils]: 7: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:48,528 INFO L290 TraceCheckUtils]: 6: Hoare triple {42117#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2342_33 Int)) (or (not (<= (div (+ 1000000 (* 4294967296 aux_div_v_main_~y~0_2342_33) (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2342_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:39:48,529 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42117#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2342_33 Int)) (or (not (<= (div (+ 1000000 (* 4294967296 aux_div_v_main_~y~0_2342_33) (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2342_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:39:48,529 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-15 06:39:48,529 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-15 06:39:48,529 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-15 06:39:48,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-15 06:39:48,530 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42040#true} is VALID [2022-04-15 06:39:48,530 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:39:48,530 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1658003716] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:39:48,530 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:39:48,530 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:39:52,340 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:39:52,340 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [77880770] [2022-04-15 06:39:52,340 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [77880770] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:39:52,340 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:39:52,340 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [57] imperfect sequences [] total 57 [2022-04-15 06:39:52,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320416260] [2022-04-15 06:39:52,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:39:52,341 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 173 [2022-04-15 06:39:52,341 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:39:52,341 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:39:52,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:39:52,445 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2022-04-15 06:39:52,445 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:39:52,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2022-04-15 06:39:52,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=3861, Unknown=0, NotChecked=0, Total=4160 [2022-04-15 06:39:52,446 INFO L87 Difference]: Start difference. First operand 175 states and 177 transitions. Second operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:04,235 INFO L93 Difference]: Finished difference Result 187 states and 191 transitions. [2022-04-15 06:40:04,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2022-04-15 06:40:04,235 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 173 [2022-04-15 06:40:04,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:40:04,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 187 transitions. [2022-04-15 06:40:04,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 187 transitions. [2022-04-15 06:40:04,237 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 57 states and 187 transitions. [2022-04-15 06:40:04,367 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 187 edges. 187 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:04,369 INFO L225 Difference]: With dead ends: 187 [2022-04-15 06:40:04,369 INFO L226 Difference]: Without dead ends: 179 [2022-04-15 06:40:04,369 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 29 SyntacticMatches, 109 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2469 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=677, Invalid=13365, Unknown=0, NotChecked=0, Total=14042 [2022-04-15 06:40:04,370 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 118 mSDsluCounter, 272 mSDsCounter, 0 mSdLazyCounter, 9127 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 284 SdHoareTripleChecker+Invalid, 9183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 9127 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.9s IncrementalHoareTripleChecker+Time [2022-04-15 06:40:04,370 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 284 Invalid, 9183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 9127 Invalid, 0 Unknown, 0 Unchecked, 5.9s Time] [2022-04-15 06:40:04,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-15 06:40:04,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 178. [2022-04-15 06:40:04,630 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:40:04,630 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,630 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,631 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:04,632 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2022-04-15 06:40:04,632 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 181 transitions. [2022-04-15 06:40:04,632 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:04,632 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:04,633 INFO L74 IsIncluded]: Start isIncluded. First operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-15 06:40:04,633 INFO L87 Difference]: Start difference. First operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-15 06:40:04,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:04,634 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2022-04-15 06:40:04,634 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 181 transitions. [2022-04-15 06:40:04,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:04,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:04,634 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:40:04,635 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:40:04,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 180 transitions. [2022-04-15 06:40:04,636 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 180 transitions. Word has length 173 [2022-04-15 06:40:04,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:40:04,637 INFO L478 AbstractCegarLoop]: Abstraction has 178 states and 180 transitions. [2022-04-15 06:40:04,637 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:04,637 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 178 states and 180 transitions. [2022-04-15 06:40:04,891 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 180 edges. 180 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:04,892 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 180 transitions. [2022-04-15 06:40:04,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2022-04-15 06:40:04,892 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:40:04,892 INFO L499 BasicCegarLoop]: trace histogram [55, 55, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:40:04,908 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2022-04-15 06:40:05,092 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable55 [2022-04-15 06:40:05,093 INFO L403 AbstractCegarLoop]: === Iteration 57 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:40:05,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:40:05,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1364783885, now seen corresponding path program 54 times [2022-04-15 06:40:05,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:40:05,093 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1125421816] [2022-04-15 06:40:08,161 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:08,627 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:08,628 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:40:08,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1854693551, now seen corresponding path program 1 times [2022-04-15 06:40:08,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:40:08,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558593268] [2022-04-15 06:40:08,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:08,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:40:08,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:08,676 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:40:08,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:08,679 INFO L290 TraceCheckUtils]: 0: Hoare triple {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:40:08,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-15 06:40:08,679 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-15 06:40:08,680 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43392#(= main_~x~0 0)} is VALID [2022-04-15 06:40:08,680 INFO L290 TraceCheckUtils]: 6: Hoare triple {43392#(= main_~x~0 0)} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43392#(= main_~x~0 0)} is VALID [2022-04-15 06:40:08,681 INFO L290 TraceCheckUtils]: 7: Hoare triple {43392#(= main_~x~0 0)} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43392#(= main_~x~0 0)} is VALID [2022-04-15 06:40:08,681 INFO L290 TraceCheckUtils]: 8: Hoare triple {43392#(= main_~x~0 0)} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43393#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:40:08,682 INFO L290 TraceCheckUtils]: 9: Hoare triple {43393#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43388#false} is VALID [2022-04-15 06:40:08,682 INFO L272 TraceCheckUtils]: 10: Hoare triple {43388#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43388#false} is VALID [2022-04-15 06:40:08,682 INFO L290 TraceCheckUtils]: 11: Hoare triple {43388#false} ~cond := #in~cond; {43388#false} is VALID [2022-04-15 06:40:08,682 INFO L290 TraceCheckUtils]: 12: Hoare triple {43388#false} assume 0 == ~cond; {43388#false} is VALID [2022-04-15 06:40:08,682 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-15 06:40:08,682 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:08,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:40:08,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558593268] [2022-04-15 06:40:08,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [558593268] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:40:08,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1713477721] [2022-04-15 06:40:08,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:08,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:40:08,683 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:40:08,684 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:40:08,684 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-04-15 06:40:08,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:08,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:40:08,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:08,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:40:08,887 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43387#true} is VALID [2022-04-15 06:40:08,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-15 06:40:08,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-15 06:40:08,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-15 06:40:08,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-15 06:40:08,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:08,889 INFO L290 TraceCheckUtils]: 6: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:08,889 INFO L290 TraceCheckUtils]: 7: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:08,890 INFO L290 TraceCheckUtils]: 8: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43423#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:40:08,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {43423#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43388#false} is VALID [2022-04-15 06:40:08,891 INFO L272 TraceCheckUtils]: 10: Hoare triple {43388#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43388#false} is VALID [2022-04-15 06:40:08,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {43388#false} ~cond := #in~cond; {43388#false} is VALID [2022-04-15 06:40:08,891 INFO L290 TraceCheckUtils]: 12: Hoare triple {43388#false} assume 0 == ~cond; {43388#false} is VALID [2022-04-15 06:40:08,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-15 06:40:08,891 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:08,891 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:40:10,101 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-15 06:40:10,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {43442#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {43388#false} is VALID [2022-04-15 06:40:10,102 INFO L290 TraceCheckUtils]: 11: Hoare triple {43446#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {43442#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:40:10,103 INFO L272 TraceCheckUtils]: 10: Hoare triple {43450#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43446#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:40:10,103 INFO L290 TraceCheckUtils]: 9: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43450#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:40:10,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:10,106 INFO L290 TraceCheckUtils]: 7: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:10,281 INFO L290 TraceCheckUtils]: 6: Hoare triple {43464#(and (or (forall ((aux_div_v_main_~y~0_2413_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2413_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2413_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:10,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43464#(and (or (forall ((aux_div_v_main_~y~0_2413_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2413_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2413_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:40:10,282 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-15 06:40:10,282 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-15 06:40:10,282 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-15 06:40:10,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-15 06:40:10,282 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43387#true} is VALID [2022-04-15 06:40:10,282 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:10,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1713477721] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:40:10,283 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:40:10,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:40:14,266 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:40:14,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1125421816] [2022-04-15 06:40:14,266 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1125421816] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:40:14,266 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:40:14,266 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [58] imperfect sequences [] total 58 [2022-04-15 06:40:14,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196145491] [2022-04-15 06:40:14,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:40:14,267 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 176 [2022-04-15 06:40:14,267 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:40:14,267 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:14,373 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:14,373 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2022-04-15 06:40:14,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:40:14,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2022-04-15 06:40:14,373 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=3986, Unknown=0, NotChecked=0, Total=4290 [2022-04-15 06:40:14,374 INFO L87 Difference]: Start difference. First operand 178 states and 180 transitions. Second operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:26,529 INFO L93 Difference]: Finished difference Result 190 states and 194 transitions. [2022-04-15 06:40:26,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2022-04-15 06:40:26,529 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 176 [2022-04-15 06:40:26,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:40:26,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 190 transitions. [2022-04-15 06:40:26,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 190 transitions. [2022-04-15 06:40:26,531 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 190 transitions. [2022-04-15 06:40:26,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:26,664 INFO L225 Difference]: With dead ends: 190 [2022-04-15 06:40:26,664 INFO L226 Difference]: Without dead ends: 182 [2022-04-15 06:40:26,664 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 29 SyntacticMatches, 111 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2542 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=689, Invalid=13831, Unknown=0, NotChecked=0, Total=14520 [2022-04-15 06:40:26,665 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 120 mSDsluCounter, 277 mSDsCounter, 0 mSdLazyCounter, 9461 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 120 SdHoareTripleChecker+Valid, 289 SdHoareTripleChecker+Invalid, 9518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 9461 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.1s IncrementalHoareTripleChecker+Time [2022-04-15 06:40:26,665 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [120 Valid, 289 Invalid, 9518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 9461 Invalid, 0 Unknown, 0 Unchecked, 6.1s Time] [2022-04-15 06:40:26,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2022-04-15 06:40:26,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 181. [2022-04-15 06:40:26,956 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:40:26,956 INFO L82 GeneralOperation]: Start isEquivalent. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,957 INFO L74 IsIncluded]: Start isIncluded. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,957 INFO L87 Difference]: Start difference. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:26,958 INFO L93 Difference]: Finished difference Result 182 states and 184 transitions. [2022-04-15 06:40:26,958 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2022-04-15 06:40:26,959 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:26,959 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:26,959 INFO L74 IsIncluded]: Start isIncluded. First operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 182 states. [2022-04-15 06:40:26,959 INFO L87 Difference]: Start difference. First operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 182 states. [2022-04-15 06:40:26,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:26,960 INFO L93 Difference]: Finished difference Result 182 states and 184 transitions. [2022-04-15 06:40:26,960 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2022-04-15 06:40:26,961 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:26,961 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:26,961 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:40:26,961 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:40:26,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 183 transitions. [2022-04-15 06:40:26,962 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 183 transitions. Word has length 176 [2022-04-15 06:40:26,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:40:26,963 INFO L478 AbstractCegarLoop]: Abstraction has 181 states and 183 transitions. [2022-04-15 06:40:26,963 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:26,963 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 181 states and 183 transitions. [2022-04-15 06:40:27,250 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:27,250 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 183 transitions. [2022-04-15 06:40:27,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2022-04-15 06:40:27,251 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:40:27,251 INFO L499 BasicCegarLoop]: trace histogram [56, 56, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:40:27,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Forceful destruction successful, exit code 0 [2022-04-15 06:40:27,459 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56,55 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:40:27,459 INFO L403 AbstractCegarLoop]: === Iteration 58 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:40:27,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:40:27,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1720812475, now seen corresponding path program 55 times [2022-04-15 06:40:27,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:40:27,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1353742060] [2022-04-15 06:40:30,846 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:32,030 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:32,031 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:40:32,033 INFO L85 PathProgramCache]: Analyzing trace with hash -390741585, now seen corresponding path program 1 times [2022-04-15 06:40:32,033 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:40:32,033 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859620906] [2022-04-15 06:40:32,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:32,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:40:32,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:32,081 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:40:32,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:32,084 INFO L290 TraceCheckUtils]: 0: Hoare triple {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:40:32,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-15 06:40:32,084 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-15 06:40:32,085 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44760#(= main_~x~0 0)} is VALID [2022-04-15 06:40:32,085 INFO L290 TraceCheckUtils]: 6: Hoare triple {44760#(= main_~x~0 0)} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44760#(= main_~x~0 0)} is VALID [2022-04-15 06:40:32,086 INFO L290 TraceCheckUtils]: 7: Hoare triple {44760#(= main_~x~0 0)} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44760#(= main_~x~0 0)} is VALID [2022-04-15 06:40:32,086 INFO L290 TraceCheckUtils]: 8: Hoare triple {44760#(= main_~x~0 0)} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44761#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:40:32,087 INFO L290 TraceCheckUtils]: 9: Hoare triple {44761#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44756#false} is VALID [2022-04-15 06:40:32,087 INFO L272 TraceCheckUtils]: 10: Hoare triple {44756#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44756#false} is VALID [2022-04-15 06:40:32,087 INFO L290 TraceCheckUtils]: 11: Hoare triple {44756#false} ~cond := #in~cond; {44756#false} is VALID [2022-04-15 06:40:32,087 INFO L290 TraceCheckUtils]: 12: Hoare triple {44756#false} assume 0 == ~cond; {44756#false} is VALID [2022-04-15 06:40:32,087 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-15 06:40:32,087 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:32,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:40:32,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859620906] [2022-04-15 06:40:32,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [859620906] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:40:32,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [59299587] [2022-04-15 06:40:32,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:32,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:40:32,088 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:40:32,089 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:40:32,089 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2022-04-15 06:40:32,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:32,123 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:40:32,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:32,130 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:40:32,290 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44755#true} is VALID [2022-04-15 06:40:32,290 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-15 06:40:32,290 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-15 06:40:32,290 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-15 06:40:32,290 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-15 06:40:32,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:32,291 INFO L290 TraceCheckUtils]: 6: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:32,291 INFO L290 TraceCheckUtils]: 7: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:32,292 INFO L290 TraceCheckUtils]: 8: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44791#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:40:32,293 INFO L290 TraceCheckUtils]: 9: Hoare triple {44791#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44756#false} is VALID [2022-04-15 06:40:32,293 INFO L272 TraceCheckUtils]: 10: Hoare triple {44756#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44756#false} is VALID [2022-04-15 06:40:32,293 INFO L290 TraceCheckUtils]: 11: Hoare triple {44756#false} ~cond := #in~cond; {44756#false} is VALID [2022-04-15 06:40:32,293 INFO L290 TraceCheckUtils]: 12: Hoare triple {44756#false} assume 0 == ~cond; {44756#false} is VALID [2022-04-15 06:40:32,293 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-15 06:40:32,293 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:32,293 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:40:33,165 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-15 06:40:33,165 INFO L290 TraceCheckUtils]: 12: Hoare triple {44810#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {44756#false} is VALID [2022-04-15 06:40:33,166 INFO L290 TraceCheckUtils]: 11: Hoare triple {44814#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {44810#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:40:33,166 INFO L272 TraceCheckUtils]: 10: Hoare triple {44818#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44814#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:40:33,167 INFO L290 TraceCheckUtils]: 9: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44818#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:40:33,172 INFO L290 TraceCheckUtils]: 8: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:33,172 INFO L290 TraceCheckUtils]: 7: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:33,355 INFO L290 TraceCheckUtils]: 6: Hoare triple {44832#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2485_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_2485_33) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2485_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:33,355 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44832#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2485_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_2485_33) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2485_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:40:33,356 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-15 06:40:33,356 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-15 06:40:33,356 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-15 06:40:33,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-15 06:40:33,356 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44755#true} is VALID [2022-04-15 06:40:33,356 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:33,357 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [59299587] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:40:33,357 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:40:33,357 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:40:37,457 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:40:37,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1353742060] [2022-04-15 06:40:37,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1353742060] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:40:37,457 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:40:37,457 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [59] imperfect sequences [] total 59 [2022-04-15 06:40:37,457 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251681508] [2022-04-15 06:40:37,457 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:40:37,457 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 179 [2022-04-15 06:40:37,458 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:40:37,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:37,582 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 179 edges. 179 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:37,582 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 59 states [2022-04-15 06:40:37,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:40:37,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2022-04-15 06:40:37,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=309, Invalid=4113, Unknown=0, NotChecked=0, Total=4422 [2022-04-15 06:40:37,583 INFO L87 Difference]: Start difference. First operand 181 states and 183 transitions. Second operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:50,290 INFO L93 Difference]: Finished difference Result 193 states and 197 transitions. [2022-04-15 06:40:50,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-04-15 06:40:50,290 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 179 [2022-04-15 06:40:50,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:40:50,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 193 transitions. [2022-04-15 06:40:50,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 193 transitions. [2022-04-15 06:40:50,292 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 59 states and 193 transitions. [2022-04-15 06:40:50,426 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:50,428 INFO L225 Difference]: With dead ends: 193 [2022-04-15 06:40:50,428 INFO L226 Difference]: Without dead ends: 185 [2022-04-15 06:40:50,429 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 29 SyntacticMatches, 113 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2616 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=701, Invalid=14305, Unknown=0, NotChecked=0, Total=15006 [2022-04-15 06:40:50,429 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 122 mSDsluCounter, 282 mSDsCounter, 0 mSdLazyCounter, 9801 mSolverCounterSat, 58 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 9859 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 58 IncrementalHoareTripleChecker+Valid, 9801 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:40:50,429 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [122 Valid, 294 Invalid, 9859 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [58 Valid, 9801 Invalid, 0 Unknown, 0 Unchecked, 6.4s Time] [2022-04-15 06:40:50,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-15 06:40:50,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 184. [2022-04-15 06:40:50,711 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:40:50,711 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,712 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,712 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:50,713 INFO L93 Difference]: Finished difference Result 185 states and 187 transitions. [2022-04-15 06:40:50,713 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2022-04-15 06:40:50,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:50,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:50,714 INFO L74 IsIncluded]: Start isIncluded. First operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-15 06:40:50,714 INFO L87 Difference]: Start difference. First operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-15 06:40:50,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:40:50,715 INFO L93 Difference]: Finished difference Result 185 states and 187 transitions. [2022-04-15 06:40:50,715 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2022-04-15 06:40:50,715 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:40:50,715 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:40:50,715 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:40:50,716 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:40:50,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2022-04-15 06:40:50,717 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 179 [2022-04-15 06:40:50,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:40:50,717 INFO L478 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2022-04-15 06:40:50,718 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:40:50,718 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 184 states and 186 transitions. [2022-04-15 06:40:50,995 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:40:50,995 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2022-04-15 06:40:50,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2022-04-15 06:40:50,996 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:40:50,996 INFO L499 BasicCegarLoop]: trace histogram [57, 57, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:40:51,014 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Ended with exit code 0 [2022-04-15 06:40:51,199 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57,56 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:40:51,199 INFO L403 AbstractCegarLoop]: === Iteration 59 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:40:51,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:40:51,200 INFO L85 PathProgramCache]: Analyzing trace with hash 463063053, now seen corresponding path program 56 times [2022-04-15 06:40:51,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:40:51,200 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1668866242] [2022-04-15 06:40:53,696 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:40:53,882 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:54,422 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:40:54,424 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:40:54,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1658790575, now seen corresponding path program 1 times [2022-04-15 06:40:54,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:40:54,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824612009] [2022-04-15 06:40:54,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:54,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:40:54,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:54,465 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:40:54,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:54,469 INFO L290 TraceCheckUtils]: 0: Hoare triple {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-15 06:40:54,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-15 06:40:54,469 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-15 06:40:54,470 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:40:54,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-15 06:40:54,470 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-15 06:40:54,470 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-15 06:40:54,470 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-15 06:40:54,470 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46149#(= main_~x~0 0)} is VALID [2022-04-15 06:40:54,471 INFO L290 TraceCheckUtils]: 6: Hoare triple {46149#(= main_~x~0 0)} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46149#(= main_~x~0 0)} is VALID [2022-04-15 06:40:54,471 INFO L290 TraceCheckUtils]: 7: Hoare triple {46149#(= main_~x~0 0)} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46149#(= main_~x~0 0)} is VALID [2022-04-15 06:40:54,472 INFO L290 TraceCheckUtils]: 8: Hoare triple {46149#(= main_~x~0 0)} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46150#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:40:54,472 INFO L290 TraceCheckUtils]: 9: Hoare triple {46150#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46145#false} is VALID [2022-04-15 06:40:54,473 INFO L272 TraceCheckUtils]: 10: Hoare triple {46145#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46145#false} is VALID [2022-04-15 06:40:54,473 INFO L290 TraceCheckUtils]: 11: Hoare triple {46145#false} ~cond := #in~cond; {46145#false} is VALID [2022-04-15 06:40:54,473 INFO L290 TraceCheckUtils]: 12: Hoare triple {46145#false} assume 0 == ~cond; {46145#false} is VALID [2022-04-15 06:40:54,473 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-15 06:40:54,473 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:54,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:40:54,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824612009] [2022-04-15 06:40:54,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824612009] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:40:54,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1911699898] [2022-04-15 06:40:54,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:40:54,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:40:54,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:40:54,475 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:40:54,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2022-04-15 06:40:54,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:54,501 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 06:40:54,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:40:54,508 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:40:54,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46144#true} is VALID [2022-04-15 06:40:54,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-15 06:40:54,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-15 06:40:54,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-15 06:40:54,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-15 06:40:54,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:54,665 INFO L290 TraceCheckUtils]: 6: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:54,665 INFO L290 TraceCheckUtils]: 7: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-15 06:40:54,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46180#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-15 06:40:54,667 INFO L290 TraceCheckUtils]: 9: Hoare triple {46180#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46145#false} is VALID [2022-04-15 06:40:54,667 INFO L272 TraceCheckUtils]: 10: Hoare triple {46145#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46145#false} is VALID [2022-04-15 06:40:54,667 INFO L290 TraceCheckUtils]: 11: Hoare triple {46145#false} ~cond := #in~cond; {46145#false} is VALID [2022-04-15 06:40:54,667 INFO L290 TraceCheckUtils]: 12: Hoare triple {46145#false} assume 0 == ~cond; {46145#false} is VALID [2022-04-15 06:40:54,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-15 06:40:54,667 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:54,667 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:40:55,810 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-15 06:40:55,810 INFO L290 TraceCheckUtils]: 12: Hoare triple {46199#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {46145#false} is VALID [2022-04-15 06:40:55,810 INFO L290 TraceCheckUtils]: 11: Hoare triple {46203#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {46199#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:40:55,811 INFO L272 TraceCheckUtils]: 10: Hoare triple {46207#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46203#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:40:55,811 INFO L290 TraceCheckUtils]: 9: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46207#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-15 06:40:55,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:55,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:55,865 INFO L290 TraceCheckUtils]: 6: Hoare triple {46221#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_2558_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2558_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2558_33) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-15 06:40:55,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46221#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_2558_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2558_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2558_33) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 06:40:55,866 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-15 06:40:55,866 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-15 06:40:55,866 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-15 06:40:55,866 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-15 06:40:55,866 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46144#true} is VALID [2022-04-15 06:40:55,866 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:40:55,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1911699898] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:40:55,866 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:40:55,866 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-15 06:41:00,059 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:41:00,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1668866242] [2022-04-15 06:41:00,059 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1668866242] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:41:00,059 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:41:00,059 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [60] imperfect sequences [] total 60 [2022-04-15 06:41:00,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040220893] [2022-04-15 06:41:00,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:41:00,060 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 182 [2022-04-15 06:41:00,060 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:41:00,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:00,170 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:41:00,170 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-04-15 06:41:00,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:41:00,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-04-15 06:41:00,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=314, Invalid=4242, Unknown=0, NotChecked=0, Total=4556 [2022-04-15 06:41:00,171 INFO L87 Difference]: Start difference. First operand 184 states and 186 transitions. Second operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:41:13,097 INFO L93 Difference]: Finished difference Result 196 states and 200 transitions. [2022-04-15 06:41:13,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2022-04-15 06:41:13,097 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 182 [2022-04-15 06:41:13,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:41:13,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 196 transitions. [2022-04-15 06:41:13,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 196 transitions. [2022-04-15 06:41:13,099 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 60 states and 196 transitions. [2022-04-15 06:41:13,250 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:41:13,252 INFO L225 Difference]: With dead ends: 196 [2022-04-15 06:41:13,252 INFO L226 Difference]: Without dead ends: 188 [2022-04-15 06:41:13,252 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 29 SyntacticMatches, 115 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2691 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=713, Invalid=14787, Unknown=0, NotChecked=0, Total=15500 [2022-04-15 06:41:13,253 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 124 mSDsluCounter, 287 mSDsCounter, 0 mSdLazyCounter, 10147 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 10206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 10147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:41:13,253 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [124 Valid, 299 Invalid, 10206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 10147 Invalid, 0 Unknown, 0 Unchecked, 6.5s Time] [2022-04-15 06:41:13,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2022-04-15 06:41:13,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 187. [2022-04-15 06:41:13,525 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:41:13,525 INFO L82 GeneralOperation]: Start isEquivalent. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,525 INFO L74 IsIncluded]: Start isIncluded. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,525 INFO L87 Difference]: Start difference. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:41:13,527 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2022-04-15 06:41:13,527 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2022-04-15 06:41:13,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:41:13,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:41:13,527 INFO L74 IsIncluded]: Start isIncluded. First operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 188 states. [2022-04-15 06:41:13,527 INFO L87 Difference]: Start difference. First operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 188 states. [2022-04-15 06:41:13,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:41:13,529 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2022-04-15 06:41:13,529 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2022-04-15 06:41:13,529 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:41:13,529 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:41:13,529 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:41:13,529 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:41:13,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 189 transitions. [2022-04-15 06:41:13,531 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 189 transitions. Word has length 182 [2022-04-15 06:41:13,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:41:13,531 INFO L478 AbstractCegarLoop]: Abstraction has 187 states and 189 transitions. [2022-04-15 06:41:13,531 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:13,531 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 187 states and 189 transitions. [2022-04-15 06:41:13,821 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:41:13,822 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 189 transitions. [2022-04-15 06:41:13,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2022-04-15 06:41:13,822 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:41:13,822 INFO L499 BasicCegarLoop]: trace histogram [58, 58, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:41:13,840 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Forceful destruction successful, exit code 0 [2022-04-15 06:41:14,023 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58,57 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:41:14,023 INFO L403 AbstractCegarLoop]: === Iteration 60 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:41:14,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:41:14,023 INFO L85 PathProgramCache]: Analyzing trace with hash 134317893, now seen corresponding path program 57 times [2022-04-15 06:41:14,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:41:14,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [636739965] [2022-04-15 06:41:15,844 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:41:16,270 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:41:17,338 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:41:17,339 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:41:17,344 INFO L85 PathProgramCache]: Analyzing trace with hash -586644561, now seen corresponding path program 1 times [2022-04-15 06:41:17,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:41:17,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527748424] [2022-04-15 06:41:17,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:41:17,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:41:17,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:41:17,386 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:41:17,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:41:17,390 INFO L290 TraceCheckUtils]: 0: Hoare triple {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:41:17,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-15 06:41:17,390 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-15 06:41:17,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {47559#(= main_~x~0 0)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,392 INFO L290 TraceCheckUtils]: 7: Hoare triple {47559#(= main_~x~0 0)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,393 INFO L290 TraceCheckUtils]: 8: Hoare triple {47559#(= main_~x~0 0)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-15 06:41:17,393 INFO L290 TraceCheckUtils]: 9: Hoare triple {47560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-15 06:41:17,393 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-15 06:41:17,393 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-15 06:41:17,400 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-15 06:41:17,400 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-15 06:41:17,400 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:41:17,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:41:17,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527748424] [2022-04-15 06:41:17,400 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [527748424] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:41:17,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [308783528] [2022-04-15 06:41:17,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:41:17,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:41:17,401 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:41:17,401 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:41:17,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2022-04-15 06:41:17,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:41:17,427 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-15 06:41:17,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:41:17,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:41:17,552 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47554#true} is VALID [2022-04-15 06:41:17,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-15 06:41:17,553 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-15 06:41:17,553 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-15 06:41:17,553 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-15 06:41:17,553 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,554 INFO L290 TraceCheckUtils]: 6: Hoare triple {47559#(= main_~x~0 0)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,554 INFO L290 TraceCheckUtils]: 7: Hoare triple {47559#(= main_~x~0 0)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47559#(= main_~x~0 0)} is VALID [2022-04-15 06:41:17,555 INFO L290 TraceCheckUtils]: 8: Hoare triple {47559#(= main_~x~0 0)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47589#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} is VALID [2022-04-15 06:41:17,555 INFO L290 TraceCheckUtils]: 9: Hoare triple {47589#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-15 06:41:17,555 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-15 06:41:17,555 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-15 06:41:17,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-15 06:41:17,556 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-15 06:41:17,556 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:41:17,556 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:41:18,061 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-15 06:41:18,061 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-15 06:41:18,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-15 06:41:18,062 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-15 06:41:18,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-15 06:41:18,067 INFO L290 TraceCheckUtils]: 8: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:41:18,067 INFO L290 TraceCheckUtils]: 7: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:41:18,068 INFO L290 TraceCheckUtils]: 6: Hoare triple {47627#(< (mod main_~x~0 4294967296) 500000)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-15 06:41:18,068 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47627#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-15 06:41:18,068 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-15 06:41:18,068 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-15 06:41:18,068 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-15 06:41:18,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-15 06:41:18,068 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47554#true} is VALID [2022-04-15 06:41:18,068 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:41:18,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [308783528] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:41:18,069 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:41:18,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-15 06:41:21,995 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:41:21,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [636739965] [2022-04-15 06:41:21,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [636739965] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:41:21,995 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:41:21,995 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [61] imperfect sequences [] total 61 [2022-04-15 06:41:21,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852565000] [2022-04-15 06:41:21,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:41:21,996 INFO L78 Accepts]: Start accepts. Automaton has has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 185 [2022-04-15 06:41:21,996 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:41:21,996 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:41:22,109 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:41:22,110 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 61 states [2022-04-15 06:41:22,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:41:22,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2022-04-15 06:41:22,110 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=3797, Unknown=0, NotChecked=0, Total=4160 [2022-04-15 06:41:22,110 INFO L87 Difference]: Start difference. First operand 187 states and 189 transitions. Second operand has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)