/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 06:34:11,796 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 06:34:11,798 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 06:34:11,824 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-15 06:34:11,825 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-15 06:34:11,826 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-15 06:34:11,827 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-15 06:34:11,828 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-15 06:34:11,830 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-15 06:34:11,831 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-15 06:34:11,832 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-15 06:34:11,833 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-15 06:34:11,833 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 06:34:11,834 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 06:34:11,835 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 06:34:11,836 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 06:34:11,836 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 06:34:11,837 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 06:34:11,839 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 06:34:11,841 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 06:34:11,842 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 06:34:11,843 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 06:34:11,844 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 06:34:11,844 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 06:34:11,845 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 06:34:11,847 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 06:34:11,855 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 06:34:11,856 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 06:34:11,858 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 06:34:11,858 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-15 06:34:11,870 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 06:34:11,870 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 06:34:11,871 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 06:34:11,871 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-15 06:34:11,872 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 06:34:11,872 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-15 06:34:11,872 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 06:34:11,872 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 06:34:11,872 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 06:34:11,873 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 06:34:11,873 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-15 06:34:11,873 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 06:34:11,873 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 06:34:11,873 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 06:34:11,874 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 06:34:11,874 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 06:34:11,874 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-15 06:34:11,874 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 06:34:11,874 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 06:34:11,875 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 06:34:11,879 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-15 06:34:11,880 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-15 06:34:11,880 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-15 06:34:11,880 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 06:34:11,880 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-15 06:34:11,881 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 06:34:12,113 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 06:34:12,142 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 06:34:12,144 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 06:34:12,145 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 06:34:12,147 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 06:34:12,149 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-15 06:34:12,205 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4626f0c9f/e86365cbee8e44b2949bae689d76f791/FLAGbb9652e78 [2022-04-15 06:34:12,658 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 06:34:12,659 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-15 06:34:12,670 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4626f0c9f/e86365cbee8e44b2949bae689d76f791/FLAGbb9652e78 [2022-04-15 06:34:13,017 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4626f0c9f/e86365cbee8e44b2949bae689d76f791 [2022-04-15 06:34:13,019 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 06:34:13,022 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-15 06:34:13,026 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 06:34:13,027 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 06:34:13,030 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 06:34:13,031 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,032 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c2b945d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13, skipping insertion in model container [2022-04-15 06:34:13,033 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,039 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 06:34:13,082 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 06:34:13,255 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-15 06:34:13,368 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 06:34:13,400 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 06:34:13,421 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-15 06:34:13,474 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 06:34:13,504 INFO L208 MainTranslator]: Completed translation [2022-04-15 06:34:13,505 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13 WrapperNode [2022-04-15 06:34:13,505 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 06:34:13,506 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 06:34:13,506 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 06:34:13,506 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 06:34:13,518 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,518 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,554 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,554 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,630 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,639 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,659 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,667 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 06:34:13,668 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 06:34:13,668 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 06:34:13,668 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 06:34:13,677 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (1/1) ... [2022-04-15 06:34:13,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 06:34:13,695 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:13,713 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 06:34:13,734 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 06:34:13,749 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 06:34:13,749 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 06:34:13,749 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_func_def_resp_len [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_is_naa5 [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure dStrHex [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_num [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_llnum [2022-04-15 06:34:13,750 INFO L138 BoogieDeclarations]: Found implementation of procedure do_discover_list [2022-04-15 06:34:13,751 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 06:34:13,751 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-15 06:34:13,752 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 06:34:13,752 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 06:34:13,752 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 06:34:13,752 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 06:34:13,752 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure fopen [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure sscanf [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure strcmp [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure strchr [2022-04-15 06:34:13,753 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure getopt_long [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure smp_initiator_open [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure smp_send_req [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_func_def_resp_len [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure smp_is_naa5 [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure dStrHex [2022-04-15 06:34:13,754 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_num [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_llnum [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure do_discover_list [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure main6 [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure toupper [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-15 06:34:13,755 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 06:34:13,756 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 06:34:13,903 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 06:34:13,905 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 06:34:14,945 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 06:34:14,959 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 06:34:14,959 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-15 06:34:14,961 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 06:34:14 BoogieIcfgContainer [2022-04-15 06:34:14,961 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 06:34:14,962 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 06:34:14,963 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 06:34:14,965 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 06:34:14,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 06:34:13" (1/3) ... [2022-04-15 06:34:14,966 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7953b912 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 06:34:14, skipping insertion in model container [2022-04-15 06:34:14,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 06:34:13" (2/3) ... [2022-04-15 06:34:14,967 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7953b912 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 06:34:14, skipping insertion in model container [2022-04-15 06:34:14,967 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 06:34:14" (3/3) ... [2022-04-15 06:34:14,968 INFO L111 eAbstractionObserver]: Analyzing ICFG discover_list.c [2022-04-15 06:34:14,972 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-15 06:34:14,972 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 06:34:15,007 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 06:34:15,013 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 06:34:15,014 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 06:34:15,034 INFO L276 IsEmpty]: Start isEmpty. Operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-15 06:34:15,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-15 06:34:15,041 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:15,042 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:15,042 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:15,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:15,050 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 1 times [2022-04-15 06:34:15,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:15,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2129198104] [2022-04-15 06:34:15,067 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:15,067 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 2 times [2022-04-15 06:34:15,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:15,070 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090986007] [2022-04-15 06:34:15,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:15,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:15,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:15,427 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:15,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:15,489 INFO L290 TraceCheckUtils]: 0: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-15 06:34:15,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-15 06:34:15,489 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-15 06:34:15,494 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:15,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:15,509 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-15 06:34:15,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-15 06:34:15,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-15 06:34:15,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-15 06:34:15,510 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-15 06:34:15,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:15,532 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-15 06:34:15,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-15 06:34:15,533 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-15 06:34:15,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-15 06:34:15,534 INFO L272 TraceCheckUtils]: 0: Hoare triple {94#true} call ULTIMATE.init(); {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:15,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-15 06:34:15,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-15 06:34:15,535 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-15 06:34:15,536 INFO L272 TraceCheckUtils]: 4: Hoare triple {94#true} call #t~ret187 := main(); {94#true} is VALID [2022-04-15 06:34:15,537 INFO L290 TraceCheckUtils]: 5: Hoare triple {94#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {94#true} is VALID [2022-04-15 06:34:15,537 INFO L272 TraceCheckUtils]: 6: Hoare triple {94#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {94#true} is VALID [2022-04-15 06:34:15,538 INFO L290 TraceCheckUtils]: 7: Hoare triple {94#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {94#true} is VALID [2022-04-15 06:34:15,538 INFO L290 TraceCheckUtils]: 8: Hoare triple {94#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {94#true} is VALID [2022-04-15 06:34:15,538 INFO L290 TraceCheckUtils]: 9: Hoare triple {94#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {94#true} is VALID [2022-04-15 06:34:15,540 INFO L290 TraceCheckUtils]: 10: Hoare triple {94#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-15 06:34:15,540 INFO L290 TraceCheckUtils]: 11: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-15 06:34:15,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} assume 1 == #t~mem153 && ~mnum_desc~0 > 40;havoc #t~mem153;~mnum_desc~0 := 40; {95#false} is VALID [2022-04-15 06:34:15,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {95#false} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {95#false} is VALID [2022-04-15 06:34:15,542 INFO L290 TraceCheckUtils]: 14: Hoare triple {95#false} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {95#false} is VALID [2022-04-15 06:34:15,542 INFO L290 TraceCheckUtils]: 15: Hoare triple {95#false} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {95#false} is VALID [2022-04-15 06:34:15,542 INFO L272 TraceCheckUtils]: 16: Hoare triple {95#false} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:15,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-15 06:34:15,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-15 06:34:15,543 INFO L290 TraceCheckUtils]: 19: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-15 06:34:15,544 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-15 06:34:15,544 INFO L290 TraceCheckUtils]: 21: Hoare triple {95#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {95#false} is VALID [2022-04-15 06:34:15,544 INFO L290 TraceCheckUtils]: 22: Hoare triple {95#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {95#false} is VALID [2022-04-15 06:34:15,544 INFO L290 TraceCheckUtils]: 23: Hoare triple {95#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {95#false} is VALID [2022-04-15 06:34:15,545 INFO L290 TraceCheckUtils]: 24: Hoare triple {95#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {95#false} is VALID [2022-04-15 06:34:15,545 INFO L290 TraceCheckUtils]: 25: Hoare triple {95#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {95#false} is VALID [2022-04-15 06:34:15,545 INFO L290 TraceCheckUtils]: 26: Hoare triple {95#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {95#false} is VALID [2022-04-15 06:34:15,546 INFO L290 TraceCheckUtils]: 27: Hoare triple {95#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {95#false} is VALID [2022-04-15 06:34:15,546 INFO L290 TraceCheckUtils]: 28: Hoare triple {95#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {95#false} is VALID [2022-04-15 06:34:15,547 INFO L290 TraceCheckUtils]: 29: Hoare triple {95#false} assume #t~short172; {95#false} is VALID [2022-04-15 06:34:15,548 INFO L290 TraceCheckUtils]: 30: Hoare triple {95#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {95#false} is VALID [2022-04-15 06:34:15,548 INFO L290 TraceCheckUtils]: 31: Hoare triple {95#false} assume 0 != #t~mem173;havoc #t~mem173; {95#false} is VALID [2022-04-15 06:34:15,549 INFO L272 TraceCheckUtils]: 32: Hoare triple {95#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {95#false} is VALID [2022-04-15 06:34:15,549 INFO L290 TraceCheckUtils]: 33: Hoare triple {95#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {95#false} is VALID [2022-04-15 06:34:15,549 INFO L290 TraceCheckUtils]: 34: Hoare triple {95#false} assume !(~len <= 0); {95#false} is VALID [2022-04-15 06:34:15,550 INFO L272 TraceCheckUtils]: 35: Hoare triple {95#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:15,552 INFO L290 TraceCheckUtils]: 36: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-15 06:34:15,555 INFO L290 TraceCheckUtils]: 37: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-15 06:34:15,557 INFO L290 TraceCheckUtils]: 38: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-15 06:34:15,558 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-15 06:34:15,558 INFO L290 TraceCheckUtils]: 40: Hoare triple {95#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {95#false} is VALID [2022-04-15 06:34:15,558 INFO L290 TraceCheckUtils]: 41: Hoare triple {95#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {95#false} is VALID [2022-04-15 06:34:15,558 INFO L272 TraceCheckUtils]: 42: Hoare triple {95#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {95#false} is VALID [2022-04-15 06:34:15,558 INFO L290 TraceCheckUtils]: 43: Hoare triple {95#false} ~cond := #in~cond; {95#false} is VALID [2022-04-15 06:34:15,559 INFO L290 TraceCheckUtils]: 44: Hoare triple {95#false} assume 0 == ~cond; {95#false} is VALID [2022-04-15 06:34:15,559 INFO L290 TraceCheckUtils]: 45: Hoare triple {95#false} assume !false; {95#false} is VALID [2022-04-15 06:34:15,559 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 06:34:15,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:15,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090986007] [2022-04-15 06:34:15,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2090986007] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:15,561 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:15,561 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 06:34:15,563 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:15,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2129198104] [2022-04-15 06:34:15,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2129198104] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:15,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:15,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 06:34:15,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654473048] [2022-04-15 06:34:15,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:15,572 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-15 06:34:15,574 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:15,577 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:15,641 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:15,642 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 06:34:15,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:15,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 06:34:15,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-15 06:34:15,673 INFO L87 Difference]: Start difference. First operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:16,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:16,814 INFO L93 Difference]: Finished difference Result 227 states and 347 transitions. [2022-04-15 06:34:16,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-15 06:34:16,815 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-15 06:34:16,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:16,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:16,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-15 06:34:16,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:16,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-15 06:34:16,843 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 347 transitions. [2022-04-15 06:34:17,200 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 347 edges. 347 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:17,214 INFO L225 Difference]: With dead ends: 227 [2022-04-15 06:34:17,215 INFO L226 Difference]: Without dead ends: 103 [2022-04-15 06:34:17,219 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-15 06:34:17,222 INFO L913 BasicCegarLoop]: 112 mSDtfsCounter, 202 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:17,224 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [207 Valid, 141 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:34:17,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-15 06:34:17,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 76. [2022-04-15 06:34:17,261 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:17,262 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:17,263 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:17,263 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:17,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:17,271 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-15 06:34:17,271 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-15 06:34:17,273 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:17,273 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:17,274 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-15 06:34:17,274 INFO L87 Difference]: Start difference. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-15 06:34:17,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:17,281 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-15 06:34:17,281 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-15 06:34:17,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:17,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:17,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:17,283 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:17,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:17,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 98 transitions. [2022-04-15 06:34:17,288 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 98 transitions. Word has length 46 [2022-04-15 06:34:17,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:17,288 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 98 transitions. [2022-04-15 06:34:17,288 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:17,289 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 98 transitions. [2022-04-15 06:34:17,394 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:17,395 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 98 transitions. [2022-04-15 06:34:17,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-15 06:34:17,399 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:17,400 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:17,400 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 06:34:17,400 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:17,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:17,401 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 1 times [2022-04-15 06:34:17,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:17,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1297258922] [2022-04-15 06:34:17,405 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:17,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 2 times [2022-04-15 06:34:17,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:17,405 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067536908] [2022-04-15 06:34:17,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:17,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:17,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:17,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:17,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:17,642 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-15 06:34:17,643 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-15 06:34:17,643 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-15 06:34:17,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:17,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:17,712 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:17,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:17,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:17,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {929#true} #672#return; {930#false} is VALID [2022-04-15 06:34:17,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-15 06:34:17,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:17,720 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-15 06:34:17,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {929#true} is VALID [2022-04-15 06:34:17,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-15 06:34:17,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-15 06:34:17,722 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:17,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-15 06:34:17,722 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-15 06:34:17,722 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-15 06:34:17,722 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-15 06:34:17,723 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-15 06:34:17,723 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-15 06:34:17,723 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-15 06:34:17,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-15 06:34:17,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:17,723 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-15 06:34:17,724 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:17,724 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-15 06:34:17,724 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:17,724 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-15 06:34:17,724 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-15 06:34:17,725 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:17,730 INFO L290 TraceCheckUtils]: 17: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:17,731 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:17,732 INFO L290 TraceCheckUtils]: 19: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:17,735 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {929#true} #672#return; {930#false} is VALID [2022-04-15 06:34:17,735 INFO L290 TraceCheckUtils]: 21: Hoare triple {930#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {930#false} is VALID [2022-04-15 06:34:17,735 INFO L290 TraceCheckUtils]: 22: Hoare triple {930#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {930#false} is VALID [2022-04-15 06:34:17,735 INFO L290 TraceCheckUtils]: 23: Hoare triple {930#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {930#false} is VALID [2022-04-15 06:34:17,735 INFO L290 TraceCheckUtils]: 24: Hoare triple {930#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 25: Hoare triple {930#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 26: Hoare triple {930#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 27: Hoare triple {930#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 28: Hoare triple {930#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 29: Hoare triple {930#false} assume #t~short172; {930#false} is VALID [2022-04-15 06:34:17,736 INFO L290 TraceCheckUtils]: 30: Hoare triple {930#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {930#false} is VALID [2022-04-15 06:34:17,737 INFO L290 TraceCheckUtils]: 31: Hoare triple {930#false} assume 0 != #t~mem173;havoc #t~mem173; {930#false} is VALID [2022-04-15 06:34:17,737 INFO L272 TraceCheckUtils]: 32: Hoare triple {930#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {930#false} is VALID [2022-04-15 06:34:17,737 INFO L290 TraceCheckUtils]: 33: Hoare triple {930#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {930#false} is VALID [2022-04-15 06:34:17,737 INFO L290 TraceCheckUtils]: 34: Hoare triple {930#false} assume !(~len <= 0); {930#false} is VALID [2022-04-15 06:34:17,737 INFO L272 TraceCheckUtils]: 35: Hoare triple {930#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:17,738 INFO L290 TraceCheckUtils]: 36: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-15 06:34:17,738 INFO L290 TraceCheckUtils]: 37: Hoare triple {929#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {929#true} is VALID [2022-04-15 06:34:17,738 INFO L290 TraceCheckUtils]: 38: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-15 06:34:17,738 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-15 06:34:17,738 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-15 06:34:17,738 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-15 06:34:17,739 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-15 06:34:17,739 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-15 06:34:17,739 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-15 06:34:17,739 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-15 06:34:17,740 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:17,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:17,740 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067536908] [2022-04-15 06:34:17,740 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1067536908] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:17,740 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1437773475] [2022-04-15 06:34:17,741 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:34:17,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:17,741 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:17,743 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:17,747 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 06:34:18,280 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:34:18,280 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:18,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 681 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-15 06:34:18,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:18,314 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:18,645 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {929#true} is VALID [2022-04-15 06:34:18,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-15 06:34:18,645 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-15 06:34:18,645 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-15 06:34:18,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-15 06:34:18,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-15 06:34:18,646 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-15 06:34:18,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-15 06:34:18,646 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-15 06:34:18,646 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-15 06:34:18,647 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-15 06:34:18,648 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {929#true} is VALID [2022-04-15 06:34:18,657 INFO L290 TraceCheckUtils]: 17: Hoare triple {929#true} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:18,658 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-15 06:34:18,658 INFO L290 TraceCheckUtils]: 19: Hoare triple {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-15 06:34:18,659 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} {929#true} #672#return; {930#false} is VALID [2022-04-15 06:34:18,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {930#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {930#false} is VALID [2022-04-15 06:34:18,660 INFO L290 TraceCheckUtils]: 22: Hoare triple {930#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {930#false} is VALID [2022-04-15 06:34:18,660 INFO L290 TraceCheckUtils]: 23: Hoare triple {930#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {930#false} is VALID [2022-04-15 06:34:18,660 INFO L290 TraceCheckUtils]: 24: Hoare triple {930#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {930#false} is VALID [2022-04-15 06:34:18,660 INFO L290 TraceCheckUtils]: 25: Hoare triple {930#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 26: Hoare triple {930#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 27: Hoare triple {930#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 28: Hoare triple {930#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 29: Hoare triple {930#false} assume #t~short172; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 30: Hoare triple {930#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {930#false} is VALID [2022-04-15 06:34:18,661 INFO L290 TraceCheckUtils]: 31: Hoare triple {930#false} assume 0 != #t~mem173;havoc #t~mem173; {930#false} is VALID [2022-04-15 06:34:18,661 INFO L272 TraceCheckUtils]: 32: Hoare triple {930#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {930#false} is VALID [2022-04-15 06:34:18,662 INFO L290 TraceCheckUtils]: 33: Hoare triple {930#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {930#false} is VALID [2022-04-15 06:34:18,662 INFO L290 TraceCheckUtils]: 34: Hoare triple {930#false} assume !(~len <= 0); {930#false} is VALID [2022-04-15 06:34:18,662 INFO L272 TraceCheckUtils]: 35: Hoare triple {930#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {930#false} is VALID [2022-04-15 06:34:18,662 INFO L290 TraceCheckUtils]: 36: Hoare triple {930#false} #t~loopctr188 := 0; {930#false} is VALID [2022-04-15 06:34:18,662 INFO L290 TraceCheckUtils]: 37: Hoare triple {930#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {930#false} is VALID [2022-04-15 06:34:18,662 INFO L290 TraceCheckUtils]: 38: Hoare triple {930#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {930#false} is VALID [2022-04-15 06:34:18,663 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {930#false} {930#false} #656#return; {930#false} is VALID [2022-04-15 06:34:18,663 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-15 06:34:18,663 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-15 06:34:18,663 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-15 06:34:18,663 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-15 06:34:18,663 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-15 06:34:18,663 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-15 06:34:18,664 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:34:18,664 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 06:34:18,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1437773475] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:18,664 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 06:34:18,664 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-04-15 06:34:18,665 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:18,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1297258922] [2022-04-15 06:34:18,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1297258922] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:18,666 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:18,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 06:34:18,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919740649] [2022-04-15 06:34:18,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:18,667 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-15 06:34:18,668 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:18,668 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:18,706 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:18,707 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 06:34:18,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:18,707 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 06:34:18,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-04-15 06:34:18,708 INFO L87 Difference]: Start difference. First operand 76 states and 98 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:18,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:18,929 INFO L93 Difference]: Finished difference Result 136 states and 178 transitions. [2022-04-15 06:34:18,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 06:34:18,930 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-15 06:34:18,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:18,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:18,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-15 06:34:18,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:18,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-15 06:34:18,941 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-15 06:34:19,069 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:19,074 INFO L225 Difference]: With dead ends: 136 [2022-04-15 06:34:19,074 INFO L226 Difference]: Without dead ends: 77 [2022-04-15 06:34:19,078 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 06:34:19,080 INFO L913 BasicCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 184 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:19,080 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2 Valid, 278 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 06:34:19,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-15 06:34:19,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-04-15 06:34:19,094 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:19,095 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:19,095 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:19,096 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:19,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:19,099 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-15 06:34:19,099 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-15 06:34:19,100 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:19,100 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:19,100 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-15 06:34:19,101 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-15 06:34:19,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:19,108 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-15 06:34:19,108 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-15 06:34:19,111 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:19,111 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:19,111 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:19,112 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:19,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:19,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2022-04-15 06:34:19,115 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 99 transitions. Word has length 46 [2022-04-15 06:34:19,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:19,115 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 99 transitions. [2022-04-15 06:34:19,115 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:19,115 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 77 states and 99 transitions. [2022-04-15 06:34:19,235 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:19,235 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-15 06:34:19,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-15 06:34:19,238 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:19,239 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:19,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:19,456 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:19,456 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:19,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:19,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 1 times [2022-04-15 06:34:19,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:19,457 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1590738699] [2022-04-15 06:34:19,457 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:19,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 2 times [2022-04-15 06:34:19,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:19,458 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601382220] [2022-04-15 06:34:19,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:19,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:19,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:19,609 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:19,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:19,624 INFO L290 TraceCheckUtils]: 0: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-15 06:34:19,625 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-15 06:34:19,625 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-15 06:34:19,628 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:19,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:19,740 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:19,741 INFO L290 TraceCheckUtils]: 1: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-15 06:34:19,742 INFO L290 TraceCheckUtils]: 2: Hoare triple {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:19,743 INFO L290 TraceCheckUtils]: 3: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:19,744 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-15 06:34:19,745 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-15 06:34:19,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:19,755 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-15 06:34:19,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-15 06:34:19,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-15 06:34:19,755 INFO L290 TraceCheckUtils]: 3: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-15 06:34:19,755 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-15 06:34:19,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:19,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-15 06:34:19,758 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-15 06:34:19,758 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-15 06:34:19,758 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-15 06:34:19,758 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-15 06:34:19,759 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-15 06:34:19,759 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-15 06:34:19,761 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-15 06:34:19,761 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:19,762 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-15 06:34:19,762 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:19,762 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-15 06:34:19,762 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:19,763 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-15 06:34:19,763 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-15 06:34:19,764 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:19,764 INFO L290 TraceCheckUtils]: 17: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:19,766 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-15 06:34:19,767 INFO L290 TraceCheckUtils]: 19: Hoare triple {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:19,767 INFO L290 TraceCheckUtils]: 20: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:19,768 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-15 06:34:19,768 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-15 06:34:19,769 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-15 06:34:19,769 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-15 06:34:19,769 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-15 06:34:19,770 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-15 06:34:19,770 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-15 06:34:19,770 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-15 06:34:19,771 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-15 06:34:19,772 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-15 06:34:19,772 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:19,772 INFO L290 TraceCheckUtils]: 37: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-15 06:34:19,772 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-15 06:34:19,772 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-15 06:34:19,772 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-15 06:34:19,773 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-15 06:34:19,773 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-15 06:34:19,773 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-15 06:34:19,773 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-15 06:34:19,773 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-15 06:34:19,774 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-15 06:34:19,774 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-15 06:34:19,774 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 06:34:19,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:19,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601382220] [2022-04-15 06:34:19,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [601382220] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:19,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1091271308] [2022-04-15 06:34:19,775 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:34:19,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:19,775 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:19,776 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:19,789 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 06:34:20,344 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:34:20,345 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:20,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 695 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-15 06:34:20,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:20,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:20,672 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-15 06:34:20,673 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,673 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-15 06:34:20,673 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-15 06:34:20,673 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-15 06:34:20,673 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-15 06:34:20,674 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-15 06:34:20,677 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-15 06:34:20,677 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-15 06:34:20,677 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,677 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-15 06:34:20,678 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,678 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-15 06:34:20,678 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,678 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-15 06:34:20,678 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-15 06:34:20,679 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1666#true} is VALID [2022-04-15 06:34:20,679 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:20,680 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:20,688 INFO L290 TraceCheckUtils]: 19: Hoare triple {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-15 06:34:20,688 INFO L290 TraceCheckUtils]: 20: Hoare triple {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-15 06:34:20,690 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} {1666#true} #672#return; {1667#false} is VALID [2022-04-15 06:34:20,690 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-15 06:34:20,690 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-15 06:34:20,690 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-15 06:34:20,690 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-15 06:34:20,691 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-15 06:34:20,692 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-15 06:34:20,692 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-15 06:34:20,694 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-15 06:34:20,694 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-15 06:34:20,694 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L290 TraceCheckUtils]: 37: Hoare triple {1667#false} #t~loopctr188 := 0; {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L290 TraceCheckUtils]: 38: Hoare triple {1667#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L290 TraceCheckUtils]: 39: Hoare triple {1667#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L290 TraceCheckUtils]: 40: Hoare triple {1667#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1667#false} {1667#false} #656#return; {1667#false} is VALID [2022-04-15 06:34:20,695 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-15 06:34:20,696 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:34:20,697 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:20,945 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-15 06:34:20,946 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 37: Hoare triple {1666#true} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-15 06:34:20,947 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1666#true} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-15 06:34:20,947 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-15 06:34:20,948 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-15 06:34:20,949 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-15 06:34:20,949 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-15 06:34:20,949 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-15 06:34:20,949 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-15 06:34:20,950 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1913#(not (= |#Ultimate.C_memset_#amount| 24))} {1666#true} #672#return; {1667#false} is VALID [2022-04-15 06:34:20,951 INFO L290 TraceCheckUtils]: 20: Hoare triple {1913#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1913#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:20,951 INFO L290 TraceCheckUtils]: 19: Hoare triple {1920#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1913#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:20,953 INFO L290 TraceCheckUtils]: 18: Hoare triple {1924#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1920#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1924#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:20,954 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1666#true} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-15 06:34:20,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-15 06:34:20,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-15 06:34:20,956 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 06:34:20,957 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1091271308] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:20,957 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:20,957 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-15 06:34:20,957 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:20,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1590738699] [2022-04-15 06:34:20,958 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1590738699] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:20,958 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:20,958 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-15 06:34:20,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466548759] [2022-04-15 06:34:20,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:20,958 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-15 06:34:20,959 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:20,959 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:21,005 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:21,006 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-15 06:34:21,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:21,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-15 06:34:21,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2022-04-15 06:34:21,007 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. Second operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:22,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:22,082 INFO L93 Difference]: Finished difference Result 142 states and 186 transitions. [2022-04-15 06:34:22,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 06:34:22,082 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-15 06:34:22,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:22,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:22,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-15 06:34:22,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:22,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-15 06:34:22,090 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 183 transitions. [2022-04-15 06:34:22,263 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:22,264 INFO L225 Difference]: With dead ends: 142 [2022-04-15 06:34:22,265 INFO L226 Difference]: Without dead ends: 82 [2022-04-15 06:34:22,265 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 95 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2022-04-15 06:34:22,266 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 333 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 333 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:22,266 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 333 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 06:34:22,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-04-15 06:34:22,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 78. [2022-04-15 06:34:22,287 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:22,288 INFO L82 GeneralOperation]: Start isEquivalent. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:22,288 INFO L74 IsIncluded]: Start isIncluded. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:22,289 INFO L87 Difference]: Start difference. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:22,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:22,292 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-15 06:34:22,292 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-15 06:34:22,292 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:22,292 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:22,293 INFO L74 IsIncluded]: Start isIncluded. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-15 06:34:22,293 INFO L87 Difference]: Start difference. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-15 06:34:22,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:22,296 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-15 06:34:22,296 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-15 06:34:22,296 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:22,297 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:22,297 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:22,297 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:22,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:22,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 100 transitions. [2022-04-15 06:34:22,300 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 100 transitions. Word has length 48 [2022-04-15 06:34:22,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:22,300 INFO L478 AbstractCegarLoop]: Abstraction has 78 states and 100 transitions. [2022-04-15 06:34:22,300 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:22,300 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 78 states and 100 transitions. [2022-04-15 06:34:22,413 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:22,413 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 100 transitions. [2022-04-15 06:34:22,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-15 06:34:22,414 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:22,414 INFO L499 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:22,438 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:22,620 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-15 06:34:22,620 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:22,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:22,621 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 3 times [2022-04-15 06:34:22,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:22,621 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1760085198] [2022-04-15 06:34:22,622 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:22,622 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 4 times [2022-04-15 06:34:22,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:22,622 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339867325] [2022-04-15 06:34:22,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:22,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:22,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:22,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:22,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:22,779 INFO L290 TraceCheckUtils]: 0: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:22,779 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-15 06:34:22,780 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-15 06:34:22,782 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:22,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:22,885 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:22,886 INFO L290 TraceCheckUtils]: 1: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:22,887 INFO L290 TraceCheckUtils]: 2: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:22,888 INFO L290 TraceCheckUtils]: 3: Hoare triple {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:22,888 INFO L290 TraceCheckUtils]: 4: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:22,889 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-15 06:34:22,889 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-04-15 06:34:22,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:22,900 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-15 06:34:22,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:22,900 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:22,900 INFO L290 TraceCheckUtils]: 3: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-15 06:34:22,900 INFO L290 TraceCheckUtils]: 4: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-15 06:34:22,901 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-15 06:34:22,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:22,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:22,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-15 06:34:22,902 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:22,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-15 06:34:22,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:22,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-15 06:34:22,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:22,904 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-15 06:34:22,904 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-15 06:34:22,905 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:22,905 INFO L290 TraceCheckUtils]: 17: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:22,906 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:22,907 INFO L290 TraceCheckUtils]: 19: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:22,908 INFO L290 TraceCheckUtils]: 20: Hoare triple {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:22,908 INFO L290 TraceCheckUtils]: 21: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:22,909 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-15 06:34:22,909 INFO L290 TraceCheckUtils]: 23: Hoare triple {2592#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 24: Hoare triple {2592#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 25: Hoare triple {2592#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 26: Hoare triple {2592#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 27: Hoare triple {2592#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 28: Hoare triple {2592#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 29: Hoare triple {2592#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 30: Hoare triple {2592#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2592#false} is VALID [2022-04-15 06:34:22,910 INFO L290 TraceCheckUtils]: 31: Hoare triple {2592#false} assume #t~short172; {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 32: Hoare triple {2592#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 33: Hoare triple {2592#false} assume 0 != #t~mem173;havoc #t~mem173; {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L272 TraceCheckUtils]: 34: Hoare triple {2592#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 35: Hoare triple {2592#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 36: Hoare triple {2592#false} assume !(~len <= 0); {2592#false} is VALID [2022-04-15 06:34:22,911 INFO L272 TraceCheckUtils]: 37: Hoare triple {2592#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 38: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-15 06:34:22,911 INFO L290 TraceCheckUtils]: 39: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 40: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 41: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 42: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-15 06:34:22,912 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-15 06:34:22,912 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-15 06:34:22,912 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-15 06:34:22,913 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-15 06:34:22,913 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-15 06:34:22,913 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 06:34:22,913 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:22,913 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339867325] [2022-04-15 06:34:22,914 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339867325] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:22,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [695189234] [2022-04-15 06:34:22,914 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:34:22,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:22,914 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:22,916 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:22,941 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 06:34:23,136 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:34:23,136 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:23,139 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-15 06:34:23,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:23,158 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:23,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-15 06:34:23,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-15 06:34:23,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-15 06:34:23,665 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-15 06:34:23,666 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,666 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-15 06:34:23,666 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-15 06:34:23,666 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2591#true} is VALID [2022-04-15 06:34:23,667 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 19: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-15 06:34:23,668 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-15 06:34:23,668 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-15 06:34:23,669 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,670 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-15 06:34:23,670 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-15 06:34:23,670 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-15 06:34:23,670 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-15 06:34:23,670 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-15 06:34:23,671 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:23,671 INFO L290 TraceCheckUtils]: 39: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:23,673 INFO L290 TraceCheckUtils]: 40: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2738#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:23,675 INFO L290 TraceCheckUtils]: 41: Hoare triple {2738#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} is VALID [2022-04-15 06:34:23,675 INFO L290 TraceCheckUtils]: 42: Hoare triple {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} is VALID [2022-04-15 06:34:23,676 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} {2591#true} #656#return; {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-15 06:34:23,677 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 06:34:23,678 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:23,962 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-15 06:34:23,963 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-15 06:34:23,963 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-15 06:34:23,963 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-15 06:34:23,963 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-15 06:34:23,963 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-15 06:34:23,965 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} {2591#true} #656#return; {2592#false} is VALID [2022-04-15 06:34:23,965 INFO L290 TraceCheckUtils]: 42: Hoare triple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:23,966 INFO L290 TraceCheckUtils]: 41: Hoare triple {2795#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:23,967 INFO L290 TraceCheckUtils]: 40: Hoare triple {2799#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2795#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:23,968 INFO L290 TraceCheckUtils]: 39: Hoare triple {2803#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2799#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:23,969 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2803#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:23,969 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-15 06:34:23,969 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-15 06:34:23,969 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-15 06:34:23,969 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-15 06:34:23,969 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-15 06:34:23,970 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-15 06:34:23,971 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:23,971 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-15 06:34:23,971 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-15 06:34:23,971 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-15 06:34:23,971 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-15 06:34:24,009 INFO L290 TraceCheckUtils]: 19: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 18: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:24,010 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-15 06:34:24,011 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-15 06:34:24,012 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-15 06:34:24,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-15 06:34:24,012 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-15 06:34:24,012 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 06:34:24,012 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [695189234] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:24,012 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:24,013 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2022-04-15 06:34:24,013 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:24,013 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1760085198] [2022-04-15 06:34:24,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1760085198] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:24,013 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:24,013 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-15 06:34:24,013 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847178985] [2022-04-15 06:34:24,013 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:24,014 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-15 06:34:24,014 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:24,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:24,059 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:24,060 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-15 06:34:24,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:24,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-15 06:34:24,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2022-04-15 06:34:24,061 INFO L87 Difference]: Start difference. First operand 78 states and 100 transitions. Second operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:25,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:25,166 INFO L93 Difference]: Finished difference Result 144 states and 188 transitions. [2022-04-15 06:34:25,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 06:34:25,167 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-15 06:34:25,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:25,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:25,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-15 06:34:25,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:25,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-15 06:34:25,173 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 184 transitions. [2022-04-15 06:34:25,339 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:25,340 INFO L225 Difference]: With dead ends: 144 [2022-04-15 06:34:25,341 INFO L226 Difference]: Without dead ends: 83 [2022-04-15 06:34:25,341 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=283, Unknown=0, NotChecked=0, Total=380 [2022-04-15 06:34:25,344 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 336 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 336 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:25,344 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 336 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 06:34:25,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-15 06:34:25,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 79. [2022-04-15 06:34:25,363 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:25,364 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:25,364 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:25,365 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:25,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:25,368 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-15 06:34:25,369 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-15 06:34:25,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:25,369 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:25,370 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-15 06:34:25,370 INFO L87 Difference]: Start difference. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-15 06:34:25,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:25,373 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-15 06:34:25,374 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-15 06:34:25,374 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:25,374 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:25,374 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:25,374 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:25,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:25,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 101 transitions. [2022-04-15 06:34:25,378 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 101 transitions. Word has length 50 [2022-04-15 06:34:25,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:25,378 INFO L478 AbstractCegarLoop]: Abstraction has 79 states and 101 transitions. [2022-04-15 06:34:25,378 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:25,378 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 79 states and 101 transitions. [2022-04-15 06:34:25,488 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:25,488 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 101 transitions. [2022-04-15 06:34:25,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-15 06:34:25,489 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:25,489 INFO L499 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:25,507 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-15 06:34:25,689 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:25,690 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:25,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:25,690 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 5 times [2022-04-15 06:34:25,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:25,690 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1988378800] [2022-04-15 06:34:25,692 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:25,692 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 6 times [2022-04-15 06:34:25,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:25,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931449175] [2022-04-15 06:34:25,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:25,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:25,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:25,788 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:25,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:25,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-15 06:34:25,799 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-15 06:34:25,799 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-15 06:34:25,802 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:25,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:25,939 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:25,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:25,941 INFO L290 TraceCheckUtils]: 2: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:25,942 INFO L290 TraceCheckUtils]: 3: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:34:25,943 INFO L290 TraceCheckUtils]: 4: Hoare triple {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-15 06:34:25,943 INFO L290 TraceCheckUtils]: 5: Hoare triple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-15 06:34:25,944 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-15 06:34:25,945 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-15 06:34:25,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 3: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 4: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-15 06:34:25,953 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-15 06:34:25,954 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-15 06:34:25,954 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:25,954 INFO L290 TraceCheckUtils]: 1: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-15 06:34:25,955 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-15 06:34:25,956 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-15 06:34:25,959 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:25,961 INFO L290 TraceCheckUtils]: 17: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:25,963 INFO L290 TraceCheckUtils]: 18: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:25,964 INFO L290 TraceCheckUtils]: 19: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:25,965 INFO L290 TraceCheckUtils]: 20: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:34:25,966 INFO L290 TraceCheckUtils]: 21: Hoare triple {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-15 06:34:25,966 INFO L290 TraceCheckUtils]: 22: Hoare triple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-15 06:34:25,967 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-15 06:34:25,968 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-15 06:34:25,969 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 39: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 40: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 41: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,969 INFO L290 TraceCheckUtils]: 42: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 43: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 44: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-15 06:34:25,970 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-15 06:34:25,970 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-15 06:34:25,971 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 06:34:25,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:25,971 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931449175] [2022-04-15 06:34:25,971 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [931449175] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:25,971 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [326727822] [2022-04-15 06:34:25,971 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:34:25,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:25,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:25,973 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:26,001 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 06:34:27,236 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-15 06:34:27,237 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:27,242 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-15 06:34:27,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:27,265 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:27,798 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-15 06:34:27,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-15 06:34:27,799 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-15 06:34:27,800 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3543#true} is VALID [2022-04-15 06:34:27,800 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:27,801 INFO L290 TraceCheckUtils]: 18: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3626#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:27,802 INFO L290 TraceCheckUtils]: 19: Hoare triple {3626#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3630#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:27,804 INFO L290 TraceCheckUtils]: 20: Hoare triple {3630#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3634#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:27,806 INFO L290 TraceCheckUtils]: 21: Hoare triple {3634#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} is VALID [2022-04-15 06:34:27,806 INFO L290 TraceCheckUtils]: 22: Hoare triple {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} is VALID [2022-04-15 06:34:27,807 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} {3543#true} #672#return; {3544#false} is VALID [2022-04-15 06:34:27,807 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-15 06:34:27,808 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 39: Hoare triple {3544#false} #t~loopctr188 := 0; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 40: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 41: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 42: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 43: Hoare triple {3544#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3544#false} is VALID [2022-04-15 06:34:27,809 INFO L290 TraceCheckUtils]: 44: Hoare triple {3544#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3544#false} {3544#false} #656#return; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-15 06:34:27,810 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 06:34:27,811 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:28,156 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-15 06:34:28,156 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-15 06:34:28,156 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-15 06:34:28,156 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-15 06:34:28,156 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-15 06:34:28,156 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-15 06:34:28,157 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 44: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 43: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 42: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 41: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 40: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 39: Hoare triple {3543#true} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3543#true} is VALID [2022-04-15 06:34:28,157 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-15 06:34:28,158 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-15 06:34:28,159 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-15 06:34:28,159 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-15 06:34:28,159 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-15 06:34:28,159 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-15 06:34:28,160 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3816#(not (= |#Ultimate.C_memset_#amount| 24))} {3543#true} #672#return; {3544#false} is VALID [2022-04-15 06:34:28,160 INFO L290 TraceCheckUtils]: 22: Hoare triple {3816#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3816#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:28,161 INFO L290 TraceCheckUtils]: 21: Hoare triple {3823#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3816#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:28,163 INFO L290 TraceCheckUtils]: 20: Hoare triple {3827#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3823#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:28,164 INFO L290 TraceCheckUtils]: 19: Hoare triple {3831#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3827#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:28,165 INFO L290 TraceCheckUtils]: 18: Hoare triple {3835#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3831#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:28,166 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3835#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:28,166 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3543#true} is VALID [2022-04-15 06:34:28,166 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-15 06:34:28,166 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-15 06:34:28,166 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:28,166 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-15 06:34:28,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-15 06:34:28,168 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-15 06:34:28,168 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-15 06:34:28,168 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-15 06:34:28,168 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 06:34:28,168 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [326727822] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:28,168 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:28,168 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 18 [2022-04-15 06:34:28,169 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:28,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1988378800] [2022-04-15 06:34:28,171 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1988378800] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:28,171 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:28,171 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-15 06:34:28,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629549024] [2022-04-15 06:34:28,171 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:28,171 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-15 06:34:28,173 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:28,173 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:28,217 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:28,217 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-15 06:34:28,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:28,218 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-15 06:34:28,218 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2022-04-15 06:34:28,218 INFO L87 Difference]: Start difference. First operand 79 states and 101 transitions. Second operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:29,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:29,415 INFO L93 Difference]: Finished difference Result 146 states and 190 transitions. [2022-04-15 06:34:29,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 06:34:29,416 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-15 06:34:29,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:29,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:29,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-15 06:34:29,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:29,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-15 06:34:29,422 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 185 transitions. [2022-04-15 06:34:29,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:29,576 INFO L225 Difference]: With dead ends: 146 [2022-04-15 06:34:29,577 INFO L226 Difference]: Without dead ends: 84 [2022-04-15 06:34:29,577 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 99 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=416, Unknown=0, NotChecked=0, Total=552 [2022-04-15 06:34:29,578 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 422 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 422 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:29,578 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 422 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:34:29,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-15 06:34:29,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 80. [2022-04-15 06:34:29,606 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:29,607 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:29,607 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:29,608 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:29,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:29,611 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-15 06:34:29,611 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-15 06:34:29,611 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:29,611 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:29,612 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-15 06:34:29,612 INFO L87 Difference]: Start difference. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-15 06:34:29,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:29,615 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-15 06:34:29,615 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-15 06:34:29,615 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:29,615 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:29,615 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:29,615 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:29,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:29,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 102 transitions. [2022-04-15 06:34:29,618 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 102 transitions. Word has length 52 [2022-04-15 06:34:29,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:29,618 INFO L478 AbstractCegarLoop]: Abstraction has 80 states and 102 transitions. [2022-04-15 06:34:29,618 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:29,618 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 80 states and 102 transitions. [2022-04-15 06:34:29,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:29,716 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 102 transitions. [2022-04-15 06:34:29,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-15 06:34:29,717 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:29,717 INFO L499 BasicCegarLoop]: trace histogram [8, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:29,737 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:29,923 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:29,923 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:29,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:29,924 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 7 times [2022-04-15 06:34:29,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:29,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [63274417] [2022-04-15 06:34:29,924 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:29,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 8 times [2022-04-15 06:34:29,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:29,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731463967] [2022-04-15 06:34:29,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:29,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:29,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:29,998 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:30,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:30,007 INFO L290 TraceCheckUtils]: 0: Hoare triple {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:30,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-15 06:34:30,008 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-15 06:34:30,010 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:30,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:30,154 INFO L290 TraceCheckUtils]: 0: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:30,155 INFO L290 TraceCheckUtils]: 1: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:30,156 INFO L290 TraceCheckUtils]: 2: Hoare triple {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:30,157 INFO L290 TraceCheckUtils]: 3: Hoare triple {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,158 INFO L290 TraceCheckUtils]: 4: Hoare triple {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:30,159 INFO L290 TraceCheckUtils]: 5: Hoare triple {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,160 INFO L290 TraceCheckUtils]: 6: Hoare triple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,161 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4522#true} #672#return; {4523#false} is VALID [2022-04-15 06:34:30,161 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-04-15 06:34:30,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:30,173 INFO L290 TraceCheckUtils]: 0: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-15 06:34:30,173 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,173 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,173 INFO L290 TraceCheckUtils]: 3: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,174 INFO L290 TraceCheckUtils]: 4: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-15 06:34:30,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-15 06:34:30,174 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4522#true} {4523#false} #656#return; {4523#false} is VALID [2022-04-15 06:34:30,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-15 06:34:30,175 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-15 06:34:30,176 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-15 06:34:30,184 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4544#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:30,184 INFO L290 TraceCheckUtils]: 17: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:30,185 INFO L290 TraceCheckUtils]: 18: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:30,186 INFO L290 TraceCheckUtils]: 19: Hoare triple {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:30,187 INFO L290 TraceCheckUtils]: 20: Hoare triple {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,188 INFO L290 TraceCheckUtils]: 21: Hoare triple {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:30,189 INFO L290 TraceCheckUtils]: 22: Hoare triple {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,190 INFO L290 TraceCheckUtils]: 23: Hoare triple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:30,194 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4522#true} #672#return; {4523#false} is VALID [2022-04-15 06:34:30,195 INFO L290 TraceCheckUtils]: 25: Hoare triple {4523#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4523#false} is VALID [2022-04-15 06:34:30,195 INFO L290 TraceCheckUtils]: 26: Hoare triple {4523#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4523#false} is VALID [2022-04-15 06:34:30,203 INFO L290 TraceCheckUtils]: 27: Hoare triple {4523#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4523#false} is VALID [2022-04-15 06:34:30,203 INFO L290 TraceCheckUtils]: 28: Hoare triple {4523#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4523#false} is VALID [2022-04-15 06:34:30,203 INFO L290 TraceCheckUtils]: 29: Hoare triple {4523#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4523#false} is VALID [2022-04-15 06:34:30,203 INFO L290 TraceCheckUtils]: 30: Hoare triple {4523#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4523#false} is VALID [2022-04-15 06:34:30,203 INFO L290 TraceCheckUtils]: 31: Hoare triple {4523#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 32: Hoare triple {4523#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 33: Hoare triple {4523#false} assume #t~short172; {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 34: Hoare triple {4523#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 35: Hoare triple {4523#false} assume 0 != #t~mem173;havoc #t~mem173; {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L272 TraceCheckUtils]: 36: Hoare triple {4523#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 37: Hoare triple {4523#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L290 TraceCheckUtils]: 38: Hoare triple {4523#false} assume !(~len <= 0); {4523#false} is VALID [2022-04-15 06:34:30,204 INFO L272 TraceCheckUtils]: 39: Hoare triple {4523#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4544#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 40: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 41: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 42: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 43: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 44: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 45: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 46: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-15 06:34:30,205 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4522#true} {4523#false} #656#return; {4523#false} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-15 06:34:30,205 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-15 06:34:30,206 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-15 06:34:30,206 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-15 06:34:30,206 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-15 06:34:30,206 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-15 06:34:30,206 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-15 06:34:30,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:30,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731463967] [2022-04-15 06:34:30,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [731463967] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:30,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1327206948] [2022-04-15 06:34:30,207 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:34:30,207 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:30,207 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:30,215 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:30,216 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 06:34:30,865 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:34:30,865 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:30,869 INFO L263 TraceCheckSpWp]: Trace formula consists of 737 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 06:34:30,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:30,886 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:31,461 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4522#true} is VALID [2022-04-15 06:34:31,461 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,461 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,462 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-15 06:34:31,463 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4522#true} is VALID [2022-04-15 06:34:31,466 INFO L290 TraceCheckUtils]: 17: Hoare triple {4522#true} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:31,467 INFO L290 TraceCheckUtils]: 18: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:31,468 INFO L290 TraceCheckUtils]: 19: Hoare triple {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:31,468 INFO L290 TraceCheckUtils]: 20: Hoare triple {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 21: Hoare triple {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 22: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 23: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4522#true} {4522#true} #672#return; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 25: Hoare triple {4522#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 26: Hoare triple {4522#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 27: Hoare triple {4522#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 28: Hoare triple {4522#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 29: Hoare triple {4522#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 30: Hoare triple {4522#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 31: Hoare triple {4522#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4522#true} is VALID [2022-04-15 06:34:31,469 INFO L290 TraceCheckUtils]: 32: Hoare triple {4522#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L290 TraceCheckUtils]: 33: Hoare triple {4522#true} assume #t~short172; {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L290 TraceCheckUtils]: 34: Hoare triple {4522#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L290 TraceCheckUtils]: 35: Hoare triple {4522#true} assume 0 != #t~mem173;havoc #t~mem173; {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L272 TraceCheckUtils]: 36: Hoare triple {4522#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L290 TraceCheckUtils]: 37: Hoare triple {4522#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L290 TraceCheckUtils]: 38: Hoare triple {4522#true} assume !(~len <= 0); {4522#true} is VALID [2022-04-15 06:34:31,470 INFO L272 TraceCheckUtils]: 39: Hoare triple {4522#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4522#true} is VALID [2022-04-15 06:34:31,471 INFO L290 TraceCheckUtils]: 40: Hoare triple {4522#true} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:31,472 INFO L290 TraceCheckUtils]: 41: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:31,472 INFO L290 TraceCheckUtils]: 42: Hoare triple {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:31,473 INFO L290 TraceCheckUtils]: 43: Hoare triple {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:31,475 INFO L290 TraceCheckUtils]: 44: Hoare triple {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4689#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:31,476 INFO L290 TraceCheckUtils]: 45: Hoare triple {4689#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} is VALID [2022-04-15 06:34:31,477 INFO L290 TraceCheckUtils]: 46: Hoare triple {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} is VALID [2022-04-15 06:34:31,478 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} {4522#true} #656#return; {4523#false} is VALID [2022-04-15 06:34:31,478 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-15 06:34:31,478 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-15 06:34:31,478 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-15 06:34:31,479 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-15 06:34:31,479 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-15 06:34:31,479 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-15 06:34:31,479 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 36 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-15 06:34:31,479 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:31,883 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-15 06:34:31,883 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-15 06:34:31,883 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-15 06:34:31,883 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-15 06:34:31,883 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-15 06:34:31,883 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-15 06:34:31,884 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4739#(not (= |#Ultimate.C_memset_#amount| 80))} {4522#true} #656#return; {4523#false} is VALID [2022-04-15 06:34:31,884 INFO L290 TraceCheckUtils]: 46: Hoare triple {4739#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4739#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:31,885 INFO L290 TraceCheckUtils]: 45: Hoare triple {4746#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4739#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:31,886 INFO L290 TraceCheckUtils]: 44: Hoare triple {4750#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4746#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:31,887 INFO L290 TraceCheckUtils]: 43: Hoare triple {4754#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4750#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:31,888 INFO L290 TraceCheckUtils]: 42: Hoare triple {4758#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4754#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:31,889 INFO L290 TraceCheckUtils]: 41: Hoare triple {4762#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4758#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:31,889 INFO L290 TraceCheckUtils]: 40: Hoare triple {4522#true} #t~loopctr188 := 0; {4762#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:31,890 INFO L272 TraceCheckUtils]: 39: Hoare triple {4522#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 38: Hoare triple {4522#true} assume !(~len <= 0); {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 37: Hoare triple {4522#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L272 TraceCheckUtils]: 36: Hoare triple {4522#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 35: Hoare triple {4522#true} assume 0 != #t~mem173;havoc #t~mem173; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 34: Hoare triple {4522#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 33: Hoare triple {4522#true} assume #t~short172; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 32: Hoare triple {4522#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 31: Hoare triple {4522#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 30: Hoare triple {4522#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4522#true} is VALID [2022-04-15 06:34:31,890 INFO L290 TraceCheckUtils]: 29: Hoare triple {4522#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 28: Hoare triple {4522#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 27: Hoare triple {4522#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 26: Hoare triple {4522#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 25: Hoare triple {4522#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4522#true} {4522#true} #672#return; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 23: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 22: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 21: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:31,891 INFO L290 TraceCheckUtils]: 20: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 19: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 18: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 17: Hoare triple {4522#true} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-15 06:34:31,892 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-15 06:34:31,893 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-15 06:34:31,894 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4522#true} is VALID [2022-04-15 06:34:31,894 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-15 06:34:31,894 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1327206948] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:31,894 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:31,894 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 21 [2022-04-15 06:34:31,894 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:31,895 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [63274417] [2022-04-15 06:34:31,895 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [63274417] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:31,895 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:31,895 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-15 06:34:31,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979640575] [2022-04-15 06:34:31,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:31,896 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-15 06:34:31,896 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:31,896 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:31,947 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:31,948 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 06:34:31,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:31,948 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 06:34:31,948 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=311, Unknown=0, NotChecked=0, Total=420 [2022-04-15 06:34:31,949 INFO L87 Difference]: Start difference. First operand 80 states and 102 transitions. Second operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:33,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:33,457 INFO L93 Difference]: Finished difference Result 148 states and 192 transitions. [2022-04-15 06:34:33,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 06:34:33,457 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-15 06:34:33,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:33,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:33,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-15 06:34:33,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:33,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-15 06:34:33,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 186 transitions. [2022-04-15 06:34:33,629 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:33,630 INFO L225 Difference]: With dead ends: 148 [2022-04-15 06:34:33,630 INFO L226 Difference]: Without dead ends: 85 [2022-04-15 06:34:33,631 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=181, Invalid=575, Unknown=0, NotChecked=0, Total=756 [2022-04-15 06:34:33,632 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 587 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 626 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 587 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:33,632 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 626 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 587 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 06:34:33,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-15 06:34:33,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 81. [2022-04-15 06:34:33,654 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:33,654 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:33,654 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:33,655 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:33,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:33,674 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-15 06:34:33,674 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-15 06:34:33,674 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:33,674 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:33,675 INFO L74 IsIncluded]: Start isIncluded. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-15 06:34:33,675 INFO L87 Difference]: Start difference. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-15 06:34:33,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:33,678 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-15 06:34:33,678 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-15 06:34:33,678 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:33,678 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:33,678 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:33,678 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:33,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:33,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 103 transitions. [2022-04-15 06:34:33,681 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 103 transitions. Word has length 54 [2022-04-15 06:34:33,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:33,681 INFO L478 AbstractCegarLoop]: Abstraction has 81 states and 103 transitions. [2022-04-15 06:34:33,681 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:33,682 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 81 states and 103 transitions. [2022-04-15 06:34:33,790 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:33,790 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 103 transitions. [2022-04-15 06:34:33,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-15 06:34:33,790 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:33,790 INFO L499 BasicCegarLoop]: trace histogram [10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:33,809 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-15 06:34:33,995 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:33,995 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:33,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:33,996 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 9 times [2022-04-15 06:34:33,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:33,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [188235747] [2022-04-15 06:34:33,996 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:33,996 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 10 times [2022-04-15 06:34:33,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:33,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434093045] [2022-04-15 06:34:33,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:33,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:34,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:34,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:34,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:34,126 INFO L290 TraceCheckUtils]: 0: Hoare triple {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-15 06:34:34,126 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-15 06:34:34,128 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:34,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:34,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:34,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:34,306 INFO L290 TraceCheckUtils]: 3: Hoare triple {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:34,307 INFO L290 TraceCheckUtils]: 4: Hoare triple {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,307 INFO L290 TraceCheckUtils]: 5: Hoare triple {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:34,308 INFO L290 TraceCheckUtils]: 6: Hoare triple {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-15 06:34:34,309 INFO L290 TraceCheckUtils]: 7: Hoare triple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-15 06:34:34,309 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5528#true} #672#return; {5529#false} is VALID [2022-04-15 06:34:34,310 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-15 06:34:34,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:34,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-15 06:34:34,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 3: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 4: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 6: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-15 06:34:34,323 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-15 06:34:34,324 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:34,324 INFO L290 TraceCheckUtils]: 1: Hoare triple {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-15 06:34:34,324 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-15 06:34:34,324 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,325 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-15 06:34:34,326 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-15 06:34:34,326 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5552#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:34,327 INFO L290 TraceCheckUtils]: 17: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:34,328 INFO L290 TraceCheckUtils]: 18: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,329 INFO L290 TraceCheckUtils]: 19: Hoare triple {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:34,330 INFO L290 TraceCheckUtils]: 20: Hoare triple {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:34,331 INFO L290 TraceCheckUtils]: 21: Hoare triple {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,332 INFO L290 TraceCheckUtils]: 22: Hoare triple {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:34,333 INFO L290 TraceCheckUtils]: 23: Hoare triple {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-15 06:34:34,333 INFO L290 TraceCheckUtils]: 24: Hoare triple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-15 06:34:34,334 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5528#true} #672#return; {5529#false} is VALID [2022-04-15 06:34:34,334 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-15 06:34:34,335 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-15 06:34:34,336 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-15 06:34:34,336 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5552#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 41: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 42: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 43: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 44: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,336 INFO L290 TraceCheckUtils]: 45: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 46: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 47: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 48: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-15 06:34:34,337 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-15 06:34:34,337 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-15 06:34:34,338 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-15 06:34:34,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:34,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434093045] [2022-04-15 06:34:34,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434093045] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:34,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1117736121] [2022-04-15 06:34:34,338 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:34:34,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:34,339 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:34,343 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:34,364 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 06:34:34,574 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:34:34,574 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:34,577 INFO L263 TraceCheckSpWp]: Trace formula consists of 751 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-15 06:34:34,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:34,593 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:34,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5528#true} is VALID [2022-04-15 06:34:34,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-15 06:34:34,917 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-15 06:34:34,917 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-15 06:34:34,917 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-15 06:34:34,918 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5528#true} is VALID [2022-04-15 06:34:34,919 INFO L290 TraceCheckUtils]: 17: Hoare triple {5528#true} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:34,920 INFO L290 TraceCheckUtils]: 18: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5617#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,920 INFO L290 TraceCheckUtils]: 19: Hoare triple {5617#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5621#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:34,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {5621#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5625#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:34,922 INFO L290 TraceCheckUtils]: 21: Hoare triple {5625#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5629#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:34,922 INFO L290 TraceCheckUtils]: 22: Hoare triple {5629#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5633#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:34,923 INFO L290 TraceCheckUtils]: 23: Hoare triple {5633#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:34:34,923 INFO L290 TraceCheckUtils]: 24: Hoare triple {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:34:34,924 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {5528#true} #672#return; {5529#false} is VALID [2022-04-15 06:34:34,924 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-15 06:34:34,925 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 41: Hoare triple {5529#false} #t~loopctr188 := 0; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 42: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 43: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 44: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 45: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 46: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 47: Hoare triple {5529#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 48: Hoare triple {5529#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5529#false} {5529#false} #656#return; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-15 06:34:34,926 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-15 06:34:34,927 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-15 06:34:34,927 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 39 proven. 15 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 06:34:34,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 48: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-15 06:34:35,309 INFO L290 TraceCheckUtils]: 47: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 46: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 45: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 44: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 43: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 42: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 41: Hoare triple {5528#true} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5528#true} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-15 06:34:35,310 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-15 06:34:35,311 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-15 06:34:35,312 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-15 06:34:35,312 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-15 06:34:35,312 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-15 06:34:35,314 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5827#(not (= |#Ultimate.C_memset_#amount| 24))} {5528#true} #672#return; {5529#false} is VALID [2022-04-15 06:34:35,315 INFO L290 TraceCheckUtils]: 24: Hoare triple {5827#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5827#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:35,315 INFO L290 TraceCheckUtils]: 23: Hoare triple {5834#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5827#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:35,316 INFO L290 TraceCheckUtils]: 22: Hoare triple {5838#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5834#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:35,317 INFO L290 TraceCheckUtils]: 21: Hoare triple {5842#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5838#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:35,318 INFO L290 TraceCheckUtils]: 20: Hoare triple {5846#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5842#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:35,319 INFO L290 TraceCheckUtils]: 19: Hoare triple {5850#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5846#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:35,320 INFO L290 TraceCheckUtils]: 18: Hoare triple {5854#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5850#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:34:35,320 INFO L290 TraceCheckUtils]: 17: Hoare triple {5528#true} #t~loopctr188 := 0; {5854#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:35,320 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-15 06:34:35,321 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-15 06:34:35,322 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5528#true} is VALID [2022-04-15 06:34:35,323 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-15 06:34:35,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1117736121] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:35,323 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:35,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 24 [2022-04-15 06:34:35,326 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:35,326 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [188235747] [2022-04-15 06:34:35,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [188235747] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:35,326 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:35,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-15 06:34:35,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911082634] [2022-04-15 06:34:35,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:35,327 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-15 06:34:35,327 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:35,327 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:35,382 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:35,383 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-15 06:34:35,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:35,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-15 06:34:35,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=413, Unknown=0, NotChecked=0, Total=552 [2022-04-15 06:34:35,384 INFO L87 Difference]: Start difference. First operand 81 states and 103 transitions. Second operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:36,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:36,731 INFO L93 Difference]: Finished difference Result 150 states and 194 transitions. [2022-04-15 06:34:36,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 06:34:36,732 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-15 06:34:36,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:36,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:36,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-15 06:34:36,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:36,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-15 06:34:36,739 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 187 transitions. [2022-04-15 06:34:36,896 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 187 edges. 187 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:36,897 INFO L225 Difference]: With dead ends: 150 [2022-04-15 06:34:36,897 INFO L226 Difference]: Without dead ends: 86 [2022-04-15 06:34:36,898 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 103 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=230, Invalid=762, Unknown=0, NotChecked=0, Total=992 [2022-04-15 06:34:36,899 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 487 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:36,899 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 487 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 446 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:34:36,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-04-15 06:34:36,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 82. [2022-04-15 06:34:36,922 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:36,922 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:36,923 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:36,923 INFO L87 Difference]: Start difference. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:36,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:36,925 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-15 06:34:36,925 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-15 06:34:36,926 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:36,926 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:36,926 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-15 06:34:36,927 INFO L87 Difference]: Start difference. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-15 06:34:36,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:36,929 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-15 06:34:36,929 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-15 06:34:36,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:36,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:36,929 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:36,929 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:36,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:36,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 104 transitions. [2022-04-15 06:34:36,931 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 104 transitions. Word has length 56 [2022-04-15 06:34:36,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:36,931 INFO L478 AbstractCegarLoop]: Abstraction has 82 states and 104 transitions. [2022-04-15 06:34:36,931 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:36,931 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 82 states and 104 transitions. [2022-04-15 06:34:37,042 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:37,042 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 104 transitions. [2022-04-15 06:34:37,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-15 06:34:37,043 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:37,043 INFO L499 BasicCegarLoop]: trace histogram [12, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:37,061 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:37,247 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:37,248 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:37,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:37,248 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 11 times [2022-04-15 06:34:37,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:37,248 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [510402475] [2022-04-15 06:34:37,249 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:37,249 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 12 times [2022-04-15 06:34:37,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:37,249 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159478387] [2022-04-15 06:34:37,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:37,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:37,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,322 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:37,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,331 INFO L290 TraceCheckUtils]: 0: Hoare triple {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:37,331 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-15 06:34:37,331 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-15 06:34:37,334 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:37,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,517 INFO L290 TraceCheckUtils]: 0: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:37,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:37,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:37,520 INFO L290 TraceCheckUtils]: 3: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,521 INFO L290 TraceCheckUtils]: 4: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:37,521 INFO L290 TraceCheckUtils]: 5: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:37,522 INFO L290 TraceCheckUtils]: 6: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-15 06:34:37,523 INFO L290 TraceCheckUtils]: 7: Hoare triple {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,524 INFO L290 TraceCheckUtils]: 8: Hoare triple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,525 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {6561#true} #672#return; {6562#false} is VALID [2022-04-15 06:34:37,525 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-04-15 06:34:37,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:37,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 3: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 4: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-15 06:34:37,541 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6561#true} {6562#false} #656#return; {6562#false} is VALID [2022-04-15 06:34:37,542 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:37,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:37,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-15 06:34:37,543 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:37,544 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-15 06:34:37,544 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:37,544 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-15 06:34:37,544 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-15 06:34:37,545 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:37,545 INFO L290 TraceCheckUtils]: 17: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:37,547 INFO L290 TraceCheckUtils]: 18: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:37,548 INFO L290 TraceCheckUtils]: 19: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:37,549 INFO L290 TraceCheckUtils]: 20: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,550 INFO L290 TraceCheckUtils]: 21: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:37,551 INFO L290 TraceCheckUtils]: 22: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:37,552 INFO L290 TraceCheckUtils]: 23: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-15 06:34:37,553 INFO L290 TraceCheckUtils]: 24: Hoare triple {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:37,555 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {6561#true} #672#return; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {6562#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 28: Hoare triple {6562#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {6562#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 30: Hoare triple {6562#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 31: Hoare triple {6562#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 32: Hoare triple {6562#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6562#false} is VALID [2022-04-15 06:34:37,555 INFO L290 TraceCheckUtils]: 33: Hoare triple {6562#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 34: Hoare triple {6562#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 35: Hoare triple {6562#false} assume #t~short172; {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 36: Hoare triple {6562#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 37: Hoare triple {6562#false} assume 0 != #t~mem173;havoc #t~mem173; {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L272 TraceCheckUtils]: 38: Hoare triple {6562#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 39: Hoare triple {6562#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 40: Hoare triple {6562#false} assume !(~len <= 0); {6562#false} is VALID [2022-04-15 06:34:37,556 INFO L272 TraceCheckUtils]: 41: Hoare triple {6562#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 42: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-15 06:34:37,556 INFO L290 TraceCheckUtils]: 43: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 44: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 45: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 46: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 47: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 48: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 49: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 50: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-15 06:34:37,557 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6561#true} {6562#false} #656#return; {6562#false} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-15 06:34:37,557 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-15 06:34:37,558 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-15 06:34:37,558 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-15 06:34:37,558 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-15 06:34:37,558 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-15 06:34:37,558 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 06:34:37,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:37,558 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159478387] [2022-04-15 06:34:37,558 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [159478387] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:37,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078211743] [2022-04-15 06:34:37,559 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:34:37,559 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:37,559 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:37,560 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:37,561 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 06:34:41,256 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-15 06:34:41,257 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:41,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 06:34:41,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:41,280 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:41,646 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-15 06:34:41,647 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-15 06:34:41,648 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 17: Hoare triple {6561#true} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 18: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 19: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 20: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 21: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 22: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 23: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 24: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-15 06:34:41,649 INFO L290 TraceCheckUtils]: 25: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6561#true} {6561#true} #672#return; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 27: Hoare triple {6561#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 28: Hoare triple {6561#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 29: Hoare triple {6561#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 30: Hoare triple {6561#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 31: Hoare triple {6561#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 32: Hoare triple {6561#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 33: Hoare triple {6561#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 34: Hoare triple {6561#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 35: Hoare triple {6561#true} assume #t~short172; {6561#true} is VALID [2022-04-15 06:34:41,650 INFO L290 TraceCheckUtils]: 36: Hoare triple {6561#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:41,651 INFO L290 TraceCheckUtils]: 37: Hoare triple {6561#true} assume 0 != #t~mem173;havoc #t~mem173; {6561#true} is VALID [2022-04-15 06:34:41,651 INFO L272 TraceCheckUtils]: 38: Hoare triple {6561#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6561#true} is VALID [2022-04-15 06:34:41,651 INFO L290 TraceCheckUtils]: 39: Hoare triple {6561#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6716#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-15 06:34:41,651 INFO L290 TraceCheckUtils]: 40: Hoare triple {6716#(= |dStrHex_~#buff~0.offset| 0)} assume !(~len <= 0); {6716#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-15 06:34:41,651 INFO L272 TraceCheckUtils]: 41: Hoare triple {6716#(= |dStrHex_~#buff~0.offset| 0)} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6561#true} is VALID [2022-04-15 06:34:41,652 INFO L290 TraceCheckUtils]: 42: Hoare triple {6561#true} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:41,653 INFO L290 TraceCheckUtils]: 43: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:41,654 INFO L290 TraceCheckUtils]: 44: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:41,655 INFO L290 TraceCheckUtils]: 45: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:41,655 INFO L290 TraceCheckUtils]: 46: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:41,656 INFO L290 TraceCheckUtils]: 47: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:41,657 INFO L290 TraceCheckUtils]: 48: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:41,658 INFO L290 TraceCheckUtils]: 49: Hoare triple {6744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} is VALID [2022-04-15 06:34:41,659 INFO L290 TraceCheckUtils]: 50: Hoare triple {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} is VALID [2022-04-15 06:34:41,660 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} {6716#(= |dStrHex_~#buff~0.offset| 0)} #656#return; {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-15 06:34:41,660 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 06:34:41,660 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:42,072 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-15 06:34:42,072 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-15 06:34:42,073 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-15 06:34:42,073 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-15 06:34:42,073 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-15 06:34:42,073 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-15 06:34:42,074 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6794#(not (= |#Ultimate.C_memset_#amount| 80))} {6561#true} #656#return; {6562#false} is VALID [2022-04-15 06:34:42,074 INFO L290 TraceCheckUtils]: 50: Hoare triple {6794#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6794#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:42,075 INFO L290 TraceCheckUtils]: 49: Hoare triple {6801#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6794#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:42,077 INFO L290 TraceCheckUtils]: 48: Hoare triple {6805#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6801#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:42,078 INFO L290 TraceCheckUtils]: 47: Hoare triple {6809#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6805#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:42,079 INFO L290 TraceCheckUtils]: 46: Hoare triple {6813#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6809#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:42,080 INFO L290 TraceCheckUtils]: 45: Hoare triple {6817#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6813#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:42,082 INFO L290 TraceCheckUtils]: 44: Hoare triple {6821#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6817#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:42,083 INFO L290 TraceCheckUtils]: 43: Hoare triple {6825#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6821#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:42,083 INFO L290 TraceCheckUtils]: 42: Hoare triple {6561#true} #t~loopctr188 := 0; {6825#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:42,083 INFO L272 TraceCheckUtils]: 41: Hoare triple {6561#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 40: Hoare triple {6561#true} assume !(~len <= 0); {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 39: Hoare triple {6561#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L272 TraceCheckUtils]: 38: Hoare triple {6561#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 37: Hoare triple {6561#true} assume 0 != #t~mem173;havoc #t~mem173; {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 36: Hoare triple {6561#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 35: Hoare triple {6561#true} assume #t~short172; {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 34: Hoare triple {6561#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 33: Hoare triple {6561#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6561#true} is VALID [2022-04-15 06:34:42,084 INFO L290 TraceCheckUtils]: 32: Hoare triple {6561#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 31: Hoare triple {6561#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 30: Hoare triple {6561#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 29: Hoare triple {6561#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 28: Hoare triple {6561#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 27: Hoare triple {6561#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6561#true} {6561#true} #672#return; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 25: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 24: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-15 06:34:42,085 INFO L290 TraceCheckUtils]: 23: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 22: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 21: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 20: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 19: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 18: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 17: Hoare triple {6561#true} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-15 06:34:42,086 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-15 06:34:42,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-15 06:34:42,088 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-15 06:34:42,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-15 06:34:42,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6561#true} is VALID [2022-04-15 06:34:42,088 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 06:34:42,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078211743] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:42,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:42,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 23 [2022-04-15 06:34:42,089 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:42,089 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [510402475] [2022-04-15 06:34:42,089 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [510402475] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:42,089 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:42,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2022-04-15 06:34:42,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580112729] [2022-04-15 06:34:42,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:42,090 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-15 06:34:42,090 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:42,090 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:42,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:42,133 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-15 06:34:42,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:42,134 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-15 06:34:42,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2022-04-15 06:34:42,134 INFO L87 Difference]: Start difference. First operand 82 states and 104 transitions. Second operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:43,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:43,794 INFO L93 Difference]: Finished difference Result 152 states and 196 transitions. [2022-04-15 06:34:43,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-15 06:34:43,795 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-15 06:34:43,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:43,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:43,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-15 06:34:43,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:43,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-15 06:34:43,805 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 188 transitions. [2022-04-15 06:34:43,983 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:43,985 INFO L225 Difference]: With dead ends: 152 [2022-04-15 06:34:43,985 INFO L226 Difference]: Without dead ends: 87 [2022-04-15 06:34:43,985 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=236, Invalid=756, Unknown=0, NotChecked=0, Total=992 [2022-04-15 06:34:43,986 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 615 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 658 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 615 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:43,986 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 658 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 615 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-15 06:34:43,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-15 06:34:44,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 83. [2022-04-15 06:34:44,008 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:44,008 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:44,008 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:44,009 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:44,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:44,011 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-15 06:34:44,011 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-15 06:34:44,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:44,012 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:44,012 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-15 06:34:44,012 INFO L87 Difference]: Start difference. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-15 06:34:44,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:44,015 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-15 06:34:44,015 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-15 06:34:44,015 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:44,015 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:44,015 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:44,015 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:44,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:44,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 105 transitions. [2022-04-15 06:34:44,018 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 105 transitions. Word has length 58 [2022-04-15 06:34:44,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:44,019 INFO L478 AbstractCegarLoop]: Abstraction has 83 states and 105 transitions. [2022-04-15 06:34:44,020 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:44,020 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 83 states and 105 transitions. [2022-04-15 06:34:44,120 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:44,120 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 105 transitions. [2022-04-15 06:34:44,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-15 06:34:44,121 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:44,121 INFO L499 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:44,128 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:44,323 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:44,323 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:44,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:44,324 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 13 times [2022-04-15 06:34:44,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:44,324 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [168060208] [2022-04-15 06:34:44,324 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:44,324 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 14 times [2022-04-15 06:34:44,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:44,324 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472174922] [2022-04-15 06:34:44,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:44,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:44,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:44,406 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:44,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:44,414 INFO L290 TraceCheckUtils]: 0: Hoare triple {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:44,414 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-15 06:34:44,414 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-15 06:34:44,417 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:44,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:44,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:44,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:44,667 INFO L290 TraceCheckUtils]: 2: Hoare triple {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:44,668 INFO L290 TraceCheckUtils]: 3: Hoare triple {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,671 INFO L290 TraceCheckUtils]: 4: Hoare triple {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:44,675 INFO L290 TraceCheckUtils]: 5: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:44,676 INFO L290 TraceCheckUtils]: 6: Hoare triple {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:44,677 INFO L290 TraceCheckUtils]: 7: Hoare triple {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:44,679 INFO L290 TraceCheckUtils]: 8: Hoare triple {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,679 INFO L290 TraceCheckUtils]: 9: Hoare triple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,680 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {7617#true} #672#return; {7618#false} is VALID [2022-04-15 06:34:44,680 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-15 06:34:44,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:44,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-15 06:34:44,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,693 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 3: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 4: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 6: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-15 06:34:44,694 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7617#true} {7618#false} #656#return; {7618#false} is VALID [2022-04-15 06:34:44,695 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:44,695 INFO L290 TraceCheckUtils]: 1: Hoare triple {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:44,695 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:44,696 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-15 06:34:44,697 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:44,697 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-15 06:34:44,697 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-15 06:34:44,697 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7645#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:44,698 INFO L290 TraceCheckUtils]: 17: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:44,700 INFO L290 TraceCheckUtils]: 18: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:44,701 INFO L290 TraceCheckUtils]: 19: Hoare triple {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:44,702 INFO L290 TraceCheckUtils]: 20: Hoare triple {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,703 INFO L290 TraceCheckUtils]: 21: Hoare triple {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:44,704 INFO L290 TraceCheckUtils]: 22: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:44,705 INFO L290 TraceCheckUtils]: 23: Hoare triple {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:44,706 INFO L290 TraceCheckUtils]: 24: Hoare triple {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:34:44,708 INFO L290 TraceCheckUtils]: 25: Hoare triple {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,708 INFO L290 TraceCheckUtils]: 26: Hoare triple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:44,709 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {7617#true} #672#return; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 28: Hoare triple {7618#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 29: Hoare triple {7618#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 30: Hoare triple {7618#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 31: Hoare triple {7618#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 32: Hoare triple {7618#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 33: Hoare triple {7618#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 34: Hoare triple {7618#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 35: Hoare triple {7618#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 36: Hoare triple {7618#false} assume #t~short172; {7618#false} is VALID [2022-04-15 06:34:44,710 INFO L290 TraceCheckUtils]: 37: Hoare triple {7618#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7618#false} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 38: Hoare triple {7618#false} assume 0 != #t~mem173;havoc #t~mem173; {7618#false} is VALID [2022-04-15 06:34:44,711 INFO L272 TraceCheckUtils]: 39: Hoare triple {7618#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7618#false} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 40: Hoare triple {7618#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7618#false} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 41: Hoare triple {7618#false} assume !(~len <= 0); {7618#false} is VALID [2022-04-15 06:34:44,711 INFO L272 TraceCheckUtils]: 42: Hoare triple {7618#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7645#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 43: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 44: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 45: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,711 INFO L290 TraceCheckUtils]: 46: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 47: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 48: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 49: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 50: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 51: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 52: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-15 06:34:44,712 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7617#true} {7618#false} #656#return; {7618#false} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-15 06:34:44,712 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-15 06:34:44,712 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-15 06:34:44,713 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-15 06:34:44,713 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-15 06:34:44,713 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-15 06:34:44,713 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-15 06:34:44,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:44,713 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472174922] [2022-04-15 06:34:44,713 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472174922] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:44,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [801835638] [2022-04-15 06:34:44,714 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:34:44,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:44,714 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:44,715 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:44,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 06:34:45,250 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:34:45,250 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:45,255 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-15 06:34:45,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:45,272 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:45,911 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7617#true} is VALID [2022-04-15 06:34:45,911 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,911 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-15 06:34:45,912 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,913 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-15 06:34:45,913 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,913 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-15 06:34:45,913 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-15 06:34:45,913 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7617#true} is VALID [2022-04-15 06:34:45,914 INFO L290 TraceCheckUtils]: 17: Hoare triple {7617#true} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:45,915 INFO L290 TraceCheckUtils]: 18: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:45,916 INFO L290 TraceCheckUtils]: 19: Hoare triple {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:45,917 INFO L290 TraceCheckUtils]: 20: Hoare triple {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:45,918 INFO L290 TraceCheckUtils]: 21: Hoare triple {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:45,919 INFO L290 TraceCheckUtils]: 22: Hoare triple {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:45,920 INFO L290 TraceCheckUtils]: 23: Hoare triple {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7732#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:45,920 INFO L290 TraceCheckUtils]: 24: Hoare triple {7732#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:45,920 INFO L290 TraceCheckUtils]: 25: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-15 06:34:45,920 INFO L290 TraceCheckUtils]: 26: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-15 06:34:45,920 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7617#true} {7617#true} #672#return; {7617#true} is VALID [2022-04-15 06:34:45,920 INFO L290 TraceCheckUtils]: 28: Hoare triple {7617#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 29: Hoare triple {7617#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 30: Hoare triple {7617#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 31: Hoare triple {7617#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 32: Hoare triple {7617#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 33: Hoare triple {7617#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 34: Hoare triple {7617#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 35: Hoare triple {7617#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 36: Hoare triple {7617#true} assume #t~short172; {7617#true} is VALID [2022-04-15 06:34:45,921 INFO L290 TraceCheckUtils]: 37: Hoare triple {7617#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L290 TraceCheckUtils]: 38: Hoare triple {7617#true} assume 0 != #t~mem173;havoc #t~mem173; {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L272 TraceCheckUtils]: 39: Hoare triple {7617#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L290 TraceCheckUtils]: 40: Hoare triple {7617#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L290 TraceCheckUtils]: 41: Hoare triple {7617#true} assume !(~len <= 0); {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L272 TraceCheckUtils]: 42: Hoare triple {7617#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7617#true} is VALID [2022-04-15 06:34:45,922 INFO L290 TraceCheckUtils]: 43: Hoare triple {7617#true} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:45,923 INFO L290 TraceCheckUtils]: 44: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:45,924 INFO L290 TraceCheckUtils]: 45: Hoare triple {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:45,925 INFO L290 TraceCheckUtils]: 46: Hoare triple {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:45,926 INFO L290 TraceCheckUtils]: 47: Hoare triple {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:45,927 INFO L290 TraceCheckUtils]: 48: Hoare triple {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:45,929 INFO L290 TraceCheckUtils]: 49: Hoare triple {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7811#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:45,930 INFO L290 TraceCheckUtils]: 50: Hoare triple {7811#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:45,934 INFO L290 TraceCheckUtils]: 51: Hoare triple {7815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-15 06:34:45,935 INFO L290 TraceCheckUtils]: 52: Hoare triple {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-15 06:34:45,936 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} {7617#true} #656#return; {7618#false} is VALID [2022-04-15 06:34:45,936 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-15 06:34:45,936 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-15 06:34:45,936 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-15 06:34:45,936 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-15 06:34:45,937 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-15 06:34:45,937 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-15 06:34:45,937 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 11 proven. 105 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 06:34:45,937 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:46,564 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-15 06:34:46,564 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-15 06:34:46,564 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-15 06:34:46,564 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-15 06:34:46,564 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-15 06:34:46,564 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-15 06:34:46,565 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7865#(not (= |#Ultimate.C_memset_#amount| 80))} {7617#true} #656#return; {7618#false} is VALID [2022-04-15 06:34:46,565 INFO L290 TraceCheckUtils]: 52: Hoare triple {7865#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7865#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:46,566 INFO L290 TraceCheckUtils]: 51: Hoare triple {7872#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7865#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:46,567 INFO L290 TraceCheckUtils]: 50: Hoare triple {7876#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7872#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:46,568 INFO L290 TraceCheckUtils]: 49: Hoare triple {7880#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7876#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:46,570 INFO L290 TraceCheckUtils]: 48: Hoare triple {7884#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7880#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:46,571 INFO L290 TraceCheckUtils]: 47: Hoare triple {7888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7884#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:46,572 INFO L290 TraceCheckUtils]: 46: Hoare triple {7892#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:46,573 INFO L290 TraceCheckUtils]: 45: Hoare triple {7896#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7892#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:46,574 INFO L290 TraceCheckUtils]: 44: Hoare triple {7900#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7896#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 43: Hoare triple {7617#true} #t~loopctr188 := 0; {7900#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:46,575 INFO L272 TraceCheckUtils]: 42: Hoare triple {7617#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 41: Hoare triple {7617#true} assume !(~len <= 0); {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 40: Hoare triple {7617#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L272 TraceCheckUtils]: 39: Hoare triple {7617#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 38: Hoare triple {7617#true} assume 0 != #t~mem173;havoc #t~mem173; {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 37: Hoare triple {7617#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 36: Hoare triple {7617#true} assume #t~short172; {7617#true} is VALID [2022-04-15 06:34:46,575 INFO L290 TraceCheckUtils]: 35: Hoare triple {7617#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 34: Hoare triple {7617#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 33: Hoare triple {7617#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 32: Hoare triple {7617#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 31: Hoare triple {7617#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 30: Hoare triple {7617#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 29: Hoare triple {7617#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 28: Hoare triple {7617#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7617#true} {7617#true} #672#return; {7617#true} is VALID [2022-04-15 06:34:46,576 INFO L290 TraceCheckUtils]: 26: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 25: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 24: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 23: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 22: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 21: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 20: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 19: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 18: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L290 TraceCheckUtils]: 17: Hoare triple {7617#true} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-15 06:34:46,577 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-15 06:34:46,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-15 06:34:46,579 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7617#true} is VALID [2022-04-15 06:34:46,580 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 66 proven. 28 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-15 06:34:46,580 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [801835638] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:46,580 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:46,580 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 11] total 31 [2022-04-15 06:34:46,580 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:46,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [168060208] [2022-04-15 06:34:46,580 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [168060208] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:46,581 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:46,581 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-04-15 06:34:46,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681968967] [2022-04-15 06:34:46,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:46,581 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-15 06:34:46,582 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:46,582 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:46,630 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:46,630 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 06:34:46,630 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:46,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 06:34:46,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=700, Unknown=0, NotChecked=0, Total=930 [2022-04-15 06:34:46,631 INFO L87 Difference]: Start difference. First operand 83 states and 105 transitions. Second operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:48,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:48,344 INFO L93 Difference]: Finished difference Result 154 states and 198 transitions. [2022-04-15 06:34:48,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 06:34:48,345 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-15 06:34:48,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:48,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:48,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-15 06:34:48,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:48,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-15 06:34:48,350 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 189 transitions. [2022-04-15 06:34:48,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:48,507 INFO L225 Difference]: With dead ends: 154 [2022-04-15 06:34:48,507 INFO L226 Difference]: Without dead ends: 88 [2022-04-15 06:34:48,508 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=365, Invalid=1275, Unknown=0, NotChecked=0, Total=1640 [2022-04-15 06:34:48,509 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 632 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 677 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 632 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:48,509 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 677 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 632 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-15 06:34:48,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-15 06:34:48,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2022-04-15 06:34:48,536 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:48,537 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:48,539 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:48,539 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:48,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:48,542 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-15 06:34:48,542 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-15 06:34:48,543 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:48,543 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:48,543 INFO L74 IsIncluded]: Start isIncluded. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-15 06:34:48,544 INFO L87 Difference]: Start difference. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-15 06:34:48,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:48,546 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-15 06:34:48,546 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-15 06:34:48,546 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:48,546 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:48,546 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:48,546 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:48,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:48,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 106 transitions. [2022-04-15 06:34:48,550 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 106 transitions. Word has length 60 [2022-04-15 06:34:48,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:48,550 INFO L478 AbstractCegarLoop]: Abstraction has 84 states and 106 transitions. [2022-04-15 06:34:48,550 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:48,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 84 states and 106 transitions. [2022-04-15 06:34:48,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:48,662 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 106 transitions. [2022-04-15 06:34:48,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-04-15 06:34:48,665 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:48,665 INFO L499 BasicCegarLoop]: trace histogram [16, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:48,684 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:48,865 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-15 06:34:48,866 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:48,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:48,866 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 15 times [2022-04-15 06:34:48,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:48,866 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1553779071] [2022-04-15 06:34:48,867 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:48,867 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 16 times [2022-04-15 06:34:48,867 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:48,867 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3155113] [2022-04-15 06:34:48,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:48,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:48,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:48,984 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:48,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:48,992 INFO L290 TraceCheckUtils]: 0: Hoare triple {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:48,992 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-15 06:34:48,992 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-15 06:34:48,994 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:49,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:49,263 INFO L290 TraceCheckUtils]: 0: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:49,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:49,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:49,274 INFO L290 TraceCheckUtils]: 3: Hoare triple {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,275 INFO L290 TraceCheckUtils]: 4: Hoare triple {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:49,276 INFO L290 TraceCheckUtils]: 5: Hoare triple {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:49,277 INFO L290 TraceCheckUtils]: 6: Hoare triple {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:49,278 INFO L290 TraceCheckUtils]: 7: Hoare triple {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,280 INFO L290 TraceCheckUtils]: 8: Hoare triple {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} is VALID [2022-04-15 06:34:49,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,282 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {8705#true} #672#return; {8706#false} is VALID [2022-04-15 06:34:49,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2022-04-15 06:34:49,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 0: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 3: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 4: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,297 INFO L290 TraceCheckUtils]: 6: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,298 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-15 06:34:49,298 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-15 06:34:49,298 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8705#true} {8706#false} #656#return; {8706#false} is VALID [2022-04-15 06:34:49,299 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:49,299 INFO L290 TraceCheckUtils]: 1: Hoare triple {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:49,299 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-15 06:34:49,299 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-15 06:34:49,299 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-15 06:34:49,300 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-15 06:34:49,301 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8735#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:49,302 INFO L290 TraceCheckUtils]: 17: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:49,304 INFO L290 TraceCheckUtils]: 18: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:49,305 INFO L290 TraceCheckUtils]: 19: Hoare triple {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:49,306 INFO L290 TraceCheckUtils]: 20: Hoare triple {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,307 INFO L290 TraceCheckUtils]: 21: Hoare triple {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:49,309 INFO L290 TraceCheckUtils]: 22: Hoare triple {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:49,310 INFO L290 TraceCheckUtils]: 23: Hoare triple {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:49,311 INFO L290 TraceCheckUtils]: 24: Hoare triple {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,312 INFO L290 TraceCheckUtils]: 25: Hoare triple {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} is VALID [2022-04-15 06:34:49,314 INFO L290 TraceCheckUtils]: 26: Hoare triple {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,314 INFO L290 TraceCheckUtils]: 27: Hoare triple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:49,315 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {8705#true} #672#return; {8706#false} is VALID [2022-04-15 06:34:49,315 INFO L290 TraceCheckUtils]: 29: Hoare triple {8706#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8706#false} is VALID [2022-04-15 06:34:49,315 INFO L290 TraceCheckUtils]: 30: Hoare triple {8706#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8706#false} is VALID [2022-04-15 06:34:49,315 INFO L290 TraceCheckUtils]: 31: Hoare triple {8706#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 32: Hoare triple {8706#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 33: Hoare triple {8706#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 34: Hoare triple {8706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 35: Hoare triple {8706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 36: Hoare triple {8706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 37: Hoare triple {8706#false} assume #t~short172; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 38: Hoare triple {8706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 39: Hoare triple {8706#false} assume 0 != #t~mem173;havoc #t~mem173; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L272 TraceCheckUtils]: 40: Hoare triple {8706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 41: Hoare triple {8706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8706#false} is VALID [2022-04-15 06:34:49,316 INFO L290 TraceCheckUtils]: 42: Hoare triple {8706#false} assume !(~len <= 0); {8706#false} is VALID [2022-04-15 06:34:49,317 INFO L272 TraceCheckUtils]: 43: Hoare triple {8706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8735#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 44: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 45: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 46: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 47: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 48: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 49: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 50: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 51: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 52: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:49,317 INFO L290 TraceCheckUtils]: 53: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 54: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-15 06:34:49,318 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8705#true} {8706#false} #656#return; {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-15 06:34:49,318 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-15 06:34:49,319 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-15 06:34:49,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:49,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3155113] [2022-04-15 06:34:49,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [3155113] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:49,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [610077978] [2022-04-15 06:34:49,319 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:34:49,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:49,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:49,320 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:49,322 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 06:34:49,672 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:34:49,673 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:49,677 INFO L263 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-15 06:34:49,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:49,698 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:50,344 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-15 06:34:50,344 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-15 06:34:50,345 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8705#true} is VALID [2022-04-15 06:34:50,346 INFO L290 TraceCheckUtils]: 17: Hoare triple {8705#true} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:50,347 INFO L290 TraceCheckUtils]: 18: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,348 INFO L290 TraceCheckUtils]: 19: Hoare triple {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:50,349 INFO L290 TraceCheckUtils]: 20: Hoare triple {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:50,350 INFO L290 TraceCheckUtils]: 21: Hoare triple {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,351 INFO L290 TraceCheckUtils]: 22: Hoare triple {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:50,352 INFO L290 TraceCheckUtils]: 23: Hoare triple {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 24: Hoare triple {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 25: Hoare triple {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 26: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 27: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-15 06:34:50,353 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8705#true} {8705#true} #672#return; {8705#true} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 29: Hoare triple {8705#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8705#true} is VALID [2022-04-15 06:34:50,353 INFO L290 TraceCheckUtils]: 30: Hoare triple {8705#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 31: Hoare triple {8705#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 32: Hoare triple {8705#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 33: Hoare triple {8705#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 34: Hoare triple {8705#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 35: Hoare triple {8705#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 36: Hoare triple {8705#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 37: Hoare triple {8705#true} assume #t~short172; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 38: Hoare triple {8705#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 39: Hoare triple {8705#true} assume 0 != #t~mem173;havoc #t~mem173; {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L272 TraceCheckUtils]: 40: Hoare triple {8705#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8705#true} is VALID [2022-04-15 06:34:50,354 INFO L290 TraceCheckUtils]: 41: Hoare triple {8705#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8705#true} is VALID [2022-04-15 06:34:50,355 INFO L290 TraceCheckUtils]: 42: Hoare triple {8705#true} assume !(~len <= 0); {8705#true} is VALID [2022-04-15 06:34:50,355 INFO L272 TraceCheckUtils]: 43: Hoare triple {8705#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8705#true} is VALID [2022-04-15 06:34:50,355 INFO L290 TraceCheckUtils]: 44: Hoare triple {8705#true} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:50,356 INFO L290 TraceCheckUtils]: 45: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,357 INFO L290 TraceCheckUtils]: 46: Hoare triple {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:50,357 INFO L290 TraceCheckUtils]: 47: Hoare triple {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:50,358 INFO L290 TraceCheckUtils]: 48: Hoare triple {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,359 INFO L290 TraceCheckUtils]: 49: Hoare triple {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:50,360 INFO L290 TraceCheckUtils]: 50: Hoare triple {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:50,361 INFO L290 TraceCheckUtils]: 51: Hoare triple {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:50,362 INFO L290 TraceCheckUtils]: 52: Hoare triple {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8912#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:34:50,363 INFO L290 TraceCheckUtils]: 53: Hoare triple {8912#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} is VALID [2022-04-15 06:34:50,364 INFO L290 TraceCheckUtils]: 54: Hoare triple {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} is VALID [2022-04-15 06:34:50,364 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} {8705#true} #656#return; {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-15 06:34:50,365 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 11 proven. 136 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-15 06:34:50,365 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:51,235 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-15 06:34:51,235 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-15 06:34:51,235 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-15 06:34:51,235 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-15 06:34:51,235 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-15 06:34:51,236 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-15 06:34:51,236 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8962#(not (= |#Ultimate.C_memset_#amount| 80))} {8705#true} #656#return; {8706#false} is VALID [2022-04-15 06:34:51,237 INFO L290 TraceCheckUtils]: 54: Hoare triple {8962#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8962#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:51,237 INFO L290 TraceCheckUtils]: 53: Hoare triple {8969#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8962#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:34:51,239 INFO L290 TraceCheckUtils]: 52: Hoare triple {8973#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8969#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:51,240 INFO L290 TraceCheckUtils]: 51: Hoare triple {8977#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8973#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:51,241 INFO L290 TraceCheckUtils]: 50: Hoare triple {8981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8977#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:51,243 INFO L290 TraceCheckUtils]: 49: Hoare triple {8985#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:51,244 INFO L290 TraceCheckUtils]: 48: Hoare triple {8989#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8985#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:51,245 INFO L290 TraceCheckUtils]: 47: Hoare triple {8993#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8989#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:51,247 INFO L290 TraceCheckUtils]: 46: Hoare triple {8997#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8993#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:34:51,248 INFO L290 TraceCheckUtils]: 45: Hoare triple {9001#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8997#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:34:51,248 INFO L290 TraceCheckUtils]: 44: Hoare triple {8705#true} #t~loopctr188 := 0; {9001#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:51,249 INFO L272 TraceCheckUtils]: 43: Hoare triple {8705#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 42: Hoare triple {8705#true} assume !(~len <= 0); {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 41: Hoare triple {8705#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L272 TraceCheckUtils]: 40: Hoare triple {8705#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 39: Hoare triple {8705#true} assume 0 != #t~mem173;havoc #t~mem173; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 38: Hoare triple {8705#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 37: Hoare triple {8705#true} assume #t~short172; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 36: Hoare triple {8705#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 35: Hoare triple {8705#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 34: Hoare triple {8705#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 33: Hoare triple {8705#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 32: Hoare triple {8705#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 31: Hoare triple {8705#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8705#true} is VALID [2022-04-15 06:34:51,249 INFO L290 TraceCheckUtils]: 30: Hoare triple {8705#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 29: Hoare triple {8705#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8705#true} {8705#true} #672#return; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 27: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 26: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 25: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 24: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 23: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 22: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 21: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 20: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 19: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,250 INFO L290 TraceCheckUtils]: 18: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 17: Hoare triple {8705#true} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-15 06:34:51,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-15 06:34:51,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8705#true} is VALID [2022-04-15 06:34:51,253 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 83 proven. 36 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-15 06:34:51,253 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [610077978] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:51,253 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:51,253 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 12] total 33 [2022-04-15 06:34:51,254 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:51,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1553779071] [2022-04-15 06:34:51,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1553779071] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:51,254 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:51,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2022-04-15 06:34:51,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [681058572] [2022-04-15 06:34:51,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:51,254 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-15 06:34:51,255 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:51,255 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:51,317 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:51,317 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-15 06:34:51,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:51,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-15 06:34:51,318 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=261, Invalid=795, Unknown=0, NotChecked=0, Total=1056 [2022-04-15 06:34:51,318 INFO L87 Difference]: Start difference. First operand 84 states and 106 transitions. Second operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:52,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:52,817 INFO L93 Difference]: Finished difference Result 156 states and 200 transitions. [2022-04-15 06:34:52,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-15 06:34:52,817 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-15 06:34:52,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:52,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:52,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-15 06:34:52,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:52,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-15 06:34:52,821 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 190 transitions. [2022-04-15 06:34:53,034 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:53,036 INFO L225 Difference]: With dead ends: 156 [2022-04-15 06:34:53,036 INFO L226 Difference]: Without dead ends: 89 [2022-04-15 06:34:53,037 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=421, Invalid=1471, Unknown=0, NotChecked=0, Total=1892 [2022-04-15 06:34:53,037 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 420 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 420 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:53,037 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 420 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 06:34:53,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-04-15 06:34:53,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 85. [2022-04-15 06:34:53,061 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:53,062 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:53,062 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:53,062 INFO L87 Difference]: Start difference. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:53,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:53,064 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-15 06:34:53,064 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-15 06:34:53,064 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:53,064 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:53,065 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-15 06:34:53,065 INFO L87 Difference]: Start difference. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-15 06:34:53,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:53,067 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-15 06:34:53,067 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-15 06:34:53,067 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:53,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:53,067 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:53,067 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:53,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:53,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 107 transitions. [2022-04-15 06:34:53,069 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 107 transitions. Word has length 62 [2022-04-15 06:34:53,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:53,070 INFO L478 AbstractCegarLoop]: Abstraction has 85 states and 107 transitions. [2022-04-15 06:34:53,070 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:53,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 85 states and 107 transitions. [2022-04-15 06:34:53,183 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:53,183 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 107 transitions. [2022-04-15 06:34:53,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-15 06:34:53,184 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:53,184 INFO L499 BasicCegarLoop]: trace histogram [18, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:53,206 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:53,400 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-15 06:34:53,400 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:53,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:53,401 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 17 times [2022-04-15 06:34:53,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:53,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1161949751] [2022-04-15 06:34:53,401 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:53,401 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 18 times [2022-04-15 06:34:53,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:53,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572432252] [2022-04-15 06:34:53,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:53,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:34:53,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:53,491 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:34:53,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:53,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-15 06:34:53,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-15 06:34:53,502 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-15 06:34:53,504 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:34:53,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:53,840 INFO L290 TraceCheckUtils]: 0: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:53,842 INFO L290 TraceCheckUtils]: 1: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:53,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:53,845 INFO L290 TraceCheckUtils]: 3: Hoare triple {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:53,846 INFO L290 TraceCheckUtils]: 4: Hoare triple {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:53,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:53,849 INFO L290 TraceCheckUtils]: 6: Hoare triple {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:53,850 INFO L290 TraceCheckUtils]: 7: Hoare triple {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:53,852 INFO L290 TraceCheckUtils]: 8: Hoare triple {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:34:53,853 INFO L290 TraceCheckUtils]: 9: Hoare triple {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} is VALID [2022-04-15 06:34:53,855 INFO L290 TraceCheckUtils]: 10: Hoare triple {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-15 06:34:53,855 INFO L290 TraceCheckUtils]: 11: Hoare triple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-15 06:34:53,856 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} {9819#true} #672#return; {9820#false} is VALID [2022-04-15 06:34:53,857 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-15 06:34:53,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:53,872 INFO L290 TraceCheckUtils]: 0: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-15 06:34:53,872 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,872 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,872 INFO L290 TraceCheckUtils]: 3: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,872 INFO L290 TraceCheckUtils]: 4: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 6: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-15 06:34:53,873 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-15 06:34:53,874 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:34:53,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-15 06:34:53,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-15 06:34:53,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-15 06:34:53,875 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:53,876 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-15 06:34:53,876 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-15 06:34:53,877 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9851#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:53,877 INFO L290 TraceCheckUtils]: 17: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:53,880 INFO L290 TraceCheckUtils]: 18: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:53,881 INFO L290 TraceCheckUtils]: 19: Hoare triple {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:53,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:53,884 INFO L290 TraceCheckUtils]: 21: Hoare triple {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:53,885 INFO L290 TraceCheckUtils]: 22: Hoare triple {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:53,886 INFO L290 TraceCheckUtils]: 23: Hoare triple {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:53,888 INFO L290 TraceCheckUtils]: 24: Hoare triple {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:34:53,889 INFO L290 TraceCheckUtils]: 25: Hoare triple {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:34:53,891 INFO L290 TraceCheckUtils]: 26: Hoare triple {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} is VALID [2022-04-15 06:34:53,892 INFO L290 TraceCheckUtils]: 27: Hoare triple {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-15 06:34:53,893 INFO L290 TraceCheckUtils]: 28: Hoare triple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-15 06:34:53,894 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} {9819#true} #672#return; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-15 06:34:53,894 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-15 06:34:53,895 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9851#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 45: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 46: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 47: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,895 INFO L290 TraceCheckUtils]: 48: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 49: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 50: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 51: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 52: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 53: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 54: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 55: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 56: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-15 06:34:53,896 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-15 06:34:53,896 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-15 06:34:53,897 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-15 06:34:53,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:34:53,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572432252] [2022-04-15 06:34:53,898 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572432252] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:34:53,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1250540611] [2022-04-15 06:34:53,898 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:34:53,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:34:53,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:34:53,899 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:34:53,922 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 06:34:56,218 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-04-15 06:34:56,218 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:34:56,227 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-15 06:34:56,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:34:56,246 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:34:56,699 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:56,700 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-15 06:34:56,701 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:56,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-15 06:34:56,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-15 06:34:56,701 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9819#true} is VALID [2022-04-15 06:34:56,701 INFO L290 TraceCheckUtils]: 17: Hoare triple {9819#true} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:34:56,705 INFO L290 TraceCheckUtils]: 18: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9920#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:56,706 INFO L290 TraceCheckUtils]: 19: Hoare triple {9920#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9924#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:34:56,706 INFO L290 TraceCheckUtils]: 20: Hoare triple {9924#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9928#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:34:56,707 INFO L290 TraceCheckUtils]: 21: Hoare triple {9928#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9932#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:56,708 INFO L290 TraceCheckUtils]: 22: Hoare triple {9932#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9936#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:34:56,709 INFO L290 TraceCheckUtils]: 23: Hoare triple {9936#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9940#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:34:56,712 INFO L290 TraceCheckUtils]: 24: Hoare triple {9940#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:56,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {9944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9948#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:34:56,714 INFO L290 TraceCheckUtils]: 26: Hoare triple {9948#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:34:56,715 INFO L290 TraceCheckUtils]: 27: Hoare triple {9952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:34:56,715 INFO L290 TraceCheckUtils]: 28: Hoare triple {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:34:56,716 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {9819#true} #672#return; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-15 06:34:56,716 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 45: Hoare triple {9820#false} #t~loopctr188 := 0; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 46: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 47: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 48: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 49: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,717 INFO L290 TraceCheckUtils]: 50: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 51: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 52: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 53: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 54: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 55: Hoare triple {9820#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 56: Hoare triple {9820#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9820#false} {9820#false} #656#return; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-15 06:34:56,718 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-15 06:34:56,719 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 103 proven. 45 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 06:34:56,719 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:34:57,394 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 56: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 55: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-15 06:34:57,395 INFO L290 TraceCheckUtils]: 54: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 53: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 52: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 51: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 50: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 49: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 48: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 47: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 46: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-15 06:34:57,396 INFO L290 TraceCheckUtils]: 45: Hoare triple {9819#true} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-15 06:34:57,397 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9819#true} is VALID [2022-04-15 06:34:57,397 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-15 06:34:57,397 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-15 06:34:57,397 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-15 06:34:57,397 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-15 06:34:57,397 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-15 06:34:57,423 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-15 06:34:57,423 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-15 06:34:57,423 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-15 06:34:57,423 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-15 06:34:57,423 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-15 06:34:57,424 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-15 06:34:57,424 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-15 06:34:57,424 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-15 06:34:57,424 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-15 06:34:57,425 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {10170#(not (= |#Ultimate.C_memset_#amount| 24))} {9819#true} #672#return; {9820#false} is VALID [2022-04-15 06:34:57,426 INFO L290 TraceCheckUtils]: 28: Hoare triple {10170#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10170#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:57,426 INFO L290 TraceCheckUtils]: 27: Hoare triple {10177#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10170#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:34:57,429 INFO L290 TraceCheckUtils]: 26: Hoare triple {10181#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10177#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,430 INFO L290 TraceCheckUtils]: 25: Hoare triple {10185#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10181#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,432 INFO L290 TraceCheckUtils]: 24: Hoare triple {10189#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10185#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,434 INFO L290 TraceCheckUtils]: 23: Hoare triple {10193#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10189#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,435 INFO L290 TraceCheckUtils]: 22: Hoare triple {10197#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10193#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:34:57,437 INFO L290 TraceCheckUtils]: 21: Hoare triple {10201#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10197#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,438 INFO L290 TraceCheckUtils]: 20: Hoare triple {10205#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10201#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:34:57,440 INFO L290 TraceCheckUtils]: 19: Hoare triple {10209#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10205#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:34:57,441 INFO L290 TraceCheckUtils]: 18: Hoare triple {10213#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10209#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 17: Hoare triple {9819#true} #t~loopctr188 := 0; {10213#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:34:57,442 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-15 06:34:57,442 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-15 06:34:57,443 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9819#true} is VALID [2022-04-15 06:34:57,444 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-15 06:34:57,444 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1250540611] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:34:57,444 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:34:57,444 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13] total 36 [2022-04-15 06:34:57,444 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:34:57,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1161949751] [2022-04-15 06:34:57,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1161949751] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:34:57,445 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:34:57,445 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2022-04-15 06:34:57,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187357505] [2022-04-15 06:34:57,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:34:57,446 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-15 06:34:57,446 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:34:57,446 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:57,505 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:57,505 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 06:34:57,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:57,506 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 06:34:57,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=307, Invalid=953, Unknown=0, NotChecked=0, Total=1260 [2022-04-15 06:34:57,506 INFO L87 Difference]: Start difference. First operand 85 states and 107 transitions. Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:59,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:59,402 INFO L93 Difference]: Finished difference Result 158 states and 202 transitions. [2022-04-15 06:34:59,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-15 06:34:59,402 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-15 06:34:59,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:34:59,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:59,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-15 06:34:59,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:59,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-15 06:34:59,406 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 191 transitions. [2022-04-15 06:34:59,580 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 191 edges. 191 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:59,582 INFO L225 Difference]: With dead ends: 158 [2022-04-15 06:34:59,582 INFO L226 Difference]: Without dead ends: 90 [2022-04-15 06:34:59,583 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=494, Invalid=1762, Unknown=0, NotChecked=0, Total=2256 [2022-04-15 06:34:59,583 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 595 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 595 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-15 06:34:59,583 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 595 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-15 06:34:59,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-15 06:34:59,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 86. [2022-04-15 06:34:59,611 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:34:59,612 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:59,612 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:59,612 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:59,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:59,614 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-15 06:34:59,615 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-15 06:34:59,615 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:59,615 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:59,615 INFO L74 IsIncluded]: Start isIncluded. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-15 06:34:59,615 INFO L87 Difference]: Start difference. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-15 06:34:59,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:34:59,617 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-15 06:34:59,617 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-15 06:34:59,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:34:59,628 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:34:59,628 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:34:59,628 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:34:59,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:34:59,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 108 transitions. [2022-04-15 06:34:59,630 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 108 transitions. Word has length 64 [2022-04-15 06:34:59,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:34:59,631 INFO L478 AbstractCegarLoop]: Abstraction has 86 states and 108 transitions. [2022-04-15 06:34:59,631 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:34:59,631 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 86 states and 108 transitions. [2022-04-15 06:34:59,776 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:34:59,777 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 108 transitions. [2022-04-15 06:34:59,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-15 06:34:59,777 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:34:59,777 INFO L499 BasicCegarLoop]: trace histogram [20, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:34:59,790 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 06:34:59,978 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-15 06:34:59,978 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:34:59,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:34:59,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 19 times [2022-04-15 06:34:59,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:34:59,979 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1940824668] [2022-04-15 06:34:59,979 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:34:59,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 20 times [2022-04-15 06:34:59,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:34:59,979 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691065753] [2022-04-15 06:34:59,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:34:59,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:00,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:00,068 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:00,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:00,075 INFO L290 TraceCheckUtils]: 0: Hoare triple {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:00,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-15 06:35:00,076 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-15 06:35:00,078 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:35:00,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:00,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:00,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,464 INFO L290 TraceCheckUtils]: 2: Hoare triple {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:00,465 INFO L290 TraceCheckUtils]: 3: Hoare triple {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,467 INFO L290 TraceCheckUtils]: 4: Hoare triple {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,468 INFO L290 TraceCheckUtils]: 5: Hoare triple {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:00,469 INFO L290 TraceCheckUtils]: 6: Hoare triple {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:00,471 INFO L290 TraceCheckUtils]: 7: Hoare triple {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,472 INFO L290 TraceCheckUtils]: 8: Hoare triple {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:00,474 INFO L290 TraceCheckUtils]: 9: Hoare triple {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,476 INFO L290 TraceCheckUtils]: 10: Hoare triple {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} is VALID [2022-04-15 06:35:00,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,478 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {10960#true} #672#return; {10961#false} is VALID [2022-04-15 06:35:00,478 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-04-15 06:35:00,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 3: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 4: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,493 INFO L290 TraceCheckUtils]: 6: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-15 06:35:00,494 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {10960#true} {10961#false} #656#return; {10961#false} is VALID [2022-04-15 06:35:00,495 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:00,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:00,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-15 06:35:00,495 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-15 06:35:00,495 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:00,496 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-15 06:35:00,497 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-15 06:35:00,497 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10994#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:00,498 INFO L290 TraceCheckUtils]: 17: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:00,500 INFO L290 TraceCheckUtils]: 18: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,502 INFO L290 TraceCheckUtils]: 19: Hoare triple {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:00,503 INFO L290 TraceCheckUtils]: 20: Hoare triple {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,505 INFO L290 TraceCheckUtils]: 21: Hoare triple {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,506 INFO L290 TraceCheckUtils]: 22: Hoare triple {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:00,508 INFO L290 TraceCheckUtils]: 23: Hoare triple {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:00,509 INFO L290 TraceCheckUtils]: 24: Hoare triple {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,510 INFO L290 TraceCheckUtils]: 25: Hoare triple {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:00,512 INFO L290 TraceCheckUtils]: 26: Hoare triple {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:00,513 INFO L290 TraceCheckUtils]: 27: Hoare triple {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} is VALID [2022-04-15 06:35:00,514 INFO L290 TraceCheckUtils]: 28: Hoare triple {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,515 INFO L290 TraceCheckUtils]: 29: Hoare triple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:00,516 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {10960#true} #672#return; {10961#false} is VALID [2022-04-15 06:35:00,516 INFO L290 TraceCheckUtils]: 31: Hoare triple {10961#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10961#false} is VALID [2022-04-15 06:35:00,516 INFO L290 TraceCheckUtils]: 32: Hoare triple {10961#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10961#false} is VALID [2022-04-15 06:35:00,516 INFO L290 TraceCheckUtils]: 33: Hoare triple {10961#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10961#false} is VALID [2022-04-15 06:35:00,516 INFO L290 TraceCheckUtils]: 34: Hoare triple {10961#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10961#false} is VALID [2022-04-15 06:35:00,516 INFO L290 TraceCheckUtils]: 35: Hoare triple {10961#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 36: Hoare triple {10961#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 37: Hoare triple {10961#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 38: Hoare triple {10961#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 39: Hoare triple {10961#false} assume #t~short172; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 40: Hoare triple {10961#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 41: Hoare triple {10961#false} assume 0 != #t~mem173;havoc #t~mem173; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L272 TraceCheckUtils]: 42: Hoare triple {10961#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 43: Hoare triple {10961#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L290 TraceCheckUtils]: 44: Hoare triple {10961#false} assume !(~len <= 0); {10961#false} is VALID [2022-04-15 06:35:00,517 INFO L272 TraceCheckUtils]: 45: Hoare triple {10961#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10994#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 46: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 47: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 48: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 49: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 50: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 51: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 52: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 53: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 54: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,518 INFO L290 TraceCheckUtils]: 55: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 56: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 57: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 58: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-15 06:35:00,519 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {10960#true} {10961#false} #656#return; {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-15 06:35:00,519 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-15 06:35:00,520 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 178 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-15 06:35:00,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:00,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691065753] [2022-04-15 06:35:00,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691065753] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:00,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [785655234] [2022-04-15 06:35:00,520 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:35:00,521 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:00,521 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:00,524 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:00,535 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 06:35:01,118 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:35:01,118 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:35:01,122 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-15 06:35:01,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:01,141 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:01,765 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,766 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-15 06:35:01,767 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10960#true} is VALID [2022-04-15 06:35:01,779 INFO L290 TraceCheckUtils]: 17: Hoare triple {10960#true} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:01,781 INFO L290 TraceCheckUtils]: 18: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,783 INFO L290 TraceCheckUtils]: 19: Hoare triple {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:01,784 INFO L290 TraceCheckUtils]: 20: Hoare triple {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:01,785 INFO L290 TraceCheckUtils]: 21: Hoare triple {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,786 INFO L290 TraceCheckUtils]: 22: Hoare triple {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:01,787 INFO L290 TraceCheckUtils]: 23: Hoare triple {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:01,788 INFO L290 TraceCheckUtils]: 24: Hoare triple {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,790 INFO L290 TraceCheckUtils]: 25: Hoare triple {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 26: Hoare triple {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 27: Hoare triple {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 28: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 29: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10960#true} {10960#true} #672#return; {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 31: Hoare triple {10960#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 32: Hoare triple {10960#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,791 INFO L290 TraceCheckUtils]: 33: Hoare triple {10960#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 34: Hoare triple {10960#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 35: Hoare triple {10960#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 36: Hoare triple {10960#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 37: Hoare triple {10960#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 38: Hoare triple {10960#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 39: Hoare triple {10960#true} assume #t~short172; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 40: Hoare triple {10960#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 41: Hoare triple {10960#true} assume 0 != #t~mem173;havoc #t~mem173; {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L272 TraceCheckUtils]: 42: Hoare triple {10960#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10960#true} is VALID [2022-04-15 06:35:01,792 INFO L290 TraceCheckUtils]: 43: Hoare triple {10960#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10960#true} is VALID [2022-04-15 06:35:01,793 INFO L290 TraceCheckUtils]: 44: Hoare triple {10960#true} assume !(~len <= 0); {10960#true} is VALID [2022-04-15 06:35:01,793 INFO L272 TraceCheckUtils]: 45: Hoare triple {10960#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10960#true} is VALID [2022-04-15 06:35:01,793 INFO L290 TraceCheckUtils]: 46: Hoare triple {10960#true} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:01,794 INFO L290 TraceCheckUtils]: 47: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,795 INFO L290 TraceCheckUtils]: 48: Hoare triple {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:01,797 INFO L290 TraceCheckUtils]: 49: Hoare triple {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:01,798 INFO L290 TraceCheckUtils]: 50: Hoare triple {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,799 INFO L290 TraceCheckUtils]: 51: Hoare triple {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:01,800 INFO L290 TraceCheckUtils]: 52: Hoare triple {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:01,801 INFO L290 TraceCheckUtils]: 53: Hoare triple {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,802 INFO L290 TraceCheckUtils]: 54: Hoare triple {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:01,802 INFO L290 TraceCheckUtils]: 55: Hoare triple {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,803 INFO L290 TraceCheckUtils]: 56: Hoare triple {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11187#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:01,805 INFO L290 TraceCheckUtils]: 57: Hoare triple {11187#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} is VALID [2022-04-15 06:35:01,805 INFO L290 TraceCheckUtils]: 58: Hoare triple {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} is VALID [2022-04-15 06:35:01,806 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} {10960#true} #656#return; {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-15 06:35:01,806 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-15 06:35:01,807 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 13 proven. 210 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-15 06:35:01,807 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:02,532 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-15 06:35:02,532 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-15 06:35:02,532 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-15 06:35:02,532 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-15 06:35:02,532 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-15 06:35:02,533 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-15 06:35:02,533 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11237#(not (= |#Ultimate.C_memset_#amount| 80))} {10960#true} #656#return; {10961#false} is VALID [2022-04-15 06:35:02,534 INFO L290 TraceCheckUtils]: 58: Hoare triple {11237#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11237#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:35:02,534 INFO L290 TraceCheckUtils]: 57: Hoare triple {11244#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11237#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:35:02,536 INFO L290 TraceCheckUtils]: 56: Hoare triple {11248#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11244#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,537 INFO L290 TraceCheckUtils]: 55: Hoare triple {11252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11248#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:02,539 INFO L290 TraceCheckUtils]: 54: Hoare triple {11256#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:02,540 INFO L290 TraceCheckUtils]: 53: Hoare triple {11260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11256#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,543 INFO L290 TraceCheckUtils]: 52: Hoare triple {11264#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,544 INFO L290 TraceCheckUtils]: 51: Hoare triple {11268#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11264#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:02,545 INFO L290 TraceCheckUtils]: 50: Hoare triple {11272#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11268#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,545 INFO L290 TraceCheckUtils]: 49: Hoare triple {11276#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11272#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,546 INFO L290 TraceCheckUtils]: 48: Hoare triple {11280#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11276#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:02,548 INFO L290 TraceCheckUtils]: 47: Hoare triple {11284#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11280#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,548 INFO L290 TraceCheckUtils]: 46: Hoare triple {10960#true} #t~loopctr188 := 0; {11284#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:02,548 INFO L272 TraceCheckUtils]: 45: Hoare triple {10960#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10960#true} is VALID [2022-04-15 06:35:02,548 INFO L290 TraceCheckUtils]: 44: Hoare triple {10960#true} assume !(~len <= 0); {10960#true} is VALID [2022-04-15 06:35:02,548 INFO L290 TraceCheckUtils]: 43: Hoare triple {10960#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10960#true} is VALID [2022-04-15 06:35:02,548 INFO L272 TraceCheckUtils]: 42: Hoare triple {10960#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 41: Hoare triple {10960#true} assume 0 != #t~mem173;havoc #t~mem173; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 40: Hoare triple {10960#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 39: Hoare triple {10960#true} assume #t~short172; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 38: Hoare triple {10960#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 37: Hoare triple {10960#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 36: Hoare triple {10960#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 35: Hoare triple {10960#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 34: Hoare triple {10960#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10960#true} is VALID [2022-04-15 06:35:02,549 INFO L290 TraceCheckUtils]: 33: Hoare triple {10960#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 32: Hoare triple {10960#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 31: Hoare triple {10960#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10960#true} {10960#true} #672#return; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 29: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 28: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 27: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 26: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 25: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 24: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,550 INFO L290 TraceCheckUtils]: 23: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 22: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 21: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 20: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 19: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 18: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 17: Hoare triple {10960#true} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-15 06:35:02,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-15 06:35:02,552 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-15 06:35:02,553 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-15 06:35:02,553 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-15 06:35:02,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-15 06:35:02,553 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10960#true} is VALID [2022-04-15 06:35:02,553 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 123 proven. 55 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-15 06:35:02,554 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [785655234] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:02,554 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:02,554 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 39 [2022-04-15 06:35:02,554 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:02,554 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1940824668] [2022-04-15 06:35:02,554 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1940824668] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:02,554 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:02,554 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-04-15 06:35:02,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360062735] [2022-04-15 06:35:02,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:02,555 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-15 06:35:02,555 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:02,555 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:02,602 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:02,602 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 06:35:02,602 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:02,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 06:35:02,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=359, Invalid=1123, Unknown=0, NotChecked=0, Total=1482 [2022-04-15 06:35:02,603 INFO L87 Difference]: Start difference. First operand 86 states and 108 transitions. Second operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:04,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:04,285 INFO L93 Difference]: Finished difference Result 160 states and 204 transitions. [2022-04-15 06:35:04,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-15 06:35:04,285 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-15 06:35:04,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:04,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:04,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-15 06:35:04,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:04,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-15 06:35:04,289 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 192 transitions. [2022-04-15 06:35:04,469 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:04,470 INFO L225 Difference]: With dead ends: 160 [2022-04-15 06:35:04,470 INFO L226 Difference]: Without dead ends: 91 [2022-04-15 06:35:04,472 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=575, Invalid=2077, Unknown=0, NotChecked=0, Total=2652 [2022-04-15 06:35:04,472 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 464 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 515 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 464 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:04,472 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 515 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 464 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 06:35:04,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-15 06:35:04,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2022-04-15 06:35:04,504 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:04,505 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:04,505 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:04,505 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:04,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:04,506 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-15 06:35:04,506 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-15 06:35:04,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:04,507 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:04,507 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-15 06:35:04,507 INFO L87 Difference]: Start difference. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-15 06:35:04,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:04,509 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-15 06:35:04,509 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-15 06:35:04,509 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:04,509 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:04,510 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:04,510 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:04,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:04,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 109 transitions. [2022-04-15 06:35:04,512 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 109 transitions. Word has length 66 [2022-04-15 06:35:04,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:04,512 INFO L478 AbstractCegarLoop]: Abstraction has 87 states and 109 transitions. [2022-04-15 06:35:04,512 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:04,512 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 87 states and 109 transitions. [2022-04-15 06:35:04,645 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:04,645 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 109 transitions. [2022-04-15 06:35:04,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-15 06:35:04,645 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:04,645 INFO L499 BasicCegarLoop]: trace histogram [22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:04,664 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:04,846 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-15 06:35:04,846 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:04,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:04,846 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 21 times [2022-04-15 06:35:04,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:04,847 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2100043987] [2022-04-15 06:35:04,847 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:35:04,847 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 22 times [2022-04-15 06:35:04,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:04,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543830038] [2022-04-15 06:35:04,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:04,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:04,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:04,934 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:04,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:04,944 INFO L290 TraceCheckUtils]: 0: Hoare triple {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:04,944 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-15 06:35:04,944 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-15 06:35:04,946 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:35:04,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:05,400 INFO L290 TraceCheckUtils]: 0: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:05,402 INFO L290 TraceCheckUtils]: 1: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:05,405 INFO L290 TraceCheckUtils]: 3: Hoare triple {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:05,407 INFO L290 TraceCheckUtils]: 4: Hoare triple {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:05,410 INFO L290 TraceCheckUtils]: 6: Hoare triple {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:05,411 INFO L290 TraceCheckUtils]: 7: Hoare triple {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:05,413 INFO L290 TraceCheckUtils]: 8: Hoare triple {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:05,415 INFO L290 TraceCheckUtils]: 9: Hoare triple {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,416 INFO L290 TraceCheckUtils]: 10: Hoare triple {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,418 INFO L290 TraceCheckUtils]: 11: Hoare triple {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:05,419 INFO L290 TraceCheckUtils]: 12: Hoare triple {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-15 06:35:05,420 INFO L290 TraceCheckUtils]: 13: Hoare triple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-15 06:35:05,421 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12128#true} #672#return; {12129#false} is VALID [2022-04-15 06:35:05,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-15 06:35:05,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 0: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 3: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 4: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,436 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 6: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-15 06:35:05,437 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-15 06:35:05,438 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12128#true} {12129#false} #656#return; {12129#false} is VALID [2022-04-15 06:35:05,438 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:05,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-15 06:35:05,439 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:05,440 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-15 06:35:05,440 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:05,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-15 06:35:05,440 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:05,441 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-15 06:35:05,441 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-15 06:35:05,442 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12164#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:05,442 INFO L290 TraceCheckUtils]: 17: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:05,445 INFO L290 TraceCheckUtils]: 18: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,447 INFO L290 TraceCheckUtils]: 19: Hoare triple {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:05,448 INFO L290 TraceCheckUtils]: 20: Hoare triple {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:05,450 INFO L290 TraceCheckUtils]: 21: Hoare triple {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,451 INFO L290 TraceCheckUtils]: 22: Hoare triple {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:05,453 INFO L290 TraceCheckUtils]: 23: Hoare triple {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:05,454 INFO L290 TraceCheckUtils]: 24: Hoare triple {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:05,456 INFO L290 TraceCheckUtils]: 25: Hoare triple {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:05,457 INFO L290 TraceCheckUtils]: 26: Hoare triple {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,459 INFO L290 TraceCheckUtils]: 27: Hoare triple {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:05,461 INFO L290 TraceCheckUtils]: 28: Hoare triple {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:05,462 INFO L290 TraceCheckUtils]: 29: Hoare triple {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-15 06:35:05,463 INFO L290 TraceCheckUtils]: 30: Hoare triple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-15 06:35:05,464 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12128#true} #672#return; {12129#false} is VALID [2022-04-15 06:35:05,464 INFO L290 TraceCheckUtils]: 32: Hoare triple {12129#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12129#false} is VALID [2022-04-15 06:35:05,464 INFO L290 TraceCheckUtils]: 33: Hoare triple {12129#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12129#false} is VALID [2022-04-15 06:35:05,464 INFO L290 TraceCheckUtils]: 34: Hoare triple {12129#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12129#false} is VALID [2022-04-15 06:35:05,464 INFO L290 TraceCheckUtils]: 35: Hoare triple {12129#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 36: Hoare triple {12129#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 37: Hoare triple {12129#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 38: Hoare triple {12129#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 39: Hoare triple {12129#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 40: Hoare triple {12129#false} assume #t~short172; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 41: Hoare triple {12129#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 42: Hoare triple {12129#false} assume 0 != #t~mem173;havoc #t~mem173; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L272 TraceCheckUtils]: 43: Hoare triple {12129#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 44: Hoare triple {12129#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12129#false} is VALID [2022-04-15 06:35:05,465 INFO L290 TraceCheckUtils]: 45: Hoare triple {12129#false} assume !(~len <= 0); {12129#false} is VALID [2022-04-15 06:35:05,466 INFO L272 TraceCheckUtils]: 46: Hoare triple {12129#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12164#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 47: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 48: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 49: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 50: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 51: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 52: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 53: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 54: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,466 INFO L290 TraceCheckUtils]: 55: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 56: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 57: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 58: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 59: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 60: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-15 06:35:05,467 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12128#true} {12129#false} #656#return; {12129#false} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-15 06:35:05,467 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-15 06:35:05,467 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-15 06:35:05,468 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-15 06:35:05,468 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-15 06:35:05,468 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-15 06:35:05,468 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:05,468 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543830038] [2022-04-15 06:35:05,468 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [543830038] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:05,469 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [788292917] [2022-04-15 06:35:05,469 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:35:05,469 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:05,469 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:05,475 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:05,487 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 06:35:05,866 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:35:05,867 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:35:05,871 INFO L263 TraceCheckSpWp]: Trace formula consists of 835 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-15 06:35:05,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:05,893 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:06,805 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12128#true} is VALID [2022-04-15 06:35:06,805 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,805 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-15 06:35:06,806 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-15 06:35:06,807 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12128#true} is VALID [2022-04-15 06:35:06,807 INFO L290 TraceCheckUtils]: 17: Hoare triple {12128#true} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:06,809 INFO L290 TraceCheckUtils]: 18: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,810 INFO L290 TraceCheckUtils]: 19: Hoare triple {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:06,811 INFO L290 TraceCheckUtils]: 20: Hoare triple {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:06,812 INFO L290 TraceCheckUtils]: 21: Hoare triple {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,814 INFO L290 TraceCheckUtils]: 22: Hoare triple {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:06,815 INFO L290 TraceCheckUtils]: 23: Hoare triple {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:06,816 INFO L290 TraceCheckUtils]: 24: Hoare triple {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,817 INFO L290 TraceCheckUtils]: 25: Hoare triple {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:06,818 INFO L290 TraceCheckUtils]: 26: Hoare triple {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 27: Hoare triple {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 28: Hoare triple {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 29: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 30: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12128#true} {12128#true} #672#return; {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 32: Hoare triple {12128#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 33: Hoare triple {12128#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 34: Hoare triple {12128#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12128#true} is VALID [2022-04-15 06:35:06,819 INFO L290 TraceCheckUtils]: 35: Hoare triple {12128#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 36: Hoare triple {12128#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 37: Hoare triple {12128#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 38: Hoare triple {12128#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 39: Hoare triple {12128#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 40: Hoare triple {12128#true} assume #t~short172; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 41: Hoare triple {12128#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 42: Hoare triple {12128#true} assume 0 != #t~mem173;havoc #t~mem173; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L272 TraceCheckUtils]: 43: Hoare triple {12128#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 44: Hoare triple {12128#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L290 TraceCheckUtils]: 45: Hoare triple {12128#true} assume !(~len <= 0); {12128#true} is VALID [2022-04-15 06:35:06,820 INFO L272 TraceCheckUtils]: 46: Hoare triple {12128#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12128#true} is VALID [2022-04-15 06:35:06,821 INFO L290 TraceCheckUtils]: 47: Hoare triple {12128#true} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:06,822 INFO L290 TraceCheckUtils]: 48: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,823 INFO L290 TraceCheckUtils]: 49: Hoare triple {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:06,824 INFO L290 TraceCheckUtils]: 50: Hoare triple {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:06,825 INFO L290 TraceCheckUtils]: 51: Hoare triple {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,826 INFO L290 TraceCheckUtils]: 52: Hoare triple {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:06,827 INFO L290 TraceCheckUtils]: 53: Hoare triple {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:06,828 INFO L290 TraceCheckUtils]: 54: Hoare triple {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,829 INFO L290 TraceCheckUtils]: 55: Hoare triple {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:06,830 INFO L290 TraceCheckUtils]: 56: Hoare triple {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,831 INFO L290 TraceCheckUtils]: 57: Hoare triple {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,833 INFO L290 TraceCheckUtils]: 58: Hoare triple {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12365#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:06,834 INFO L290 TraceCheckUtils]: 59: Hoare triple {12365#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} is VALID [2022-04-15 06:35:06,835 INFO L290 TraceCheckUtils]: 60: Hoare triple {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} is VALID [2022-04-15 06:35:06,836 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} {12128#true} #656#return; {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-15 06:35:06,836 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 14 proven. 253 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 06:35:06,837 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:08,089 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-15 06:35:08,090 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-15 06:35:08,090 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-15 06:35:08,090 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-15 06:35:08,090 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-15 06:35:08,090 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-15 06:35:08,091 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12415#(not (= |#Ultimate.C_memset_#amount| 80))} {12128#true} #656#return; {12129#false} is VALID [2022-04-15 06:35:08,091 INFO L290 TraceCheckUtils]: 60: Hoare triple {12415#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12415#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:35:08,091 INFO L290 TraceCheckUtils]: 59: Hoare triple {12422#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12415#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-15 06:35:08,095 INFO L290 TraceCheckUtils]: 58: Hoare triple {12426#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12422#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:08,097 INFO L290 TraceCheckUtils]: 57: Hoare triple {12430#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12426#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:08,098 INFO L290 TraceCheckUtils]: 56: Hoare triple {12434#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12430#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:08,100 INFO L290 TraceCheckUtils]: 55: Hoare triple {12438#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12434#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:08,102 INFO L290 TraceCheckUtils]: 54: Hoare triple {12442#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12438#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:08,104 INFO L290 TraceCheckUtils]: 53: Hoare triple {12446#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12442#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:08,105 INFO L290 TraceCheckUtils]: 52: Hoare triple {12450#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12446#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:08,107 INFO L290 TraceCheckUtils]: 51: Hoare triple {12454#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12450#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:08,108 INFO L290 TraceCheckUtils]: 50: Hoare triple {12458#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12454#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:08,110 INFO L290 TraceCheckUtils]: 49: Hoare triple {12462#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12458#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:08,112 INFO L290 TraceCheckUtils]: 48: Hoare triple {12466#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12462#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:08,112 INFO L290 TraceCheckUtils]: 47: Hoare triple {12128#true} #t~loopctr188 := 0; {12466#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-15 06:35:08,113 INFO L272 TraceCheckUtils]: 46: Hoare triple {12128#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 45: Hoare triple {12128#true} assume !(~len <= 0); {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 44: Hoare triple {12128#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L272 TraceCheckUtils]: 43: Hoare triple {12128#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 42: Hoare triple {12128#true} assume 0 != #t~mem173;havoc #t~mem173; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 41: Hoare triple {12128#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 40: Hoare triple {12128#true} assume #t~short172; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 39: Hoare triple {12128#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 38: Hoare triple {12128#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 37: Hoare triple {12128#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 36: Hoare triple {12128#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12128#true} is VALID [2022-04-15 06:35:08,113 INFO L290 TraceCheckUtils]: 35: Hoare triple {12128#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 34: Hoare triple {12128#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 33: Hoare triple {12128#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 32: Hoare triple {12128#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12128#true} {12128#true} #672#return; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 30: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 29: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 28: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 27: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 26: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 25: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 24: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 23: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 22: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,114 INFO L290 TraceCheckUtils]: 21: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 20: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 19: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 18: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 17: Hoare triple {12128#true} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,115 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12128#true} is VALID [2022-04-15 06:35:08,116 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 146 proven. 66 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-15 06:35:08,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [788292917] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:08,117 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:08,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 15] total 42 [2022-04-15 06:35:08,117 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:08,117 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2100043987] [2022-04-15 06:35:08,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2100043987] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:08,117 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:08,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-04-15 06:35:08,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546989447] [2022-04-15 06:35:08,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:08,118 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-15 06:35:08,118 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:08,118 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:08,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:08,176 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-15 06:35:08,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:08,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-15 06:35:08,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=417, Invalid=1305, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 06:35:08,177 INFO L87 Difference]: Start difference. First operand 87 states and 109 transitions. Second operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:10,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:10,570 INFO L93 Difference]: Finished difference Result 162 states and 206 transitions. [2022-04-15 06:35:10,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-15 06:35:10,570 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-15 06:35:10,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:10,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:10,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-15 06:35:10,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:10,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-15 06:35:10,575 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 193 transitions. [2022-04-15 06:35:10,825 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:10,826 INFO L225 Difference]: With dead ends: 162 [2022-04-15 06:35:10,826 INFO L226 Difference]: Without dead ends: 92 [2022-04-15 06:35:10,828 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=664, Invalid=2416, Unknown=0, NotChecked=0, Total=3080 [2022-04-15 06:35:10,828 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 696 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:10,828 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 696 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-15 06:35:10,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-04-15 06:35:10,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 88. [2022-04-15 06:35:10,866 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:10,867 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:10,867 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:10,867 INFO L87 Difference]: Start difference. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:10,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:10,869 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-15 06:35:10,869 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-15 06:35:10,870 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:10,870 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:10,870 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-15 06:35:10,871 INFO L87 Difference]: Start difference. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-15 06:35:10,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:10,874 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-15 06:35:10,874 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-15 06:35:10,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:10,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:10,875 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:10,875 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:10,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:10,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 110 transitions. [2022-04-15 06:35:10,877 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 110 transitions. Word has length 68 [2022-04-15 06:35:10,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:10,877 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 110 transitions. [2022-04-15 06:35:10,878 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:10,878 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 88 states and 110 transitions. [2022-04-15 06:35:11,056 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:11,056 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 110 transitions. [2022-04-15 06:35:11,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-15 06:35:11,056 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:11,057 INFO L499 BasicCegarLoop]: trace histogram [24, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:11,083 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:11,257 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 06:35:11,257 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:11,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:11,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 23 times [2022-04-15 06:35:11,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:11,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1231891937] [2022-04-15 06:35:11,258 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:35:11,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 24 times [2022-04-15 06:35:11,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:11,259 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77883573] [2022-04-15 06:35:11,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:11,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:11,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:11,368 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:11,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:11,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-15 06:35:11,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-15 06:35:11,376 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-15 06:35:11,379 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:35:11,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:11,938 INFO L290 TraceCheckUtils]: 0: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:11,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,944 INFO L290 TraceCheckUtils]: 2: Hoare triple {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:11,946 INFO L290 TraceCheckUtils]: 3: Hoare triple {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:11,948 INFO L290 TraceCheckUtils]: 4: Hoare triple {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:11,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:11,954 INFO L290 TraceCheckUtils]: 7: Hoare triple {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:11,956 INFO L290 TraceCheckUtils]: 8: Hoare triple {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:11,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,960 INFO L290 TraceCheckUtils]: 10: Hoare triple {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,962 INFO L290 TraceCheckUtils]: 11: Hoare triple {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,965 INFO L290 TraceCheckUtils]: 12: Hoare triple {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:11,967 INFO L290 TraceCheckUtils]: 13: Hoare triple {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-15 06:35:11,967 INFO L290 TraceCheckUtils]: 14: Hoare triple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-15 06:35:11,968 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13323#true} #672#return; {13324#false} is VALID [2022-04-15 06:35:11,969 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-04-15 06:35:11,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:11,986 INFO L290 TraceCheckUtils]: 0: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 3: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 4: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 6: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-15 06:35:11,988 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-15 06:35:11,989 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:11,989 INFO L290 TraceCheckUtils]: 1: Hoare triple {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13323#true} is VALID [2022-04-15 06:35:11,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:11,991 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13323#true} is VALID [2022-04-15 06:35:11,991 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:11,991 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13323#true} is VALID [2022-04-15 06:35:11,991 INFO L290 TraceCheckUtils]: 15: Hoare triple {13323#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13323#true} is VALID [2022-04-15 06:35:11,992 INFO L272 TraceCheckUtils]: 16: Hoare triple {13323#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13361#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:11,992 INFO L290 TraceCheckUtils]: 17: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:11,996 INFO L290 TraceCheckUtils]: 18: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:11,997 INFO L290 TraceCheckUtils]: 19: Hoare triple {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:11,999 INFO L290 TraceCheckUtils]: 20: Hoare triple {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:12,000 INFO L290 TraceCheckUtils]: 21: Hoare triple {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:12,002 INFO L290 TraceCheckUtils]: 22: Hoare triple {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:12,003 INFO L290 TraceCheckUtils]: 23: Hoare triple {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:12,005 INFO L290 TraceCheckUtils]: 24: Hoare triple {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:12,006 INFO L290 TraceCheckUtils]: 25: Hoare triple {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:12,008 INFO L290 TraceCheckUtils]: 26: Hoare triple {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:12,009 INFO L290 TraceCheckUtils]: 27: Hoare triple {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:12,011 INFO L290 TraceCheckUtils]: 28: Hoare triple {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:12,012 INFO L290 TraceCheckUtils]: 29: Hoare triple {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:12,014 INFO L290 TraceCheckUtils]: 30: Hoare triple {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-15 06:35:12,014 INFO L290 TraceCheckUtils]: 31: Hoare triple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-15 06:35:12,015 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13323#true} #672#return; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-15 06:35:12,016 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-15 06:35:12,017 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13361#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 48: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 49: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 50: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 51: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 52: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 53: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 54: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 55: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 56: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 57: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 58: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,017 INFO L290 TraceCheckUtils]: 59: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 60: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 61: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 62: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-15 06:35:12,018 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-15 06:35:12,018 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-15 06:35:12,019 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 249 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-15 06:35:12,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:12,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [77883573] [2022-04-15 06:35:12,019 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [77883573] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:12,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1609896215] [2022-04-15 06:35:12,019 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:35:12,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:12,019 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:12,020 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:12,021 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 06:35:45,026 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-15 06:35:45,026 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:35:45,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 849 conjuncts, 62 conjunts are in the unsatisfiable core [2022-04-15 06:35:45,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:45,080 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:46,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-15 06:35:46,121 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-15 06:35:46,122 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,123 INFO L290 TraceCheckUtils]: 10: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:35:46,124 INFO L272 TraceCheckUtils]: 16: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13323#true} is VALID [2022-04-15 06:35:46,124 INFO L290 TraceCheckUtils]: 17: Hoare triple {13323#true} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:46,127 INFO L290 TraceCheckUtils]: 18: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:46,133 INFO L290 TraceCheckUtils]: 19: Hoare triple {13434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13438#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:46,134 INFO L290 TraceCheckUtils]: 20: Hoare triple {13438#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13442#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:46,136 INFO L290 TraceCheckUtils]: 21: Hoare triple {13442#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13446#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:46,137 INFO L290 TraceCheckUtils]: 22: Hoare triple {13446#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13450#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:46,139 INFO L290 TraceCheckUtils]: 23: Hoare triple {13450#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13454#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:46,141 INFO L290 TraceCheckUtils]: 24: Hoare triple {13454#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13458#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:46,143 INFO L290 TraceCheckUtils]: 25: Hoare triple {13458#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13462#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:46,146 INFO L290 TraceCheckUtils]: 26: Hoare triple {13462#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13466#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:46,148 INFO L290 TraceCheckUtils]: 27: Hoare triple {13466#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13470#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:46,150 INFO L290 TraceCheckUtils]: 28: Hoare triple {13470#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13474#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:46,153 INFO L290 TraceCheckUtils]: 29: Hoare triple {13474#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13478#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:46,155 INFO L290 TraceCheckUtils]: 30: Hoare triple {13478#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:35:46,155 INFO L290 TraceCheckUtils]: 31: Hoare triple {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-15 06:35:46,157 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} #672#return; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-15 06:35:46,157 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 48: Hoare triple {13324#false} #t~loopctr188 := 0; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 49: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,158 INFO L290 TraceCheckUtils]: 50: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 51: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 52: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 53: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 54: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 55: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 56: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 57: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 58: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 59: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,159 INFO L290 TraceCheckUtils]: 60: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 61: Hoare triple {13324#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 62: Hoare triple {13324#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13324#false} {13324#false} #656#return; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-15 06:35:46,160 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-15 06:35:46,161 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 172 proven. 78 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2022-04-15 06:35:46,161 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:47,776 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-15 06:35:47,776 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-15 06:35:47,776 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-15 06:35:47,777 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-15 06:35:47,777 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 62: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 61: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 60: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 59: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 58: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 57: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 56: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 55: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,777 INFO L290 TraceCheckUtils]: 54: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 53: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 52: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 51: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 50: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 49: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 48: Hoare triple {13323#true} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13323#true} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-15 06:35:47,778 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-15 06:35:47,778 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-15 06:35:47,779 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-15 06:35:47,781 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13714#(not (= |#Ultimate.C_memset_#amount| 24))} {13323#true} #672#return; {13324#false} is VALID [2022-04-15 06:35:47,781 INFO L290 TraceCheckUtils]: 31: Hoare triple {13714#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13714#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:35:47,781 INFO L290 TraceCheckUtils]: 30: Hoare triple {13721#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13714#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:35:47,783 INFO L290 TraceCheckUtils]: 29: Hoare triple {13725#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13721#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,786 INFO L290 TraceCheckUtils]: 28: Hoare triple {13729#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13725#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,790 INFO L290 TraceCheckUtils]: 27: Hoare triple {13733#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13729#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,792 INFO L290 TraceCheckUtils]: 26: Hoare triple {13737#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13733#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:47,794 INFO L290 TraceCheckUtils]: 25: Hoare triple {13741#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13737#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:47,795 INFO L290 TraceCheckUtils]: 24: Hoare triple {13745#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13741#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,796 INFO L290 TraceCheckUtils]: 23: Hoare triple {13749#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13745#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:35:47,799 INFO L290 TraceCheckUtils]: 22: Hoare triple {13753#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13749#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} is VALID [2022-04-15 06:35:47,800 INFO L290 TraceCheckUtils]: 21: Hoare triple {13757#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13753#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,802 INFO L290 TraceCheckUtils]: 20: Hoare triple {13761#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13757#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,803 INFO L290 TraceCheckUtils]: 19: Hoare triple {13765#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13761#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296)))} is VALID [2022-04-15 06:35:47,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {13769#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13765#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296)))} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {13323#true} #t~loopctr188 := 0; {13769#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:47,805 INFO L272 TraceCheckUtils]: 16: Hoare triple {13323#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 15: Hoare triple {13323#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:47,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-15 06:35:47,806 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13323#true} is VALID [2022-04-15 06:35:47,807 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 249 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-15 06:35:47,807 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1609896215] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:47,807 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:47,807 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 16] total 46 [2022-04-15 06:35:47,807 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:47,807 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1231891937] [2022-04-15 06:35:47,807 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1231891937] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:47,807 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:47,807 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-04-15 06:35:47,807 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78390955] [2022-04-15 06:35:47,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:47,808 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-15 06:35:47,808 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:47,808 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:47,863 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:47,864 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-15 06:35:47,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:47,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-15 06:35:47,865 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=483, Invalid=1587, Unknown=0, NotChecked=0, Total=2070 [2022-04-15 06:35:47,865 INFO L87 Difference]: Start difference. First operand 88 states and 110 transitions. Second operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:51,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:51,390 INFO L93 Difference]: Finished difference Result 164 states and 208 transitions. [2022-04-15 06:35:51,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-15 06:35:51,391 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-15 06:35:51,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:51,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:51,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-15 06:35:51,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:51,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-15 06:35:51,396 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 194 transitions. [2022-04-15 06:35:51,637 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:51,639 INFO L225 Difference]: With dead ends: 164 [2022-04-15 06:35:51,639 INFO L226 Difference]: Without dead ends: 93 [2022-04-15 06:35:51,640 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 116 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 536 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=756, Invalid=2904, Unknown=0, NotChecked=0, Total=3660 [2022-04-15 06:35:51,641 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1132 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 1132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:35:51,641 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 1132 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-15 06:35:51,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-15 06:35:51,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2022-04-15 06:35:51,685 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:35:51,685 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:51,685 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:51,685 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:51,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:51,687 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-15 06:35:51,687 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-15 06:35:51,688 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:51,688 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:51,688 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-15 06:35:51,688 INFO L87 Difference]: Start difference. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-15 06:35:51,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:51,690 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-15 06:35:51,690 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-15 06:35:51,690 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:35:51,690 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:35:51,690 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:35:51,690 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:35:51,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:35:51,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 111 transitions. [2022-04-15 06:35:51,692 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 111 transitions. Word has length 70 [2022-04-15 06:35:51,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:35:51,693 INFO L478 AbstractCegarLoop]: Abstraction has 89 states and 111 transitions. [2022-04-15 06:35:51,693 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:51,693 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 89 states and 111 transitions. [2022-04-15 06:35:51,867 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:51,867 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 111 transitions. [2022-04-15 06:35:51,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-04-15 06:35:51,867 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:35:51,867 INFO L499 BasicCegarLoop]: trace histogram [26, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:35:51,880 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-15 06:35:52,068 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 06:35:52,068 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:35:52,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:35:52,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 25 times [2022-04-15 06:35:52,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:52,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [258334042] [2022-04-15 06:35:52,069 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:35:52,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 26 times [2022-04-15 06:35:52,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:35:52,069 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506828366] [2022-04-15 06:35:52,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:35:52,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:35:52,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:52,175 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:35:52,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:52,184 INFO L290 TraceCheckUtils]: 0: Hoare triple {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-15 06:35:52,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-15 06:35:52,184 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-15 06:35:52,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:35:52,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:52,840 INFO L290 TraceCheckUtils]: 0: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:52,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:52,847 INFO L290 TraceCheckUtils]: 3: Hoare triple {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:52,849 INFO L290 TraceCheckUtils]: 4: Hoare triple {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:52,853 INFO L290 TraceCheckUtils]: 6: Hoare triple {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:52,855 INFO L290 TraceCheckUtils]: 7: Hoare triple {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:52,856 INFO L290 TraceCheckUtils]: 8: Hoare triple {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:52,858 INFO L290 TraceCheckUtils]: 9: Hoare triple {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,862 INFO L290 TraceCheckUtils]: 11: Hoare triple {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,864 INFO L290 TraceCheckUtils]: 12: Hoare triple {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,866 INFO L290 TraceCheckUtils]: 13: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:52,868 INFO L290 TraceCheckUtils]: 14: Hoare triple {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-15 06:35:52,868 INFO L290 TraceCheckUtils]: 15: Hoare triple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-15 06:35:52,869 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14546#true} #672#return; {14547#false} is VALID [2022-04-15 06:35:52,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-15 06:35:52,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:52,889 INFO L290 TraceCheckUtils]: 0: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-15 06:35:52,889 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 3: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 4: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 6: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,890 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-15 06:35:52,891 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-15 06:35:52,892 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:35:52,892 INFO L290 TraceCheckUtils]: 1: Hoare triple {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-15 06:35:52,892 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-15 06:35:52,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-15 06:35:52,892 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:52,893 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-15 06:35:52,894 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-15 06:35:52,894 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14586#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:52,895 INFO L290 TraceCheckUtils]: 17: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:52,899 INFO L290 TraceCheckUtils]: 18: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,902 INFO L290 TraceCheckUtils]: 19: Hoare triple {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:52,905 INFO L290 TraceCheckUtils]: 20: Hoare triple {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:52,906 INFO L290 TraceCheckUtils]: 21: Hoare triple {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,909 INFO L290 TraceCheckUtils]: 22: Hoare triple {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:52,912 INFO L290 TraceCheckUtils]: 23: Hoare triple {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:52,914 INFO L290 TraceCheckUtils]: 24: Hoare triple {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:35:52,916 INFO L290 TraceCheckUtils]: 25: Hoare triple {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:52,919 INFO L290 TraceCheckUtils]: 26: Hoare triple {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,921 INFO L290 TraceCheckUtils]: 27: Hoare triple {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,924 INFO L290 TraceCheckUtils]: 28: Hoare triple {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,926 INFO L290 TraceCheckUtils]: 29: Hoare triple {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:52,929 INFO L290 TraceCheckUtils]: 30: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:35:52,931 INFO L290 TraceCheckUtils]: 31: Hoare triple {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-15 06:35:52,932 INFO L290 TraceCheckUtils]: 32: Hoare triple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-15 06:35:52,933 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14546#true} #672#return; {14547#false} is VALID [2022-04-15 06:35:52,933 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-15 06:35:52,933 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-15 06:35:52,933 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-15 06:35:52,934 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-15 06:35:52,935 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14586#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 49: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 50: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 51: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 52: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 53: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 54: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 55: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,935 INFO L290 TraceCheckUtils]: 56: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 57: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 58: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 59: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 60: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 61: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 62: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 63: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 64: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-15 06:35:52,936 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-15 06:35:52,936 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-15 06:35:52,937 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-15 06:35:52,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:35:52,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506828366] [2022-04-15 06:35:52,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506828366] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:35:52,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [161898357] [2022-04-15 06:35:52,938 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:35:52,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:35:52,938 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:35:52,940 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:35:52,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 06:35:53,811 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:35:53,812 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:35:53,817 INFO L263 TraceCheckSpWp]: Trace formula consists of 863 conjuncts, 59 conjunts are in the unsatisfiable core [2022-04-15 06:35:53,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:35:53,836 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:35:54,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14546#true} is VALID [2022-04-15 06:35:54,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-15 06:35:54,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-15 06:35:54,544 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-15 06:35:54,544 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-15 06:35:54,544 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-15 06:35:54,545 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14546#true} is VALID [2022-04-15 06:35:54,546 INFO L290 TraceCheckUtils]: 17: Hoare triple {14546#true} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:35:54,549 INFO L290 TraceCheckUtils]: 18: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14659#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,550 INFO L290 TraceCheckUtils]: 19: Hoare triple {14659#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14663#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:35:54,551 INFO L290 TraceCheckUtils]: 20: Hoare triple {14663#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14667#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:35:54,552 INFO L290 TraceCheckUtils]: 21: Hoare triple {14667#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,554 INFO L290 TraceCheckUtils]: 22: Hoare triple {14671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14675#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:35:54,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {14675#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14679#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:35:54,556 INFO L290 TraceCheckUtils]: 24: Hoare triple {14679#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14683#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,558 INFO L290 TraceCheckUtils]: 25: Hoare triple {14683#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14687#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:35:54,559 INFO L290 TraceCheckUtils]: 26: Hoare triple {14687#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14691#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,561 INFO L290 TraceCheckUtils]: 27: Hoare triple {14691#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14695#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,562 INFO L290 TraceCheckUtils]: 28: Hoare triple {14695#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14699#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,563 INFO L290 TraceCheckUtils]: 29: Hoare triple {14699#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14703#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:35:54,564 INFO L290 TraceCheckUtils]: 30: Hoare triple {14703#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14707#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:35:54,566 INFO L290 TraceCheckUtils]: 31: Hoare triple {14707#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} is VALID [2022-04-15 06:35:54,566 INFO L290 TraceCheckUtils]: 32: Hoare triple {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} is VALID [2022-04-15 06:35:54,567 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} {14546#true} #672#return; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-15 06:35:54,567 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 49: Hoare triple {14547#false} #t~loopctr188 := 0; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 50: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 51: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 52: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 53: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 54: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 55: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,568 INFO L290 TraceCheckUtils]: 56: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 57: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 58: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 59: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 60: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 61: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 62: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 63: Hoare triple {14547#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 64: Hoare triple {14547#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14547#false} {14547#false} #656#return; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-15 06:35:54,569 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-15 06:35:54,570 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-15 06:35:54,570 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 199 proven. 91 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-04-15 06:35:54,570 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:35:55,679 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-15 06:35:55,679 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 64: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 63: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 62: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 61: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 60: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 59: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 58: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 57: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,680 INFO L290 TraceCheckUtils]: 56: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 55: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 54: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 53: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 52: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 51: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 50: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 49: Hoare triple {14546#true} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14546#true} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-15 06:35:55,681 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-15 06:35:55,681 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-15 06:35:55,682 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-15 06:35:55,683 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14949#(not (= |#Ultimate.C_memset_#amount| 24))} {14546#true} #672#return; {14547#false} is VALID [2022-04-15 06:35:55,683 INFO L290 TraceCheckUtils]: 32: Hoare triple {14949#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14949#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:35:55,684 INFO L290 TraceCheckUtils]: 31: Hoare triple {14956#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14949#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:35:55,685 INFO L290 TraceCheckUtils]: 30: Hoare triple {14960#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14956#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,687 INFO L290 TraceCheckUtils]: 29: Hoare triple {14964#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14960#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,690 INFO L290 TraceCheckUtils]: 28: Hoare triple {14968#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14964#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,692 INFO L290 TraceCheckUtils]: 27: Hoare triple {14972#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14968#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,693 INFO L290 TraceCheckUtils]: 26: Hoare triple {14976#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14972#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:35:55,695 INFO L290 TraceCheckUtils]: 25: Hoare triple {14980#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14976#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,696 INFO L290 TraceCheckUtils]: 24: Hoare triple {14984#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14980#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:35:55,698 INFO L290 TraceCheckUtils]: 23: Hoare triple {14988#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14984#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:35:55,700 INFO L290 TraceCheckUtils]: 22: Hoare triple {14992#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14988#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,701 INFO L290 TraceCheckUtils]: 21: Hoare triple {14996#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14992#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,703 INFO L290 TraceCheckUtils]: 20: Hoare triple {15000#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14996#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,704 INFO L290 TraceCheckUtils]: 19: Hoare triple {15004#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15000#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 18: Hoare triple {15008#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15004#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 17: Hoare triple {14546#true} #t~loopctr188 := 0; {15008#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:35:55,706 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14546#true} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-15 06:35:55,706 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-15 06:35:55,707 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14546#true} is VALID [2022-04-15 06:35:55,708 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-15 06:35:55,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [161898357] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:35:55,708 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:35:55,708 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 48 [2022-04-15 06:35:55,708 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:35:55,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [258334042] [2022-04-15 06:35:55,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [258334042] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:35:55,708 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:35:55,708 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-04-15 06:35:55,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1023047310] [2022-04-15 06:35:55,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:35:55,709 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-15 06:35:55,709 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:35:55,709 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:55,775 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:35:55,776 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 06:35:55,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:35:55,776 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 06:35:55,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=527, Invalid=1729, Unknown=0, NotChecked=0, Total=2256 [2022-04-15 06:35:55,777 INFO L87 Difference]: Start difference. First operand 89 states and 111 transitions. Second operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:59,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:35:59,768 INFO L93 Difference]: Finished difference Result 166 states and 210 transitions. [2022-04-15 06:35:59,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-15 06:35:59,769 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-15 06:35:59,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:35:59,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:59,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-15 06:35:59,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:35:59,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-15 06:35:59,773 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 195 transitions. [2022-04-15 06:36:00,014 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 195 edges. 195 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:00,016 INFO L225 Difference]: With dead ends: 166 [2022-04-15 06:36:00,016 INFO L226 Difference]: Without dead ends: 94 [2022-04-15 06:36:00,017 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 182 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=836, Invalid=3196, Unknown=0, NotChecked=0, Total=4032 [2022-04-15 06:36:00,018 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1161 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 1161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:00,018 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 1161 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-15 06:36:00,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-15 06:36:00,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 90. [2022-04-15 06:36:00,060 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:00,061 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:00,061 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:00,061 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:00,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:00,063 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-15 06:36:00,063 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-15 06:36:00,063 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:00,063 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:00,063 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-15 06:36:00,064 INFO L87 Difference]: Start difference. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-15 06:36:00,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:00,065 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-15 06:36:00,066 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-15 06:36:00,066 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:00,066 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:00,066 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:00,066 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:00,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:00,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 112 transitions. [2022-04-15 06:36:00,068 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 112 transitions. Word has length 72 [2022-04-15 06:36:00,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:00,068 INFO L478 AbstractCegarLoop]: Abstraction has 90 states and 112 transitions. [2022-04-15 06:36:00,068 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:00,068 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 90 states and 112 transitions. [2022-04-15 06:36:00,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:00,253 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 112 transitions. [2022-04-15 06:36:00,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-15 06:36:00,253 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:00,254 INFO L499 BasicCegarLoop]: trace histogram [28, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:00,283 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-15 06:36:00,454 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:00,454 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:00,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:00,454 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 27 times [2022-04-15 06:36:00,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:00,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1835099861] [2022-04-15 06:36:00,455 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:36:00,455 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 28 times [2022-04-15 06:36:00,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:00,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142333469] [2022-04-15 06:36:00,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:00,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:00,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:00,547 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:00,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:00,555 INFO L290 TraceCheckUtils]: 0: Hoare triple {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-15 06:36:00,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-15 06:36:00,555 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-15 06:36:00,557 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:36:00,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:01,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:01,235 INFO L290 TraceCheckUtils]: 1: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:01,239 INFO L290 TraceCheckUtils]: 3: Hoare triple {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:01,241 INFO L290 TraceCheckUtils]: 4: Hoare triple {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,243 INFO L290 TraceCheckUtils]: 5: Hoare triple {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:01,245 INFO L290 TraceCheckUtils]: 6: Hoare triple {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:01,247 INFO L290 TraceCheckUtils]: 7: Hoare triple {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:01,249 INFO L290 TraceCheckUtils]: 8: Hoare triple {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:01,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,252 INFO L290 TraceCheckUtils]: 10: Hoare triple {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,255 INFO L290 TraceCheckUtils]: 11: Hoare triple {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,257 INFO L290 TraceCheckUtils]: 12: Hoare triple {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,259 INFO L290 TraceCheckUtils]: 13: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:01,261 INFO L290 TraceCheckUtils]: 14: Hoare triple {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} is VALID [2022-04-15 06:36:01,262 INFO L290 TraceCheckUtils]: 15: Hoare triple {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-15 06:36:01,262 INFO L290 TraceCheckUtils]: 16: Hoare triple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-15 06:36:01,263 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15795#true} #672#return; {15796#false} is VALID [2022-04-15 06:36:01,263 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 49 [2022-04-15 06:36:01,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 0: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 3: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 4: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,285 INFO L290 TraceCheckUtils]: 6: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,287 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-15 06:36:01,287 INFO L290 TraceCheckUtils]: 16: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-15 06:36:01,287 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-15 06:36:01,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-15 06:36:01,288 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-15 06:36:01,289 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-15 06:36:01,290 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15837#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:01,290 INFO L290 TraceCheckUtils]: 17: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:01,295 INFO L290 TraceCheckUtils]: 18: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,297 INFO L290 TraceCheckUtils]: 19: Hoare triple {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:01,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:01,302 INFO L290 TraceCheckUtils]: 21: Hoare triple {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,305 INFO L290 TraceCheckUtils]: 22: Hoare triple {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:01,307 INFO L290 TraceCheckUtils]: 23: Hoare triple {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:01,310 INFO L290 TraceCheckUtils]: 24: Hoare triple {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:01,313 INFO L290 TraceCheckUtils]: 25: Hoare triple {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:01,315 INFO L290 TraceCheckUtils]: 26: Hoare triple {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,317 INFO L290 TraceCheckUtils]: 27: Hoare triple {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,320 INFO L290 TraceCheckUtils]: 28: Hoare triple {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,323 INFO L290 TraceCheckUtils]: 29: Hoare triple {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:01,325 INFO L290 TraceCheckUtils]: 30: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:01,328 INFO L290 TraceCheckUtils]: 31: Hoare triple {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} is VALID [2022-04-15 06:36:01,329 INFO L290 TraceCheckUtils]: 32: Hoare triple {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-15 06:36:01,330 INFO L290 TraceCheckUtils]: 33: Hoare triple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-15 06:36:01,331 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15795#true} #672#return; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-15 06:36:01,331 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-15 06:36:01,332 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15837#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 50: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 51: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 52: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,332 INFO L290 TraceCheckUtils]: 53: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 54: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 55: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 56: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 57: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 58: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 59: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 60: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 61: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 62: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,333 INFO L290 TraceCheckUtils]: 63: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 64: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 65: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 66: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-15 06:36:01,334 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-15 06:36:01,334 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-15 06:36:01,334 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-15 06:36:01,335 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-15 06:36:01,335 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 332 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-15 06:36:01,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:01,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142333469] [2022-04-15 06:36:01,335 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142333469] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:01,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2015522584] [2022-04-15 06:36:01,336 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:36:01,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:01,336 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:01,337 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:01,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 06:36:01,841 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:36:01,841 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:36:01,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 877 conjuncts, 60 conjunts are in the unsatisfiable core [2022-04-15 06:36:01,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:01,864 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:02,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:02,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15795#true} is VALID [2022-04-15 06:36:02,904 INFO L290 TraceCheckUtils]: 17: Hoare triple {15795#true} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:02,908 INFO L290 TraceCheckUtils]: 18: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15911#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,909 INFO L290 TraceCheckUtils]: 19: Hoare triple {15911#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15915#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:02,911 INFO L290 TraceCheckUtils]: 20: Hoare triple {15915#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15919#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:36:02,912 INFO L290 TraceCheckUtils]: 21: Hoare triple {15919#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15923#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,914 INFO L290 TraceCheckUtils]: 22: Hoare triple {15923#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15927#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:02,915 INFO L290 TraceCheckUtils]: 23: Hoare triple {15927#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15931#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:02,917 INFO L290 TraceCheckUtils]: 24: Hoare triple {15931#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15935#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,919 INFO L290 TraceCheckUtils]: 25: Hoare triple {15935#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15939#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:02,920 INFO L290 TraceCheckUtils]: 26: Hoare triple {15939#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15943#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,922 INFO L290 TraceCheckUtils]: 27: Hoare triple {15943#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15947#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,923 INFO L290 TraceCheckUtils]: 28: Hoare triple {15947#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,925 INFO L290 TraceCheckUtils]: 29: Hoare triple {15951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15955#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:02,927 INFO L290 TraceCheckUtils]: 30: Hoare triple {15955#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15959#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:02,930 INFO L290 TraceCheckUtils]: 31: Hoare triple {15959#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15963#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:02,934 INFO L290 TraceCheckUtils]: 32: Hoare triple {15963#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-15 06:36:02,934 INFO L290 TraceCheckUtils]: 33: Hoare triple {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-15 06:36:02,935 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} {15795#true} #672#return; {15796#false} is VALID [2022-04-15 06:36:02,935 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-15 06:36:02,935 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-15 06:36:02,935 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-15 06:36:02,935 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-15 06:36:02,935 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 50: Hoare triple {15796#false} #t~loopctr188 := 0; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 51: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 52: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,936 INFO L290 TraceCheckUtils]: 53: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 54: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 55: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 56: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 57: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 58: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 59: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 60: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 61: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 62: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 63: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 64: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 65: Hoare triple {15796#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 66: Hoare triple {15796#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15796#false} {15796#false} #656#return; {15796#false} is VALID [2022-04-15 06:36:02,937 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-15 06:36:02,938 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 228 proven. 105 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2022-04-15 06:36:02,938 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 66: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-15 06:36:04,755 INFO L290 TraceCheckUtils]: 65: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 64: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 63: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 62: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 61: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 60: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 59: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 58: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 57: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 56: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 55: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 54: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 53: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,756 INFO L290 TraceCheckUtils]: 52: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 51: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 50: Hoare triple {15795#true} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-15 06:36:04,757 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15795#true} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-15 06:36:04,757 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-15 06:36:04,757 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-15 06:36:04,758 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-15 06:36:04,764 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16211#(not (= |#Ultimate.C_memset_#amount| 24))} {15795#true} #672#return; {15796#false} is VALID [2022-04-15 06:36:04,764 INFO L290 TraceCheckUtils]: 33: Hoare triple {16211#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16211#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:04,764 INFO L290 TraceCheckUtils]: 32: Hoare triple {16218#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {16211#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:04,766 INFO L290 TraceCheckUtils]: 31: Hoare triple {16222#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16218#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,768 INFO L290 TraceCheckUtils]: 30: Hoare triple {16226#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16222#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,769 INFO L290 TraceCheckUtils]: 29: Hoare triple {16230#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16226#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,771 INFO L290 TraceCheckUtils]: 28: Hoare triple {16234#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16230#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,772 INFO L290 TraceCheckUtils]: 27: Hoare triple {16238#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16234#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,776 INFO L290 TraceCheckUtils]: 26: Hoare triple {16242#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16238#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,777 INFO L290 TraceCheckUtils]: 25: Hoare triple {16246#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16242#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:36:04,779 INFO L290 TraceCheckUtils]: 24: Hoare triple {16250#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16246#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,780 INFO L290 TraceCheckUtils]: 23: Hoare triple {16254#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16250#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,782 INFO L290 TraceCheckUtils]: 22: Hoare triple {16258#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16254#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,785 INFO L290 TraceCheckUtils]: 21: Hoare triple {16262#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16258#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,786 INFO L290 TraceCheckUtils]: 20: Hoare triple {16266#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16262#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:04,788 INFO L290 TraceCheckUtils]: 19: Hoare triple {16270#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16266#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,790 INFO L290 TraceCheckUtils]: 18: Hoare triple {16274#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16270#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 17: Hoare triple {15795#true} #t~loopctr188 := 0; {16274#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:04,791 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-15 06:36:04,791 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15795#true} is VALID [2022-04-15 06:36:04,792 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 332 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-15 06:36:04,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2015522584] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:04,793 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:04,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 18] total 51 [2022-04-15 06:36:04,793 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:04,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1835099861] [2022-04-15 06:36:04,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1835099861] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:04,793 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:04,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2022-04-15 06:36:04,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839191314] [2022-04-15 06:36:04,793 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:04,794 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-15 06:36:04,794 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:04,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:04,856 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:04,856 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-15 06:36:04,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:04,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-15 06:36:04,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=589, Invalid=1961, Unknown=0, NotChecked=0, Total=2550 [2022-04-15 06:36:04,857 INFO L87 Difference]: Start difference. First operand 90 states and 112 transitions. Second operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:09,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:09,060 INFO L93 Difference]: Finished difference Result 168 states and 212 transitions. [2022-04-15 06:36:09,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-15 06:36:09,060 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-15 06:36:09,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:36:09,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:09,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-15 06:36:09,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:09,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-15 06:36:09,065 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 196 transitions. [2022-04-15 06:36:09,320 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:09,321 INFO L225 Difference]: With dead ends: 168 [2022-04-15 06:36:09,322 INFO L226 Difference]: Without dead ends: 95 [2022-04-15 06:36:09,323 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 459 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=928, Invalid=3628, Unknown=0, NotChecked=0, Total=4556 [2022-04-15 06:36:09,323 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 961 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 228 SdHoareTripleChecker+Invalid, 1020 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 961 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:09,323 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 228 Invalid, 1020 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 961 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-15 06:36:09,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-15 06:36:09,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 91. [2022-04-15 06:36:09,369 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:09,369 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:09,369 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:09,370 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:09,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:09,371 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-15 06:36:09,372 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-15 06:36:09,372 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:09,372 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:09,372 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-15 06:36:09,372 INFO L87 Difference]: Start difference. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-15 06:36:09,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:09,374 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-15 06:36:09,374 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-15 06:36:09,374 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:09,374 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:09,374 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:09,374 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:09,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:09,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 113 transitions. [2022-04-15 06:36:09,376 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 113 transitions. Word has length 74 [2022-04-15 06:36:09,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:09,377 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 113 transitions. [2022-04-15 06:36:09,377 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:09,377 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 91 states and 113 transitions. [2022-04-15 06:36:09,534 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:09,534 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 113 transitions. [2022-04-15 06:36:09,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-15 06:36:09,534 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:09,534 INFO L499 BasicCegarLoop]: trace histogram [30, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:09,554 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-15 06:36:09,735 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-15 06:36:09,735 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:09,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:09,735 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 29 times [2022-04-15 06:36:09,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:09,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1277711242] [2022-04-15 06:36:09,736 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:36:09,736 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 30 times [2022-04-15 06:36:09,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:09,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023807576] [2022-04-15 06:36:09,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:09,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:09,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:09,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:09,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:09,845 INFO L290 TraceCheckUtils]: 0: Hoare triple {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-15 06:36:09,845 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-15 06:36:09,846 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-15 06:36:09,848 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:36:09,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:10,705 INFO L290 TraceCheckUtils]: 0: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:10,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,715 INFO L290 TraceCheckUtils]: 2: Hoare triple {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:10,719 INFO L290 TraceCheckUtils]: 3: Hoare triple {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,722 INFO L290 TraceCheckUtils]: 4: Hoare triple {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,725 INFO L290 TraceCheckUtils]: 5: Hoare triple {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:10,729 INFO L290 TraceCheckUtils]: 6: Hoare triple {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:10,732 INFO L290 TraceCheckUtils]: 7: Hoare triple {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:10,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,743 INFO L290 TraceCheckUtils]: 10: Hoare triple {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,747 INFO L290 TraceCheckUtils]: 11: Hoare triple {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,754 INFO L290 TraceCheckUtils]: 13: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:10,757 INFO L290 TraceCheckUtils]: 14: Hoare triple {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:10,758 INFO L290 TraceCheckUtils]: 15: Hoare triple {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:36:10,761 INFO L290 TraceCheckUtils]: 16: Hoare triple {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,763 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {17071#true} #672#return; {17072#false} is VALID [2022-04-15 06:36:10,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-15 06:36:10,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 3: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 4: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,783 INFO L290 TraceCheckUtils]: 6: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,784 INFO L290 TraceCheckUtils]: 16: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-15 06:36:10,785 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-15 06:36:10,785 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-15 06:36:10,786 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17071#true} is VALID [2022-04-15 06:36:10,786 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17071#true} is VALID [2022-04-15 06:36:10,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17071#true} is VALID [2022-04-15 06:36:10,788 INFO L272 TraceCheckUtils]: 16: Hoare triple {17071#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17115#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:10,788 INFO L290 TraceCheckUtils]: 17: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:10,794 INFO L290 TraceCheckUtils]: 18: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,797 INFO L290 TraceCheckUtils]: 19: Hoare triple {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:10,800 INFO L290 TraceCheckUtils]: 20: Hoare triple {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,803 INFO L290 TraceCheckUtils]: 21: Hoare triple {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,806 INFO L290 TraceCheckUtils]: 22: Hoare triple {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:10,809 INFO L290 TraceCheckUtils]: 23: Hoare triple {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:10,813 INFO L290 TraceCheckUtils]: 24: Hoare triple {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,819 INFO L290 TraceCheckUtils]: 25: Hoare triple {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:10,822 INFO L290 TraceCheckUtils]: 26: Hoare triple {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,825 INFO L290 TraceCheckUtils]: 27: Hoare triple {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,829 INFO L290 TraceCheckUtils]: 28: Hoare triple {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,832 INFO L290 TraceCheckUtils]: 29: Hoare triple {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:10,835 INFO L290 TraceCheckUtils]: 30: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:10,838 INFO L290 TraceCheckUtils]: 31: Hoare triple {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:10,840 INFO L290 TraceCheckUtils]: 32: Hoare triple {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:36:10,843 INFO L290 TraceCheckUtils]: 33: Hoare triple {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,843 INFO L290 TraceCheckUtils]: 34: Hoare triple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:10,844 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {17071#true} #672#return; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-15 06:36:10,845 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-15 06:36:10,846 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-15 06:36:10,846 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17115#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 51: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 52: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 53: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 54: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,846 INFO L290 TraceCheckUtils]: 55: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 56: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 57: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 58: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 59: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 60: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 61: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 62: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 63: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 64: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 65: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,847 INFO L290 TraceCheckUtils]: 66: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 67: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 68: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-15 06:36:10,848 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-15 06:36:10,848 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-15 06:36:10,849 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-15 06:36:10,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:10,849 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023807576] [2022-04-15 06:36:10,850 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2023807576] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:10,850 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [541012809] [2022-04-15 06:36:10,850 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:36:10,850 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:10,850 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:10,851 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:10,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 06:36:41,953 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2022-04-15 06:36:41,954 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:36:41,993 INFO L263 TraceCheckSpWp]: Trace formula consists of 891 conjuncts, 49 conjunts are in the unsatisfiable core [2022-04-15 06:36:42,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:42,020 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:43,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17071#true} is VALID [2022-04-15 06:36:43,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-15 06:36:43,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-15 06:36:43,489 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-15 06:36:43,489 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-15 06:36:43,489 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-15 06:36:43,489 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-15 06:36:43,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,490 INFO L290 TraceCheckUtils]: 8: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,490 INFO L290 TraceCheckUtils]: 10: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,491 INFO L290 TraceCheckUtils]: 13: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,491 INFO L290 TraceCheckUtils]: 14: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,492 INFO L290 TraceCheckUtils]: 15: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-15 06:36:43,492 INFO L272 TraceCheckUtils]: 16: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17071#true} is VALID [2022-04-15 06:36:43,492 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:43,496 INFO L290 TraceCheckUtils]: 18: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,498 INFO L290 TraceCheckUtils]: 19: Hoare triple {17191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17195#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:43,500 INFO L290 TraceCheckUtils]: 20: Hoare triple {17195#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17199#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:36:43,501 INFO L290 TraceCheckUtils]: 21: Hoare triple {17199#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17203#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,503 INFO L290 TraceCheckUtils]: 22: Hoare triple {17203#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17207#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:43,506 INFO L290 TraceCheckUtils]: 23: Hoare triple {17207#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17211#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:43,508 INFO L290 TraceCheckUtils]: 24: Hoare triple {17211#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17215#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,510 INFO L290 TraceCheckUtils]: 25: Hoare triple {17215#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17219#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:43,513 INFO L290 TraceCheckUtils]: 26: Hoare triple {17219#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17223#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,515 INFO L290 TraceCheckUtils]: 27: Hoare triple {17223#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17227#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,517 INFO L290 TraceCheckUtils]: 28: Hoare triple {17227#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17231#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,520 INFO L290 TraceCheckUtils]: 29: Hoare triple {17231#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:43,522 INFO L290 TraceCheckUtils]: 30: Hoare triple {17235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17239#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:43,523 INFO L290 TraceCheckUtils]: 31: Hoare triple {17239#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17243#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967289) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:43,526 INFO L290 TraceCheckUtils]: 32: Hoare triple {17243#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967289) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (< (mod (+ 4294967288 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:43,528 INFO L290 TraceCheckUtils]: 33: Hoare triple {17247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (< (mod (+ 4294967288 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} is VALID [2022-04-15 06:36:43,528 INFO L290 TraceCheckUtils]: 34: Hoare triple {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} is VALID [2022-04-15 06:36:43,529 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} #672#return; {17072#false} is VALID [2022-04-15 06:36:43,529 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-15 06:36:43,529 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-15 06:36:43,529 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 51: Hoare triple {17072#false} #t~loopctr188 := 0; {17072#false} is VALID [2022-04-15 06:36:43,530 INFO L290 TraceCheckUtils]: 52: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 53: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 54: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 55: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 56: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 57: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 58: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 59: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 60: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 61: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 62: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 63: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 64: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 65: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,531 INFO L290 TraceCheckUtils]: 66: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 67: Hoare triple {17072#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 68: Hoare triple {17072#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17072#false} {17072#false} #656#return; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-15 06:36:43,532 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-15 06:36:43,533 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 259 proven. 120 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-04-15 06:36:43,533 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:45,165 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-15 06:36:45,165 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-15 06:36:45,165 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-15 06:36:45,165 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-15 06:36:45,166 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 68: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 67: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 66: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 65: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 64: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 63: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 62: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 61: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 60: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,166 INFO L290 TraceCheckUtils]: 59: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 58: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 57: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 56: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 55: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 54: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 53: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 52: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 51: Hoare triple {17071#true} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17071#true} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-15 06:36:45,167 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-15 06:36:45,167 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-15 06:36:45,168 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-15 06:36:45,169 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17501#(not (= |#Ultimate.C_memset_#amount| 24))} {17071#true} #672#return; {17072#false} is VALID [2022-04-15 06:36:45,169 INFO L290 TraceCheckUtils]: 34: Hoare triple {17501#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17501#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:45,170 INFO L290 TraceCheckUtils]: 33: Hoare triple {17508#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17501#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:45,172 INFO L290 TraceCheckUtils]: 32: Hoare triple {17512#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17508#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,174 INFO L290 TraceCheckUtils]: 31: Hoare triple {17516#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17512#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,178 INFO L290 TraceCheckUtils]: 30: Hoare triple {17520#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17516#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,180 INFO L290 TraceCheckUtils]: 29: Hoare triple {17524#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17520#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,182 INFO L290 TraceCheckUtils]: 28: Hoare triple {17528#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17524#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:36:45,184 INFO L290 TraceCheckUtils]: 27: Hoare triple {17532#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17528#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,186 INFO L290 TraceCheckUtils]: 26: Hoare triple {17536#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17532#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:36:45,189 INFO L290 TraceCheckUtils]: 25: Hoare triple {17540#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17536#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-15 06:36:45,192 INFO L290 TraceCheckUtils]: 24: Hoare triple {17544#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17540#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,194 INFO L290 TraceCheckUtils]: 23: Hoare triple {17548#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17544#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,195 INFO L290 TraceCheckUtils]: 22: Hoare triple {17552#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17548#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296)))} is VALID [2022-04-15 06:36:45,197 INFO L290 TraceCheckUtils]: 21: Hoare triple {17556#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17552#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296)))} is VALID [2022-04-15 06:36:45,201 INFO L290 TraceCheckUtils]: 20: Hoare triple {17560#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17556#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,202 INFO L290 TraceCheckUtils]: 19: Hoare triple {17564#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17560#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:45,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {17568#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17564#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} is VALID [2022-04-15 06:36:45,204 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} #t~loopctr188 := 0; {17568#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)))} is VALID [2022-04-15 06:36:45,204 INFO L272 TraceCheckUtils]: 16: Hoare triple {17071#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-15 06:36:45,205 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-15 06:36:45,206 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-15 06:36:45,206 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-15 06:36:45,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-15 06:36:45,206 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17071#true} is VALID [2022-04-15 06:36:45,206 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-15 06:36:45,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [541012809] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:45,206 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:45,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 19] total 55 [2022-04-15 06:36:45,207 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:45,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1277711242] [2022-04-15 06:36:45,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1277711242] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:45,207 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:45,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-04-15 06:36:45,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867287264] [2022-04-15 06:36:45,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:45,208 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-15 06:36:45,208 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:45,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:45,291 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:45,291 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-15 06:36:45,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:45,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-15 06:36:45,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=636, Invalid=2334, Unknown=0, NotChecked=0, Total=2970 [2022-04-15 06:36:45,293 INFO L87 Difference]: Start difference. First operand 91 states and 113 transitions. Second operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:49,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,206 INFO L93 Difference]: Finished difference Result 170 states and 214 transitions. [2022-04-15 06:36:49,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-15 06:36:49,207 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-15 06:36:49,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:36:49,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:49,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-15 06:36:49,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:49,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-15 06:36:49,212 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 197 transitions. [2022-04-15 06:36:49,499 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 197 edges. 197 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:49,500 INFO L225 Difference]: With dead ends: 170 [2022-04-15 06:36:49,500 INFO L226 Difference]: Without dead ends: 96 [2022-04-15 06:36:49,503 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 902 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=990, Invalid=4266, Unknown=0, NotChecked=0, Total=5256 [2022-04-15 06:36:49,503 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 763 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 824 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 763 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-15 06:36:49,503 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 824 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 763 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-15 06:36:49,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-04-15 06:36:49,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 92. [2022-04-15 06:36:49,553 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:36:49,553 INFO L82 GeneralOperation]: Start isEquivalent. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:49,554 INFO L74 IsIncluded]: Start isIncluded. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:49,554 INFO L87 Difference]: Start difference. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:49,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,556 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-15 06:36:49,556 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-15 06:36:49,556 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:49,556 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:49,556 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-15 06:36:49,557 INFO L87 Difference]: Start difference. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-15 06:36:49,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:36:49,562 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-15 06:36:49,562 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-15 06:36:49,562 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:36:49,562 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:36:49,562 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:36:49,562 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:36:49,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:36:49,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 114 transitions. [2022-04-15 06:36:49,565 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 114 transitions. Word has length 76 [2022-04-15 06:36:49,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:36:49,565 INFO L478 AbstractCegarLoop]: Abstraction has 92 states and 114 transitions. [2022-04-15 06:36:49,565 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:49,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 114 transitions. [2022-04-15 06:36:49,789 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:49,789 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 114 transitions. [2022-04-15 06:36:49,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-04-15 06:36:49,790 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:36:49,790 INFO L499 BasicCegarLoop]: trace histogram [32, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:36:49,806 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2022-04-15 06:36:49,995 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-15 06:36:49,996 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:36:49,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:36:49,996 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 31 times [2022-04-15 06:36:49,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:49,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1346375807] [2022-04-15 06:36:49,997 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:36:49,997 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 32 times [2022-04-15 06:36:49,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:36:49,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433207428] [2022-04-15 06:36:49,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:36:49,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:36:50,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:50,120 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:36:50,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:50,130 INFO L290 TraceCheckUtils]: 0: Hoare triple {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-15 06:36:50,130 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-15 06:36:50,130 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-15 06:36:50,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:36:50,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:51,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,262 INFO L290 TraceCheckUtils]: 2: Hoare triple {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:51,264 INFO L290 TraceCheckUtils]: 3: Hoare triple {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,267 INFO L290 TraceCheckUtils]: 4: Hoare triple {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,269 INFO L290 TraceCheckUtils]: 5: Hoare triple {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:51,272 INFO L290 TraceCheckUtils]: 6: Hoare triple {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:51,275 INFO L290 TraceCheckUtils]: 7: Hoare triple {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:51,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,283 INFO L290 TraceCheckUtils]: 10: Hoare triple {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,288 INFO L290 TraceCheckUtils]: 12: Hoare triple {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,291 INFO L290 TraceCheckUtils]: 13: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:51,294 INFO L290 TraceCheckUtils]: 14: Hoare triple {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:51,296 INFO L290 TraceCheckUtils]: 15: Hoare triple {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,299 INFO L290 TraceCheckUtils]: 16: Hoare triple {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:36:51,301 INFO L290 TraceCheckUtils]: 17: Hoare triple {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,301 INFO L290 TraceCheckUtils]: 18: Hoare triple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,302 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {18375#true} #672#return; {18376#false} is VALID [2022-04-15 06:36:51,302 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-04-15 06:36:51,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:51,321 INFO L290 TraceCheckUtils]: 0: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 3: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 4: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 6: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,322 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 16: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-15 06:36:51,324 INFO L290 TraceCheckUtils]: 18: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-15 06:36:51,324 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-15 06:36:51,324 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:36:51,324 INFO L290 TraceCheckUtils]: 1: Hoare triple {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-15 06:36:51,325 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:51,326 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-15 06:36:51,326 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:51,326 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-15 06:36:51,326 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-15 06:36:51,327 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18421#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:51,327 INFO L290 TraceCheckUtils]: 17: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:51,334 INFO L290 TraceCheckUtils]: 18: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,338 INFO L290 TraceCheckUtils]: 19: Hoare triple {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:51,343 INFO L290 TraceCheckUtils]: 20: Hoare triple {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,347 INFO L290 TraceCheckUtils]: 21: Hoare triple {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,351 INFO L290 TraceCheckUtils]: 22: Hoare triple {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:51,356 INFO L290 TraceCheckUtils]: 23: Hoare triple {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:51,360 INFO L290 TraceCheckUtils]: 24: Hoare triple {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,365 INFO L290 TraceCheckUtils]: 25: Hoare triple {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:51,369 INFO L290 TraceCheckUtils]: 26: Hoare triple {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,373 INFO L290 TraceCheckUtils]: 27: Hoare triple {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,379 INFO L290 TraceCheckUtils]: 28: Hoare triple {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,383 INFO L290 TraceCheckUtils]: 29: Hoare triple {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,386 INFO L290 TraceCheckUtils]: 30: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:51,390 INFO L290 TraceCheckUtils]: 31: Hoare triple {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:51,393 INFO L290 TraceCheckUtils]: 32: Hoare triple {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:51,397 INFO L290 TraceCheckUtils]: 33: Hoare triple {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:36:51,399 INFO L290 TraceCheckUtils]: 34: Hoare triple {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,399 INFO L290 TraceCheckUtils]: 35: Hoare triple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:36:51,400 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {18375#true} #672#return; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-15 06:36:51,400 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-15 06:36:51,401 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18421#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 52: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 53: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 54: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 55: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 56: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,401 INFO L290 TraceCheckUtils]: 57: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 58: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 59: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 60: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 61: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 62: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 63: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 64: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 65: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 66: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 67: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 68: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 69: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L290 TraceCheckUtils]: 70: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-15 06:36:51,402 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-15 06:36:51,403 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-15 06:36:51,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:36:51,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433207428] [2022-04-15 06:36:51,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1433207428] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:36:51,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1294802884] [2022-04-15 06:36:51,404 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 06:36:51,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:36:51,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:36:51,405 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:36:51,406 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 06:36:52,219 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 06:36:52,219 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:36:52,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 905 conjuncts, 72 conjunts are in the unsatisfiable core [2022-04-15 06:36:52,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:36:52,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:36:53,482 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-15 06:36:53,482 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18375#true} is VALID [2022-04-15 06:36:53,483 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:36:53,488 INFO L290 TraceCheckUtils]: 18: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18497#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,494 INFO L290 TraceCheckUtils]: 19: Hoare triple {18497#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18501#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:36:53,496 INFO L290 TraceCheckUtils]: 20: Hoare triple {18501#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18505#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:36:53,498 INFO L290 TraceCheckUtils]: 21: Hoare triple {18505#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18509#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,501 INFO L290 TraceCheckUtils]: 22: Hoare triple {18509#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18513#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:36:53,504 INFO L290 TraceCheckUtils]: 23: Hoare triple {18513#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18517#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:36:53,506 INFO L290 TraceCheckUtils]: 24: Hoare triple {18517#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18521#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,509 INFO L290 TraceCheckUtils]: 25: Hoare triple {18521#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18525#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:36:53,511 INFO L290 TraceCheckUtils]: 26: Hoare triple {18525#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18529#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,513 INFO L290 TraceCheckUtils]: 27: Hoare triple {18529#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18533#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,516 INFO L290 TraceCheckUtils]: 28: Hoare triple {18533#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18537#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,518 INFO L290 TraceCheckUtils]: 29: Hoare triple {18537#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18541#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,520 INFO L290 TraceCheckUtils]: 30: Hoare triple {18541#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18545#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:36:53,522 INFO L290 TraceCheckUtils]: 31: Hoare triple {18545#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18549#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:36:53,524 INFO L290 TraceCheckUtils]: 32: Hoare triple {18549#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18553#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,526 INFO L290 TraceCheckUtils]: 33: Hoare triple {18553#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18557#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:36:53,529 INFO L290 TraceCheckUtils]: 34: Hoare triple {18557#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} is VALID [2022-04-15 06:36:53,529 INFO L290 TraceCheckUtils]: 35: Hoare triple {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} is VALID [2022-04-15 06:36:53,530 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} {18375#true} #672#return; {18376#false} is VALID [2022-04-15 06:36:53,530 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-15 06:36:53,530 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-15 06:36:53,530 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-15 06:36:53,530 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-15 06:36:53,531 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 52: Hoare triple {18376#false} #t~loopctr188 := 0; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 53: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 54: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 55: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 56: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 57: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 58: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 59: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 60: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 61: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 62: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,532 INFO L290 TraceCheckUtils]: 63: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 64: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 65: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 66: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 67: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 68: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 69: Hoare triple {18376#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 70: Hoare triple {18376#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18376#false} {18376#false} #656#return; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-15 06:36:53,533 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-15 06:36:53,534 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 292 proven. 136 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2022-04-15 06:36:53,534 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:36:55,970 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-15 06:36:55,970 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 70: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 69: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 68: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 67: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 66: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 65: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 64: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 63: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 62: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 61: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 60: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,971 INFO L290 TraceCheckUtils]: 59: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 58: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 57: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 56: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 55: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 54: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 53: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 52: Hoare triple {18375#true} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18375#true} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-15 06:36:55,972 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-15 06:36:55,973 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-15 06:36:55,974 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-15 06:36:55,974 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-15 06:36:55,974 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-15 06:36:55,977 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18817#(not (= |#Ultimate.C_memset_#amount| 24))} {18375#true} #672#return; {18376#false} is VALID [2022-04-15 06:36:55,978 INFO L290 TraceCheckUtils]: 35: Hoare triple {18817#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18817#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:55,978 INFO L290 TraceCheckUtils]: 34: Hoare triple {18824#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18817#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-15 06:36:55,981 INFO L290 TraceCheckUtils]: 33: Hoare triple {18828#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18824#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:55,986 INFO L290 TraceCheckUtils]: 32: Hoare triple {18832#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18828#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:55,989 INFO L290 TraceCheckUtils]: 31: Hoare triple {18836#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18832#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:55,993 INFO L290 TraceCheckUtils]: 30: Hoare triple {18840#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18836#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:55,995 INFO L290 TraceCheckUtils]: 29: Hoare triple {18844#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18840#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:55,996 INFO L290 TraceCheckUtils]: 28: Hoare triple {18848#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18844#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:55,998 INFO L290 TraceCheckUtils]: 27: Hoare triple {18852#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18848#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,002 INFO L290 TraceCheckUtils]: 26: Hoare triple {18856#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18852#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,005 INFO L290 TraceCheckUtils]: 25: Hoare triple {18860#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18856#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:56,008 INFO L290 TraceCheckUtils]: 24: Hoare triple {18864#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18860#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,011 INFO L290 TraceCheckUtils]: 23: Hoare triple {18868#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18864#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,014 INFO L290 TraceCheckUtils]: 22: Hoare triple {18872#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18868#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:56,017 INFO L290 TraceCheckUtils]: 21: Hoare triple {18876#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18872#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:56,018 INFO L290 TraceCheckUtils]: 20: Hoare triple {18880#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18876#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-15 06:36:56,020 INFO L290 TraceCheckUtils]: 19: Hoare triple {18884#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18880#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,022 INFO L290 TraceCheckUtils]: 18: Hoare triple {18888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18884#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,022 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} #t~loopctr188 := 0; {18888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-15 06:36:56,022 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18375#true} is VALID [2022-04-15 06:36:56,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-15 06:36:56,022 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-15 06:36:56,023 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-15 06:36:56,024 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18375#true} is VALID [2022-04-15 06:36:56,024 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-15 06:36:56,024 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1294802884] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:36:56,024 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:36:56,024 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20, 20] total 57 [2022-04-15 06:36:56,025 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:36:56,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1346375807] [2022-04-15 06:36:56,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1346375807] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:36:56,025 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:36:56,025 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2022-04-15 06:36:56,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603656442] [2022-04-15 06:36:56,025 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:36:56,025 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-15 06:36:56,026 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:36:56,026 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:36:56,119 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:36:56,119 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-15 06:36:56,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:36:56,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-15 06:36:56,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=731, Invalid=2461, Unknown=0, NotChecked=0, Total=3192 [2022-04-15 06:36:56,121 INFO L87 Difference]: Start difference. First operand 92 states and 114 transitions. Second operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:03,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:03,127 INFO L93 Difference]: Finished difference Result 172 states and 216 transitions. [2022-04-15 06:37:03,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-15 06:37:03,127 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-15 06:37:03,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:37:03,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:03,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-15 06:37:03,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:03,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-15 06:37:03,132 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 198 transitions. [2022-04-15 06:37:03,366 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 198 edges. 198 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:03,368 INFO L225 Difference]: With dead ends: 172 [2022-04-15 06:37:03,368 INFO L226 Difference]: Without dead ends: 97 [2022-04-15 06:37:03,369 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 125 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 545 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=1146, Invalid=4554, Unknown=0, NotChecked=0, Total=5700 [2022-04-15 06:37:03,369 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 281 mSDsCounter, 0 mSdLazyCounter, 1645 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 364 SdHoareTripleChecker+Invalid, 1708 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 1645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2022-04-15 06:37:03,369 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 364 Invalid, 1708 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 1645 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2022-04-15 06:37:03,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-15 06:37:03,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 93. [2022-04-15 06:37:03,427 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:37:03,428 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:03,428 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:03,428 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:03,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:03,429 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-15 06:37:03,429 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-15 06:37:03,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:03,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:03,430 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-15 06:37:03,430 INFO L87 Difference]: Start difference. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-15 06:37:03,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:03,432 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-15 06:37:03,432 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-15 06:37:03,432 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:03,432 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:03,432 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:37:03,433 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:37:03,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:03,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 115 transitions. [2022-04-15 06:37:03,435 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 115 transitions. Word has length 78 [2022-04-15 06:37:03,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:37:03,435 INFO L478 AbstractCegarLoop]: Abstraction has 93 states and 115 transitions. [2022-04-15 06:37:03,435 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:03,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 93 states and 115 transitions. [2022-04-15 06:37:03,673 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:03,674 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 115 transitions. [2022-04-15 06:37:03,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-15 06:37:03,674 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:37:03,674 INFO L499 BasicCegarLoop]: trace histogram [34, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:37:03,704 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-15 06:37:03,875 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-15 06:37:03,875 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:37:03,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:37:03,875 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 33 times [2022-04-15 06:37:03,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:03,876 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [559490716] [2022-04-15 06:37:03,876 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:37:03,876 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 34 times [2022-04-15 06:37:03,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:37:03,876 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896289509] [2022-04-15 06:37:03,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:03,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:37:03,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:03,992 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:37:03,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:03,999 INFO L290 TraceCheckUtils]: 0: Hoare triple {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-15 06:37:03,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-15 06:37:04,000 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-15 06:37:04,002 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:37:04,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:05,126 INFO L290 TraceCheckUtils]: 0: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:37:05,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,137 INFO L290 TraceCheckUtils]: 2: Hoare triple {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:37:05,141 INFO L290 TraceCheckUtils]: 3: Hoare triple {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:05,145 INFO L290 TraceCheckUtils]: 4: Hoare triple {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,149 INFO L290 TraceCheckUtils]: 5: Hoare triple {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:37:05,153 INFO L290 TraceCheckUtils]: 6: Hoare triple {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:37:05,157 INFO L290 TraceCheckUtils]: 7: Hoare triple {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:05,161 INFO L290 TraceCheckUtils]: 8: Hoare triple {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:37:05,165 INFO L290 TraceCheckUtils]: 9: Hoare triple {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,168 INFO L290 TraceCheckUtils]: 10: Hoare triple {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,171 INFO L290 TraceCheckUtils]: 11: Hoare triple {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,175 INFO L290 TraceCheckUtils]: 12: Hoare triple {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,178 INFO L290 TraceCheckUtils]: 13: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:37:05,182 INFO L290 TraceCheckUtils]: 14: Hoare triple {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:37:05,185 INFO L290 TraceCheckUtils]: 15: Hoare triple {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,188 INFO L290 TraceCheckUtils]: 16: Hoare triple {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,191 INFO L290 TraceCheckUtils]: 17: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:37:05,192 INFO L290 TraceCheckUtils]: 18: Hoare triple {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-15 06:37:05,192 INFO L290 TraceCheckUtils]: 19: Hoare triple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-15 06:37:05,193 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19705#true} #672#return; {19706#false} is VALID [2022-04-15 06:37:05,193 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-15 06:37:05,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:05,217 INFO L290 TraceCheckUtils]: 0: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-15 06:37:05,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 3: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 4: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 6: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,218 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 18: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L290 TraceCheckUtils]: 19: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-15 06:37:05,219 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-15 06:37:05,220 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:37:05,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-15 06:37:05,220 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-15 06:37:05,220 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-15 06:37:05,220 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:05,221 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-15 06:37:05,222 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-15 06:37:05,222 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19753#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:37:05,223 INFO L290 TraceCheckUtils]: 17: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:37:05,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,236 INFO L290 TraceCheckUtils]: 19: Hoare triple {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:37:05,242 INFO L290 TraceCheckUtils]: 20: Hoare triple {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:05,246 INFO L290 TraceCheckUtils]: 21: Hoare triple {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,252 INFO L290 TraceCheckUtils]: 22: Hoare triple {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:37:05,257 INFO L290 TraceCheckUtils]: 23: Hoare triple {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:37:05,263 INFO L290 TraceCheckUtils]: 24: Hoare triple {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:05,270 INFO L290 TraceCheckUtils]: 25: Hoare triple {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:37:05,277 INFO L290 TraceCheckUtils]: 26: Hoare triple {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,283 INFO L290 TraceCheckUtils]: 27: Hoare triple {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,290 INFO L290 TraceCheckUtils]: 28: Hoare triple {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,297 INFO L290 TraceCheckUtils]: 29: Hoare triple {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,302 INFO L290 TraceCheckUtils]: 30: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:37:05,308 INFO L290 TraceCheckUtils]: 31: Hoare triple {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:37:05,313 INFO L290 TraceCheckUtils]: 32: Hoare triple {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,318 INFO L290 TraceCheckUtils]: 33: Hoare triple {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:05,321 INFO L290 TraceCheckUtils]: 34: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-15 06:37:05,322 INFO L290 TraceCheckUtils]: 35: Hoare triple {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-15 06:37:05,322 INFO L290 TraceCheckUtils]: 36: Hoare triple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-15 06:37:05,323 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19705#true} #672#return; {19706#false} is VALID [2022-04-15 06:37:05,323 INFO L290 TraceCheckUtils]: 38: Hoare triple {19706#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 39: Hoare triple {19706#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 40: Hoare triple {19706#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 41: Hoare triple {19706#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 42: Hoare triple {19706#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-15 06:37:05,324 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-15 06:37:05,325 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-15 06:37:05,325 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19753#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 53: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 54: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 55: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 56: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 57: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,325 INFO L290 TraceCheckUtils]: 58: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 59: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 60: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 61: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 62: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 63: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 64: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 65: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 66: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 67: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,326 INFO L290 TraceCheckUtils]: 68: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 69: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 70: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 71: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 72: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-15 06:37:05,327 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-15 06:37:05,327 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-15 06:37:05,328 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-15 06:37:05,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:37:05,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896289509] [2022-04-15 06:37:05,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1896289509] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:37:05,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1845339913] [2022-04-15 06:37:05,329 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 06:37:05,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:05,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:37:05,332 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:37:05,336 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-15 06:37:05,674 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 06:37:05,674 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 06:37:05,678 INFO L263 TraceCheckSpWp]: Trace formula consists of 919 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-15 06:37:05,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:05,703 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:37:06,797 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-15 06:37:07,544 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-15 06:37:07,544 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 10 [2022-04-15 06:37:07,708 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19705#true} is VALID [2022-04-15 06:37:07,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-15 06:37:07,709 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-15 06:37:07,710 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19705#true} is VALID [2022-04-15 06:37:07,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:37:07,717 INFO L290 TraceCheckUtils]: 18: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19830#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,721 INFO L290 TraceCheckUtils]: 19: Hoare triple {19830#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19834#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:37:07,725 INFO L290 TraceCheckUtils]: 20: Hoare triple {19834#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19838#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-15 06:37:07,728 INFO L290 TraceCheckUtils]: 21: Hoare triple {19838#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,732 INFO L290 TraceCheckUtils]: 22: Hoare triple {19842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19846#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:37:07,736 INFO L290 TraceCheckUtils]: 23: Hoare triple {19846#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19850#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:37:07,740 INFO L290 TraceCheckUtils]: 24: Hoare triple {19850#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19854#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,747 INFO L290 TraceCheckUtils]: 25: Hoare triple {19854#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19858#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:37:07,751 INFO L290 TraceCheckUtils]: 26: Hoare triple {19858#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19862#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,755 INFO L290 TraceCheckUtils]: 27: Hoare triple {19862#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19866#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,759 INFO L290 TraceCheckUtils]: 28: Hoare triple {19866#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19870#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,763 INFO L290 TraceCheckUtils]: 29: Hoare triple {19870#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19874#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,766 INFO L290 TraceCheckUtils]: 30: Hoare triple {19874#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19878#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:37:07,771 INFO L290 TraceCheckUtils]: 31: Hoare triple {19878#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19882#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:37:07,775 INFO L290 TraceCheckUtils]: 32: Hoare triple {19882#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19886#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,779 INFO L290 TraceCheckUtils]: 33: Hoare triple {19886#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19890#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:07,787 INFO L290 TraceCheckUtils]: 34: Hoare triple {19890#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-15 06:37:07,790 INFO L290 TraceCheckUtils]: 35: Hoare triple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-15 06:37:07,791 INFO L290 TraceCheckUtils]: 36: Hoare triple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-15 06:37:07,793 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} {19705#true} #672#return; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-15 06:37:07,794 INFO L290 TraceCheckUtils]: 38: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-15 06:37:07,794 INFO L290 TraceCheckUtils]: 39: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-15 06:37:07,795 INFO L290 TraceCheckUtils]: 40: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-15 06:37:07,796 INFO L290 TraceCheckUtils]: 41: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19917#|do_discover_list_#t~short164|} is VALID [2022-04-15 06:37:07,796 INFO L290 TraceCheckUtils]: 42: Hoare triple {19917#|do_discover_list_#t~short164|} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-15 06:37:07,796 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-15 06:37:07,796 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-15 06:37:07,796 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 53: Hoare triple {19706#false} #t~loopctr188 := 0; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 54: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,797 INFO L290 TraceCheckUtils]: 55: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 56: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 57: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 58: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 59: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 60: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 61: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 62: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 63: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 64: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,798 INFO L290 TraceCheckUtils]: 65: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 66: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 67: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 68: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 69: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 70: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 71: Hoare triple {19706#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 72: Hoare triple {19706#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19706#false} {19706#false} #656#return; {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-15 06:37:07,799 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-15 06:37:07,800 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-15 06:37:07,800 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-15 06:37:07,800 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-15 06:37:07,800 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-15 06:37:07,800 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 327 proven. 153 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2022-04-15 06:37:07,800 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:37:08,297 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-15 06:37:08,314 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 06:37:09,502 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-15 06:37:09,502 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-15 06:37:09,502 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-15 06:37:09,502 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-15 06:37:09,502 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-15 06:37:09,502 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-15 06:37:09,503 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 72: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 71: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 70: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 69: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 68: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 67: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 66: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 65: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,503 INFO L290 TraceCheckUtils]: 64: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 63: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 62: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 61: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 60: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 59: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 58: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 57: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,504 INFO L290 TraceCheckUtils]: 56: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 55: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 54: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 53: Hoare triple {19705#true} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-15 06:37:09,505 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19705#true} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-15 06:37:09,505 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-15 06:37:09,505 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-15 06:37:09,506 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-15 06:37:09,506 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-15 06:37:09,506 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-15 06:37:09,515 INFO L290 TraceCheckUtils]: 42: Hoare triple {19917#|do_discover_list_#t~short164|} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-15 06:37:09,516 INFO L290 TraceCheckUtils]: 41: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19917#|do_discover_list_#t~short164|} is VALID [2022-04-15 06:37:09,516 INFO L290 TraceCheckUtils]: 40: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-15 06:37:09,517 INFO L290 TraceCheckUtils]: 39: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-15 06:37:09,517 INFO L290 TraceCheckUtils]: 38: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-15 06:37:09,518 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} {19705#true} #672#return; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-15 06:37:09,519 INFO L290 TraceCheckUtils]: 36: Hoare triple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,519 INFO L290 TraceCheckUtils]: 35: Hoare triple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,521 INFO L290 TraceCheckUtils]: 34: Hoare triple {20172#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,521 INFO L290 TraceCheckUtils]: 33: Hoare triple {20176#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 1) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20172#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,522 INFO L290 TraceCheckUtils]: 32: Hoare triple {20180#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 2) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20176#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 1) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,522 INFO L290 TraceCheckUtils]: 31: Hoare triple {20184#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 3) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20180#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 2) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,523 INFO L290 TraceCheckUtils]: 30: Hoare triple {20188#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 4) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20184#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 3) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,524 INFO L290 TraceCheckUtils]: 29: Hoare triple {20192#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 5) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20188#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 4) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,524 INFO L290 TraceCheckUtils]: 28: Hoare triple {20196#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 6) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20192#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 5) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-15 06:37:09,525 INFO L290 TraceCheckUtils]: 27: Hoare triple {20200#(or (= (+ 7 |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20196#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 6) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,525 INFO L290 TraceCheckUtils]: 26: Hoare triple {20204#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 8) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20200#(or (= (+ 7 |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,526 INFO L290 TraceCheckUtils]: 25: Hoare triple {20208#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 9) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20204#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 8) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-15 06:37:09,527 INFO L290 TraceCheckUtils]: 24: Hoare triple {20212#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 10) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20208#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 9) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-15 06:37:09,527 INFO L290 TraceCheckUtils]: 23: Hoare triple {20216#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 11) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20212#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 10) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,528 INFO L290 TraceCheckUtils]: 22: Hoare triple {20220#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 12) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20216#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 11) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,528 INFO L290 TraceCheckUtils]: 21: Hoare triple {20224#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 13) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20220#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 12) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,529 INFO L290 TraceCheckUtils]: 20: Hoare triple {20228#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 14) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20224#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 13) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,530 INFO L290 TraceCheckUtils]: 19: Hoare triple {20232#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 15) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20228#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 14) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,530 INFO L290 TraceCheckUtils]: 18: Hoare triple {20236#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 16) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20232#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 15) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} #t~loopctr188 := 0; {20236#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 16) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-15 06:37:09,531 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:09,531 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-15 06:37:09,532 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19705#true} is VALID [2022-04-15 06:37:09,533 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-15 06:37:09,533 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1845339913] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:37:09,533 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:37:09,534 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 61 [2022-04-15 06:37:09,534 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:37:09,534 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [559490716] [2022-04-15 06:37:09,534 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [559490716] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:37:09,534 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:37:09,534 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-04-15 06:37:09,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526210713] [2022-04-15 06:37:09,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:37:09,535 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-15 06:37:09,535 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:37:09,535 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:09,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:09,628 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 06:37:09,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:09,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 06:37:09,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=3474, Unknown=0, NotChecked=0, Total=3660 [2022-04-15 06:37:09,629 INFO L87 Difference]: Start difference. First operand 93 states and 115 transitions. Second operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:17,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:17,841 INFO L93 Difference]: Finished difference Result 174 states and 218 transitions. [2022-04-15 06:37:17,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-15 06:37:17,842 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-15 06:37:17,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:37:17,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:17,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-15 06:37:17,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:17,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-15 06:37:17,845 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 199 transitions. [2022-04-15 06:37:18,113 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:18,114 INFO L225 Difference]: With dead ends: 174 [2022-04-15 06:37:18,114 INFO L226 Difference]: Without dead ends: 98 [2022-04-15 06:37:18,115 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 126 SyntacticMatches, 1 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 854 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=335, Invalid=6145, Unknown=0, NotChecked=0, Total=6480 [2022-04-15 06:37:18,116 INFO L913 BasicCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1297 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1362 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 1297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-04-15 06:37:18,116 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1362 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [65 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-04-15 06:37:18,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-15 06:37:18,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2022-04-15 06:37:18,168 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:37:18,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:18,168 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:18,168 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:18,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:18,169 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-15 06:37:18,169 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-15 06:37:18,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:18,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:18,170 INFO L74 IsIncluded]: Start isIncluded. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-15 06:37:18,170 INFO L87 Difference]: Start difference. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-15 06:37:18,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:37:18,172 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-15 06:37:18,172 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-15 06:37:18,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:37:18,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:37:18,172 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:37:18,172 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:37:18,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 06:37:18,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 116 transitions. [2022-04-15 06:37:18,174 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 116 transitions. Word has length 80 [2022-04-15 06:37:18,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:37:18,174 INFO L478 AbstractCegarLoop]: Abstraction has 94 states and 116 transitions. [2022-04-15 06:37:18,175 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-15 06:37:18,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 94 states and 116 transitions. [2022-04-15 06:37:18,497 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:37:18,497 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 116 transitions. [2022-04-15 06:37:18,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-04-15 06:37:18,498 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:37:18,498 INFO L499 BasicCegarLoop]: trace histogram [36, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:37:18,516 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-15 06:37:18,698 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:18,699 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:37:18,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:37:18,699 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 35 times [2022-04-15 06:37:18,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:37:18,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1919261656] [2022-04-15 06:37:18,699 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 06:37:18,700 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 36 times [2022-04-15 06:37:18,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:37:18,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973416196] [2022-04-15 06:37:18,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:37:18,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:37:18,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:18,808 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:37:18,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:18,816 INFO L290 TraceCheckUtils]: 0: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-15 06:37:18,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-15 06:37:18,817 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-15 06:37:18,819 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 06:37:18,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:20,538 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:37:20,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,555 INFO L290 TraceCheckUtils]: 2: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:37:20,561 INFO L290 TraceCheckUtils]: 3: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:20,565 INFO L290 TraceCheckUtils]: 4: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,572 INFO L290 TraceCheckUtils]: 5: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:37:20,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:37:20,583 INFO L290 TraceCheckUtils]: 7: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:20,590 INFO L290 TraceCheckUtils]: 8: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:37:20,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,602 INFO L290 TraceCheckUtils]: 10: Hoare triple {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,609 INFO L290 TraceCheckUtils]: 11: Hoare triple {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,616 INFO L290 TraceCheckUtils]: 12: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,622 INFO L290 TraceCheckUtils]: 13: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:37:20,629 INFO L290 TraceCheckUtils]: 14: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:37:20,635 INFO L290 TraceCheckUtils]: 15: Hoare triple {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,644 INFO L290 TraceCheckUtils]: 16: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,653 INFO L290 TraceCheckUtils]: 17: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-15 06:37:20,662 INFO L290 TraceCheckUtils]: 18: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:37:20,665 INFO L290 TraceCheckUtils]: 19: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-15 06:37:20,665 INFO L290 TraceCheckUtils]: 20: Hoare triple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-15 06:37:20,666 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-15 06:37:20,666 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-04-15 06:37:20,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 3: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 4: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,685 INFO L290 TraceCheckUtils]: 6: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,686 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L290 TraceCheckUtils]: 16: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L290 TraceCheckUtils]: 17: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L290 TraceCheckUtils]: 18: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L290 TraceCheckUtils]: 19: Hoare triple {21063#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L290 TraceCheckUtils]: 20: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-15 06:37:20,687 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-15 06:37:20,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {21063#true} call ULTIMATE.init(); {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:37:20,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-15 06:37:20,688 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-15 06:37:20,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-15 06:37:20,688 INFO L272 TraceCheckUtils]: 4: Hoare triple {21063#true} call #t~ret187 := main(); {21063#true} is VALID [2022-04-15 06:37:20,688 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L272 TraceCheckUtils]: 6: Hoare triple {21063#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {21063#true} is VALID [2022-04-15 06:37:20,689 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {21063#true} is VALID [2022-04-15 06:37:20,690 INFO L272 TraceCheckUtils]: 16: Hoare triple {21063#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:37:20,691 INFO L290 TraceCheckUtils]: 17: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-15 06:37:20,701 INFO L290 TraceCheckUtils]: 18: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,710 INFO L290 TraceCheckUtils]: 19: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-15 06:37:20,720 INFO L290 TraceCheckUtils]: 20: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:20,726 INFO L290 TraceCheckUtils]: 21: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,735 INFO L290 TraceCheckUtils]: 22: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-15 06:37:20,744 INFO L290 TraceCheckUtils]: 23: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-15 06:37:20,753 INFO L290 TraceCheckUtils]: 24: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-15 06:37:20,762 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-15 06:37:20,771 INFO L290 TraceCheckUtils]: 26: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,777 INFO L290 TraceCheckUtils]: 27: Hoare triple {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,786 INFO L290 TraceCheckUtils]: 28: Hoare triple {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,796 INFO L290 TraceCheckUtils]: 29: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,805 INFO L290 TraceCheckUtils]: 30: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-15 06:37:20,814 INFO L290 TraceCheckUtils]: 31: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-15 06:37:20,823 INFO L290 TraceCheckUtils]: 32: Hoare triple {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,832 INFO L290 TraceCheckUtils]: 33: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-15 06:37:20,842 INFO L290 TraceCheckUtils]: 34: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-15 06:37:20,852 INFO L290 TraceCheckUtils]: 35: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-15 06:37:20,855 INFO L290 TraceCheckUtils]: 36: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-15 06:37:20,855 INFO L290 TraceCheckUtils]: 37: Hoare triple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-15 06:37:20,856 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-15 06:37:20,856 INFO L290 TraceCheckUtils]: 39: Hoare triple {21064#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {21064#false} is VALID [2022-04-15 06:37:20,856 INFO L290 TraceCheckUtils]: 40: Hoare triple {21064#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 41: Hoare triple {21064#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 42: Hoare triple {21064#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 43: Hoare triple {21064#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 44: Hoare triple {21064#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 45: Hoare triple {21064#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 46: Hoare triple {21064#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 47: Hoare triple {21064#false} assume #t~short172; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 48: Hoare triple {21064#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 49: Hoare triple {21064#false} assume 0 != #t~mem173;havoc #t~mem173; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L272 TraceCheckUtils]: 50: Hoare triple {21064#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 51: Hoare triple {21064#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 52: Hoare triple {21064#false} assume !(~len <= 0); {21064#false} is VALID [2022-04-15 06:37:20,857 INFO L272 TraceCheckUtils]: 53: Hoare triple {21064#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-15 06:37:20,857 INFO L290 TraceCheckUtils]: 54: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 55: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 56: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 57: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 58: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 59: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 60: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 61: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 62: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 63: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 64: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 65: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 66: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 67: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,858 INFO L290 TraceCheckUtils]: 68: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 69: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 70: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 71: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 72: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 73: Hoare triple {21063#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 74: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-15 06:37:20,859 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 76: Hoare triple {21064#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 77: Hoare triple {21064#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L272 TraceCheckUtils]: 78: Hoare triple {21064#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 79: Hoare triple {21064#false} ~cond := #in~cond; {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 80: Hoare triple {21064#false} assume 0 == ~cond; {21064#false} is VALID [2022-04-15 06:37:20,859 INFO L290 TraceCheckUtils]: 81: Hoare triple {21064#false} assume !false; {21064#false} is VALID [2022-04-15 06:37:20,860 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 0 proven. 534 refuted. 0 times theorem prover too weak. 172 trivial. 0 not checked. [2022-04-15 06:37:20,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:37:20,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973416196] [2022-04-15 06:37:20,860 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973416196] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:37:20,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [570076738] [2022-04-15 06:37:20,860 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 06:37:20,860 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:37:20,861 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:37:20,861 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:37:20,864 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process