/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 11:31:03,749 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 11:31:03,750 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 11:31:03,798 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-15 11:31:03,799 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-15 11:31:03,800 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-15 11:31:03,802 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-15 11:31:03,808 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-15 11:31:03,809 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-15 11:31:03,809 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-15 11:31:03,810 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-15 11:31:03,811 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-15 11:31:03,811 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 11:31:03,812 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 11:31:03,813 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 11:31:03,814 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 11:31:03,814 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 11:31:03,815 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 11:31:03,816 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 11:31:03,817 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 11:31:03,818 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 11:31:03,820 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 11:31:03,820 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 11:31:03,821 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 11:31:03,822 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 11:31:03,824 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 11:31:03,830 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 11:31:03,830 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 11:31:03,836 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 11:31:03,836 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-15 11:31:03,847 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 11:31:03,848 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 11:31:03,849 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 11:31:03,849 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 11:31:03,850 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 11:31:03,850 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 11:31:03,850 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-15 11:31:03,851 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-15 11:31:03,851 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-15 11:31:03,851 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 11:31:03,851 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-15 11:31:03,851 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 11:31:04,047 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 11:31:04,065 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 11:31:04,067 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 11:31:04,068 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 11:31:04,068 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 11:31:04,069 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-15 11:31:04,134 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/48e54ef6f/aff5d31fe1d147bda7f7d82a1fde47b1/FLAGae966a2da [2022-04-15 11:31:04,823 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 11:31:04,824 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-15 11:31:04,873 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/48e54ef6f/aff5d31fe1d147bda7f7d82a1fde47b1/FLAGae966a2da [2022-04-15 11:31:04,935 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/48e54ef6f/aff5d31fe1d147bda7f7d82a1fde47b1 [2022-04-15 11:31:04,937 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 11:31:04,938 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-15 11:31:04,939 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 11:31:04,939 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 11:31:04,946 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 11:31:04,947 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 11:31:04" (1/1) ... [2022-04-15 11:31:04,950 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@275d1363 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:04, skipping insertion in model container [2022-04-15 11:31:04,950 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 11:31:04" (1/1) ... [2022-04-15 11:31:04,956 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 11:31:05,063 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 11:31:05,905 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-15 11:31:06,618 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 11:31:06,650 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 11:31:06,721 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-15 11:31:07,049 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 11:31:07,116 INFO L208 MainTranslator]: Completed translation [2022-04-15 11:31:07,117 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07 WrapperNode [2022-04-15 11:31:07,117 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 11:31:07,118 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 11:31:07,119 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 11:31:07,119 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 11:31:07,128 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,129 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,220 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,221 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,409 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,444 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,472 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,507 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 11:31:07,509 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 11:31:07,509 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 11:31:07,509 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 11:31:07,510 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (1/1) ... [2022-04-15 11:31:07,515 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 11:31:07,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:31:07,541 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 11:31:07,548 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~TO~VOID [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-15 11:31:07,574 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_guard [2022-04-15 11:31:07,575 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlIntegerToUnicodeString [2022-04-15 11:31:07,575 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlUnicodeStringToInteger [2022-04-15 11:31:07,575 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareUnicodeString [2022-04-15 11:31:07,576 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAppendUnicodeStringToString [2022-04-15 11:31:07,576 INFO L138 BoogieDeclarations]: Found implementation of procedure READ_PORT_UCHAR [2022-04-15 11:31:07,576 INFO L138 BoogieDeclarations]: Found implementation of procedure WRITE_PORT_UCHAR [2022-04-15 11:31:07,576 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedIncrement [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedDecrement [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedExchange [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeDpc [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInsertQueueDpc [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSynchronizeExecution [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTimeIncrement [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireCancelSpinLock [2022-04-15 11:31:07,577 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateErrorLogEntry [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoConnectInterrupt [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReportResourceUsage [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoInitializeRemoveLockEx [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockEx [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockAndWaitEx [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWriteErrorLogEntry [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWMIRegistrationControl [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure IoOpenDeviceRegistryKey [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure KeStallExecutionProcessor [2022-04-15 11:31:07,578 INFO L138 BoogieDeclarations]: Found implementation of procedure PoRequestPowerIrp [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PoSetPowerState [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfReferenceObject [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwQueryValueKey [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwSetValueKey [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiCompleteRequest [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure errorFn [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCleanup [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpPnpIrpInfo [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLock [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLock [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLockAndWait [2022-04-15 11:31:07,579 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceList [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceRequirementsList [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLogError [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure DriverEntry [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptUnload [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCleanRemovalRelationsList [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAddPptRemovalRelation [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRemovePptRemovalRelation [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpRemovalRelationsList [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpPptRemovalRelationsStruct [2022-04-15 11:31:07,580 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchInternalDeviceControl [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsNecR98Machine [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCreate [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchClose [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitiate1284_3 [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectDevice [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectDevice [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure Ppt1284_3AssignAddress [2022-04-15 11:31:07,581 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfNon1284_3Present [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStl1284_3 [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStlProductId [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSend1284_3Command [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectChipFilter [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortType [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortCapabilities [2022-04-15 11:31:07,582 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEcpPort [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfUserRequested [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPort [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectBytePort [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoDepth [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoWidth [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetChipMode [2022-04-15 11:31:07,583 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearChipMode [2022-04-15 11:31:07,584 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrSetMode [2022-04-15 11:31:07,584 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetByteMode [2022-04-15 11:31:07,584 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearByteMode [2022-04-15 11:31:07,584 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckByteMode [2022-04-15 11:31:07,584 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrClearMode [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFindNatChip [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildResourceList [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBuildRemovalRelations [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanPciCardCmResourceList [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsPci [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCompleteRequest [2022-04-15 11:31:07,585 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpInitDispatchFunctionTable [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpAddDevice [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPnp [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartDevice [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanCmResourceList [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartValidateResources [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterResourceRequirements [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-15 11:31:07,586 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryDeviceRelations [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryStopDevice [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelStopDevice [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStopDevice [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryRemoveDevice [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelRemoveDevice [2022-04-15 11:31:07,587 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpRemoveDevice [2022-04-15 11:31:07,588 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpSurpriseRemoval [2022-04-15 11:31:07,588 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-15 11:31:07,588 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBounceAndCatchPnpIrp [2022-04-15 11:31:07,588 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-15 11:31:07,588 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpUnhandledIrp [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPowerComplete [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure InitNEC_98 [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPower [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockDiskModeByte [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockPrtModeByte [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipSetDiskMode [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipCheckDevice [2022-04-15 11:31:07,589 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectLegacyZip [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectLegacyZip [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegInitDriverSettings [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegGetDeviceParameterDword [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegSetDeviceParameterDword [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFailRequest [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLockOrFailIrp [2022-04-15 11:31:07,590 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPreProcessIrp [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPostProcessIrp [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchCompletionRoutine [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptConnectInterrupt [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDisconnectInterrupt [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedIncrement [2022-04-15 11:31:07,591 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDecrement [2022-04-15 11:31:07,592 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedRead [2022-04-15 11:31:07,593 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedQueue [2022-04-15 11:31:07,593 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDisconnect [2022-04-15 11:31:07,595 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCancelRoutine [2022-04-15 11:31:07,596 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortDpc [2022-04-15 11:31:07,600 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePortAtInterruptLevel [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortFromInterruptLevel [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInterruptService [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePort [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTraversePortCheckList [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePort [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptQueryNumWaiters [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetCancelRoutine [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTickCount [2022-04-15 11:31:07,601 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckPort [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildParallelPortDeviceName [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitializeDeviceExtension [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNumberFromLptName [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildDeviceObject [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiInitWmi [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchSystemControl [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiRegInfo [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiDataBlock [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure _BLAST_init [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure stub_driver_init [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAcquireFastMutex [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ExReleaseFastMutex [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAllocatePoolWithTag [2022-04-15 11:31:07,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ExFreePool [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertHeadList [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertTailList [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedRemoveHeadList [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateMdl [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAttachDeviceToDeviceStack [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildAsynchronousFsdRequest [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildDeviceIoControlRequest [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateDevice [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateSymbolicLink [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteDevice [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteSymbolicLink [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDetachDevice [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeIrp [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeMdl [2022-04-15 11:31:07,603 INFO L138 BoogieDeclarations]: Found implementation of procedure IoGetConfigurationInformation [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IoQueryDeviceDescription [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IoRegisterDeviceInterface [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseCancelSpinLock [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetDeviceInterfaceState [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetHardErrorOrVerifyDevice [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure stubMoreProcessingRequired [2022-04-15 11:31:07,604 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCallDriver [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCompleteRequest [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeAcquireSpinLockRaiseToDpc [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeDelayExecutionThread [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeEvent [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSemaphore [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSpinLock [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeReleaseSemaphore [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KfReleaseSpinLock [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSetEvent [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure KeWaitForSingleObject [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure MmAllocateContiguousMemory [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure MmFreeContiguousMemory [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure MmMapLockedPagesSpecifyCache [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure MmPageEntireDriver [2022-04-15 11:31:07,605 INFO L138 BoogieDeclarations]: Found implementation of procedure MmResetDriverPaging [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure MmUnlockPages [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure ObReferenceObjectByHandle [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfDereferenceObject [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure PoCallDriver [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure PoStartNextPowerIrp [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure PsCreateSystemThread [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure PsTerminateSystemThread [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAnsiStringToUnicodeString [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareMemory [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCopyUnicodeString [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlDeleteRegistryValue [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlFreeUnicodeString [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitString [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitUnicodeString [2022-04-15 11:31:07,606 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlQueryRegistryValues [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwClose [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiSystemControl [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireRemoveLockEx [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-04-15 11:31:07,607 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-15 11:31:07,607 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_short [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_long [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_guard [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-15 11:31:07,608 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure memmove [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlQueryRegistryValues [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlDeleteRegistryValue [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlIntegerToUnicodeString [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlUnicodeStringToInteger [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitString [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitUnicodeString [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAnsiStringToUnicodeString [2022-04-15 11:31:07,609 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareUnicodeString [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCopyUnicodeString [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAppendUnicodeStringToString [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure RtlFreeUnicodeString [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareMemory [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure READ_PORT_UCHAR [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure WRITE_PORT_UCHAR [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedIncrement [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedDecrement [2022-04-15 11:31:07,610 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedExchange [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeDpc [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeInsertQueueDpc [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeSynchronizeExecution [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeEvent [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeSetEvent [2022-04-15 11:31:07,611 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSemaphore [2022-04-15 11:31:07,612 INFO L130 BoogieDeclarations]: Found specification of procedure KeReleaseSemaphore [2022-04-15 11:31:07,615 INFO L130 BoogieDeclarations]: Found specification of procedure KeDelayExecutionThread [2022-04-15 11:31:07,615 INFO L130 BoogieDeclarations]: Found specification of procedure KeWaitForSingleObject [2022-04-15 11:31:07,616 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSpinLock [2022-04-15 11:31:07,616 INFO L130 BoogieDeclarations]: Found specification of procedure KfReleaseSpinLock [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTimeIncrement [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExAllocatePoolWithTag [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExFreePool [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExAcquireFastMutex [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExReleaseFastMutex [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertHeadList [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertTailList [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedRemoveHeadList [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure MmUnlockPages [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure MmMapLockedPagesSpecifyCache [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure MmAllocateContiguousMemory [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure MmFreeContiguousMemory [2022-04-15 11:31:07,617 INFO L130 BoogieDeclarations]: Found specification of procedure MmResetDriverPaging [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure MmPageEntireDriver [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure PsCreateSystemThread [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure PsTerminateSystemThread [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireCancelSpinLock [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateErrorLogEntry [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateMdl [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoAttachDeviceToDeviceStack [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildAsynchronousFsdRequest [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildDeviceIoControlRequest [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IofCallDriver [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IofCompleteRequest [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure IoConnectInterrupt [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-15 11:31:07,618 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateDevice [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateSymbolicLink [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteDevice [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteSymbolicLink [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoDetachDevice [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeIrp [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeMdl [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoGetConfigurationInformation [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoQueryDeviceDescription [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseCancelSpinLock [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoReportResourceUsage [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetHardErrorOrVerifyDevice [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoInitializeRemoveLockEx [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireRemoveLockEx [2022-04-15 11:31:07,619 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockEx [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockAndWaitEx [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoWriteErrorLogEntry [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoWMIRegistrationControl [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoOpenDeviceRegistryKey [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoRegisterDeviceInterface [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetDeviceInterfaceState [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure KeStallExecutionProcessor [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure PoRequestPowerIrp [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure PoSetPowerState [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure PoCallDriver [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure PoStartNextPowerIrp [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure ObReferenceObjectByHandle [2022-04-15 11:31:07,620 INFO L130 BoogieDeclarations]: Found specification of procedure ObfReferenceObject [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure ObfDereferenceObject [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure ZwClose [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure ZwQueryValueKey [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure ZwSetValueKey [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure WmiCompleteRequest [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure WmiSystemControl [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptCompleteRequest [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure errorFn [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiInitWmi [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchSystemControl [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpInitDispatchFunctionTable [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpAddDevice [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPnp [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptFailRequest [2022-04-15 11:31:07,621 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPreProcessIrp [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPostProcessIrp [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure DriverEntry [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptUnload [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchCompletionRoutine [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptLogError [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptConnectInterrupt [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptDisconnectInterrupt [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCreate [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchClose [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedIncrement [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDecrement [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedRead [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedQueue [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDisconnect [2022-04-15 11:31:07,622 INFO L130 BoogieDeclarations]: Found specification of procedure PptCancelRoutine [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortDpc [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePortAtInterruptLevel [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortFromInterruptLevel [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptInterruptService [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePort [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptTraversePortCheckList [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePort [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptQueryNumWaiters [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchInternalDeviceControl [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCleanup [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsNecR98Machine [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPower [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegInitDriverSettings [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetCancelRoutine [2022-04-15 11:31:07,623 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLockOrFailIrp [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpPnpIrpInfo [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLock [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLock [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLockAndWait [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceList [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceRequirementsList [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectChipFilter [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortType [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetChipMode [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearChipMode [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitiate1284_3 [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectDevice [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectDevice [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure Ppt1284_3AssignAddress [2022-04-15 11:31:07,624 INFO L130 BoogieDeclarations]: Found specification of procedure PptSend1284_3Command [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectLegacyZip [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectLegacyZip [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpRemovalRelationsList [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegGetDeviceParameterDword [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegSetDeviceParameterDword [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildParallelPortDeviceName [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitializeDeviceExtension [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNumberFromLptName [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildDeviceObject [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPort [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptCleanRemovalRelationsList [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure CheckPort [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-15 11:31:07,625 INFO L130 BoogieDeclarations]: Found specification of procedure PptAddPptRemovalRelation [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptRemovePptRemovalRelation [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpPptRemovalRelationsStruct [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStl1284_3 [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfNon1284_3Present [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStlProductId [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortCapabilities [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEcpPort [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-15 11:31:07,626 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfUserRequested [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectBytePort [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoDepth [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoWidth [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrSetMode [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrClearMode [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptFindNatChip [2022-04-15 11:31:07,627 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildResourceList [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetByteMode [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearByteMode [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckByteMode [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterResourceRequirements [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryDeviceRelations [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryStopDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelStopDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStopDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryRemoveDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelRemoveDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpRemoveDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpSurpriseRemoval [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpUnhandledIrp [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartDevice [2022-04-15 11:31:07,628 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartValidateResources [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanCmResourceList [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBounceAndCatchPnpIrp [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBuildRemovalRelations [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanPciCardCmResourceList [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsPci [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptPowerComplete [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure InitNEC_98 [2022-04-15 11:31:07,629 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockDiskModeByte [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockPrtModeByte [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipSetDiskMode [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipCheckDevice [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~TO~VOID [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTickCount [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiRegInfo [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiDataBlock [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure _BLAST_init [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure stub_driver_init [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure stubMoreProcessingRequired [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure KeAcquireSpinLockRaiseToDpc [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 11:31:07,630 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-04-15 11:31:07,631 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-04-15 11:31:08,488 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 11:31:08,492 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 11:31:08,521 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:08,543 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:08,544 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:08,728 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:08,938 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume !false; [2022-04-15 11:31:08,938 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##7: assume false; [2022-04-15 11:31:08,956 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:08,986 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-15 11:31:08,987 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-15 11:31:08,987 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,000 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:09,001 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:09,138 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,181 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume false; [2022-04-15 11:31:09,181 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##10: assume !false; [2022-04-15 11:31:09,181 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,191 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:09,191 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:09,439 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,458 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:09,458 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:09,567 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,589 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-15 11:31:09,589 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-15 11:31:09,632 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,694 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-15 11:31:09,694 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-15 11:31:09,695 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,708 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-15 11:31:09,711 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-15 11:31:09,735 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:09,741 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:09,741 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:09,997 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:13,612 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##39: assume !false; [2022-04-15 11:31:13,613 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##38: assume false; [2022-04-15 11:31:15,736 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:15,742 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:15,742 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:15,854 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:15,854 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:16,373 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume !false; [2022-04-15 11:31:16,373 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume !false; [2022-04-15 11:31:16,373 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##25: assume false; [2022-04-15 11:31:16,373 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19: assume false; [2022-04-15 11:31:16,691 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:16,696 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:16,697 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:16,891 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:16,903 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:16,903 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,235 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,240 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,240 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,241 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,252 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,252 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,284 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,291 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,291 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,291 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,297 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,297 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,297 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,310 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,311 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,482 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,487 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,487 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,495 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,500 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,500 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,578 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,584 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,584 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:17,603 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:17,608 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:17,608 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:18,101 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:18,106 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:18,106 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:18,116 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:18,155 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##6: assume !false; [2022-04-15 11:31:18,156 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##5: assume false; [2022-04-15 11:31:18,161 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:18,369 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##31: assume !false; [2022-04-15 11:31:18,369 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##30: assume false; [2022-04-15 11:31:18,708 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:18,714 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:18,714 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:18,874 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:18,923 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##21: assume !false; [2022-04-15 11:31:18,923 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume false; [2022-04-15 11:31:19,024 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:21,548 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-15 11:31:21,548 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-15 11:31:21,624 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:21,664 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-15 11:31:21,665 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-15 11:31:21,665 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:21,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-15 11:31:21,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-15 11:31:21,722 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:21,732 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-15 11:31:21,732 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-15 11:31:21,917 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:21,922 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-15 11:31:21,922 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-15 11:31:22,143 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-15 11:31:22,168 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##12: assume !false; [2022-04-15 11:31:22,168 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##11: assume false; [2022-04-15 11:31:22,253 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 11:31:22,278 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 11:31:22,282 INFO L299 CfgBuilder]: Removed 38 assume(true) statements. [2022-04-15 11:31:22,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 11:31:22 BoogieIcfgContainer [2022-04-15 11:31:22,286 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 11:31:22,287 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 11:31:22,287 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 11:31:22,290 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 11:31:22,290 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 11:31:04" (1/3) ... [2022-04-15 11:31:22,291 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@393dc24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 11:31:22, skipping insertion in model container [2022-04-15 11:31:22,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 11:31:07" (2/3) ... [2022-04-15 11:31:22,291 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@393dc24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 11:31:22, skipping insertion in model container [2022-04-15 11:31:22,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 11:31:22" (3/3) ... [2022-04-15 11:31:22,292 INFO L111 eAbstractionObserver]: Analyzing ICFG parport.i.cil-2.c [2022-04-15 11:31:22,296 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-15 11:31:22,296 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 11:31:22,344 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 11:31:22,355 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 11:31:22,355 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 11:31:22,423 INFO L276 IsEmpty]: Start isEmpty. Operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) [2022-04-15 11:31:22,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 11:31:22,430 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:31:22,431 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:31:22,431 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:31:22,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:31:22,436 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 1 times [2022-04-15 11:31:22,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:31:22,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1225690593] [2022-04-15 11:31:22,454 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 11:31:22,454 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 2 times [2022-04-15 11:31:22,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:31:22,457 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478910903] [2022-04-15 11:31:22,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:31:22,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:31:22,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:31:23,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:31:23,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:31:23,150 INFO L290 TraceCheckUtils]: 0: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-15 11:31:23,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-15 11:31:23,151 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-15 11:31:23,183 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-15 11:31:23,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:31:23,198 INFO L290 TraceCheckUtils]: 0: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-15 11:31:23,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-15 11:31:23,198 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-15 11:31:23,203 INFO L272 TraceCheckUtils]: 0: Hoare triple {2253#true} call ULTIMATE.init(); {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:31:23,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-15 11:31:23,203 INFO L290 TraceCheckUtils]: 2: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-15 11:31:23,203 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-15 11:31:23,203 INFO L272 TraceCheckUtils]: 4: Hoare triple {2253#true} call #t~ret1155 := main(); {2253#true} is VALID [2022-04-15 11:31:23,204 INFO L290 TraceCheckUtils]: 5: Hoare triple {2253#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {2258#(= main_~i~24 0)} is VALID [2022-04-15 11:31:23,205 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#(= main_~i~24 0)} assume !(~i~24 < 4); {2254#false} is VALID [2022-04-15 11:31:23,205 INFO L290 TraceCheckUtils]: 7: Hoare triple {2254#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {2254#false} is VALID [2022-04-15 11:31:23,205 INFO L272 TraceCheckUtils]: 8: Hoare triple {2254#false} call _BLAST_init(); {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:31:23,205 INFO L290 TraceCheckUtils]: 9: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-15 11:31:23,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-15 11:31:23,206 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-15 11:31:23,206 INFO L290 TraceCheckUtils]: 12: Hoare triple {2254#false} assume !(~status~31 >= 0); {2254#false} is VALID [2022-04-15 11:31:23,206 INFO L290 TraceCheckUtils]: 13: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-15 11:31:23,206 INFO L290 TraceCheckUtils]: 14: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-15 11:31:23,206 INFO L290 TraceCheckUtils]: 15: Hoare triple {2254#false} assume !(~s~0 == ~UNLOADED~0); {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L290 TraceCheckUtils]: 16: Hoare triple {2254#false} assume !(-1 == ~status~31); {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L290 TraceCheckUtils]: 17: Hoare triple {2254#false} assume !(~s~0 != ~SKIP2~0); {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L290 TraceCheckUtils]: 18: Hoare triple {2254#false} assume 1 == ~pended~0; {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L290 TraceCheckUtils]: 19: Hoare triple {2254#false} assume 259 != ~status~31; {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L272 TraceCheckUtils]: 20: Hoare triple {2254#false} call errorFn(); {2254#false} is VALID [2022-04-15 11:31:23,207 INFO L290 TraceCheckUtils]: 21: Hoare triple {2254#false} assume !false; {2254#false} is VALID [2022-04-15 11:31:23,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:31:23,209 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:31:23,209 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478910903] [2022-04-15 11:31:23,209 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1478910903] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:31:23,209 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:31:23,210 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 11:31:23,212 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:31:23,212 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1225690593] [2022-04-15 11:31:23,212 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1225690593] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:31:23,212 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:31:23,212 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 11:31:23,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951757523] [2022-04-15 11:31:23,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:31:23,217 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-15 11:31:23,218 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:31:23,220 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 11:31:23,259 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:31:23,259 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 11:31:23,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:31:23,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 11:31:23,276 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-15 11:31:23,285 INFO L87 Difference]: Start difference. First operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 11:31:33,011 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.10s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-15 11:31:37,517 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-15 11:31:46,648 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-15 11:32:03,691 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-15 11:32:28,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:32:28,964 INFO L93 Difference]: Finished difference Result 4216 states and 6551 transitions. [2022-04-15 11:32:28,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 11:32:28,965 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-15 11:32:28,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:32:28,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 11:32:29,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-15 11:32:29,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 11:32:29,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-15 11:32:29,837 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 6551 transitions. [2022-04-15 11:32:42,205 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6551 edges. 6551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:32:42,668 INFO L225 Difference]: With dead ends: 4216 [2022-04-15 11:32:42,668 INFO L226 Difference]: Without dead ends: 2226 [2022-04-15 11:32:42,683 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-15 11:32:42,686 INFO L913 BasicCegarLoop]: 2421 mSDtfsCounter, 3234 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 3763 mSolverCounterSat, 1561 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 27.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3637 SdHoareTripleChecker+Valid, 2782 SdHoareTripleChecker+Invalid, 5327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1561 IncrementalHoareTripleChecker+Valid, 3763 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 27.1s IncrementalHoareTripleChecker+Time [2022-04-15 11:32:42,687 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3637 Valid, 2782 Invalid, 5327 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1561 Valid, 3763 Invalid, 3 Unknown, 0 Unchecked, 27.1s Time] [2022-04-15 11:32:42,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2226 states. [2022-04-15 11:32:43,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2226 to 1985. [2022-04-15 11:32:43,186 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:32:43,206 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:32:43,212 INFO L74 IsIncluded]: Start isIncluded. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:32:43,221 INFO L87 Difference]: Start difference. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:32:43,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:32:43,484 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-15 11:32:43,485 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-15 11:32:43,505 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:32:43,505 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:32:43,513 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-15 11:32:43,520 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-15 11:32:43,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:32:43,782 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-15 11:32:43,782 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-15 11:32:43,791 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:32:43,791 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:32:43,791 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:32:43,791 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:32:43,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:32:44,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2849 transitions. [2022-04-15 11:32:44,197 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2849 transitions. Word has length 22 [2022-04-15 11:32:44,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:32:44,197 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2849 transitions. [2022-04-15 11:32:44,197 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 11:32:44,197 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2849 transitions. [2022-04-15 11:32:52,067 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2849 edges. 2849 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:32:52,067 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2849 transitions. [2022-04-15 11:32:52,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-15 11:32:52,068 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:32:52,068 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:32:52,068 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 11:32:52,068 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:32:52,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:32:52,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 1 times [2022-04-15 11:32:52,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:32:52,069 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [76678211] [2022-04-15 11:32:52,100 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:32:52,100 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:32:52,100 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:32:52,100 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 2 times [2022-04-15 11:32:52,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:32:52,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996480024] [2022-04-15 11:32:52,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:32:52,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:32:52,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:32:52,417 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:32:52,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:32:52,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-15 11:32:52,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-15 11:32:52,485 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-15 11:32:52,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:32:52,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:32:52,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-15 11:32:52,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-15 11:32:52,528 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-15 11:32:52,534 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:32:52,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-15 11:32:52,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-15 11:32:52,535 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-15 11:32:52,535 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-15 11:32:52,535 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19125#(= main_~i~24 0)} is VALID [2022-04-15 11:32:52,536 INFO L290 TraceCheckUtils]: 6: Hoare triple {19125#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19125#(= main_~i~24 0)} is VALID [2022-04-15 11:32:52,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {19125#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19126#(<= main_~i~24 1)} is VALID [2022-04-15 11:32:52,537 INFO L290 TraceCheckUtils]: 8: Hoare triple {19126#(<= main_~i~24 1)} assume !(~i~24 < 4); {19121#false} is VALID [2022-04-15 11:32:52,537 INFO L290 TraceCheckUtils]: 9: Hoare triple {19121#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19121#false} is VALID [2022-04-15 11:32:52,537 INFO L272 TraceCheckUtils]: 10: Hoare triple {19121#false} call _BLAST_init(); {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:32:52,537 INFO L290 TraceCheckUtils]: 11: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-15 11:32:52,538 INFO L290 TraceCheckUtils]: 12: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-15 11:32:52,538 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-15 11:32:52,541 INFO L290 TraceCheckUtils]: 14: Hoare triple {19121#false} assume !(~status~31 >= 0); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 15: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 16: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 17: Hoare triple {19121#false} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-15 11:32:52,542 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-15 11:32:52,543 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-15 11:32:52,543 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-15 11:32:52,544 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:32:52,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:32:52,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996480024] [2022-04-15 11:32:52,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1996480024] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:32:52,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1645886598] [2022-04-15 11:32:52,545 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:32:52,546 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:32:52,546 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:32:52,551 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:32:52,574 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 11:32:53,271 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:32:53,272 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:32:53,277 INFO L263 TraceCheckSpWp]: Trace formula consists of 1266 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-15 11:32:53,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:32:53,311 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:32:53,387 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19120#true} is VALID [2022-04-15 11:32:53,388 INFO L290 TraceCheckUtils]: 6: Hoare triple {19120#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19120#true} is VALID [2022-04-15 11:32:53,389 INFO L290 TraceCheckUtils]: 7: Hoare triple {19120#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19120#true} is VALID [2022-04-15 11:32:53,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {19120#true} assume !(~i~24 < 4); {19120#true} is VALID [2022-04-15 11:32:53,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {19120#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19120#true} is VALID [2022-04-15 11:32:53,389 INFO L272 TraceCheckUtils]: 10: Hoare triple {19120#true} call _BLAST_init(); {19120#true} is VALID [2022-04-15 11:32:53,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {19120#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,390 INFO L290 TraceCheckUtils]: 12: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume true; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,391 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19168#(= ~s~0 ~UNLOADED~0)} {19120#true} #6457#return; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,391 INFO L290 TraceCheckUtils]: 14: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~status~31 >= 0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,392 INFO L290 TraceCheckUtils]: 15: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,392 INFO L290 TraceCheckUtils]: 16: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 17: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-15 11:32:53,393 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-15 11:32:53,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:32:53,394 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:32:53,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1645886598] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:32:53,394 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:32:53,394 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-04-15 11:32:53,395 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:32:53,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [76678211] [2022-04-15 11:32:53,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [76678211] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:32:53,395 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:32:53,395 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:32:53,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677745157] [2022-04-15 11:32:53,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:32:53,396 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-15 11:32:53,397 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:32:53,397 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-15 11:32:53,432 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:32:53,432 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:32:53,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:32:53,433 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:32:53,433 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-15 11:32:53,433 INFO L87 Difference]: Start difference. First operand 1985 states and 2849 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-15 11:33:10,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:10,480 INFO L93 Difference]: Finished difference Result 2005 states and 2875 transitions. [2022-04-15 11:33:10,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:33:10,480 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-15 11:33:10,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:33:10,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-15 11:33:10,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-15 11:33:10,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-15 11:33:10,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-15 11:33:10,759 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2874 transitions. [2022-04-15 11:33:13,289 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2874 edges. 2874 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:33:13,562 INFO L225 Difference]: With dead ends: 2005 [2022-04-15 11:33:13,562 INFO L226 Difference]: Without dead ends: 1985 [2022-04-15 11:33:13,563 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-15 11:33:13,564 INFO L913 BasicCegarLoop]: 2846 mSDtfsCounter, 7 mSDsluCounter, 2787 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 5633 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 11:33:13,565 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 5633 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 11:33:13,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1985 states. [2022-04-15 11:33:13,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1985 to 1985. [2022-04-15 11:33:13,973 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:33:13,979 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:33:13,986 INFO L74 IsIncluded]: Start isIncluded. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:33:13,992 INFO L87 Difference]: Start difference. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:33:14,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:14,201 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-15 11:33:14,201 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-15 11:33:14,208 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:33:14,208 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:33:14,212 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-15 11:33:14,216 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-15 11:33:14,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:14,422 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-15 11:33:14,422 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-15 11:33:14,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:33:14,431 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:33:14,431 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:33:14,431 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:33:14,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-15 11:33:14,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2848 transitions. [2022-04-15 11:33:14,781 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2848 transitions. Word has length 24 [2022-04-15 11:33:14,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:33:14,781 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2848 transitions. [2022-04-15 11:33:14,781 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-15 11:33:14,781 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2848 transitions. [2022-04-15 11:33:22,526 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:33:22,527 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-15 11:33:22,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-15 11:33:22,527 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:33:22,527 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:33:22,552 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-15 11:33:22,735 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:33:22,736 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:33:22,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:33:22,736 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 1 times [2022-04-15 11:33:22,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:33:22,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2014994511] [2022-04-15 11:33:22,743 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:33:22,744 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:33:22,744 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:33:22,744 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 2 times [2022-04-15 11:33:22,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:33:22,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346276846] [2022-04-15 11:33:22,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:33:22,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:33:22,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:33:23,072 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:33:23,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:33:23,101 INFO L290 TraceCheckUtils]: 0: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-15 11:33:23,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,101 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-15 11:33:23,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:33:23,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:33:23,146 INFO L290 TraceCheckUtils]: 0: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-15 11:33:23,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,146 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-15 11:33:23,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:33:23,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:33:23,184 INFO L290 TraceCheckUtils]: 0: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-15 11:33:23,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,184 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-15 11:33:23,187 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:33:23,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-15 11:33:23,188 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,188 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-15 11:33:23,188 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-15 11:33:23,189 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31159#(= main_~i~24 0)} is VALID [2022-04-15 11:33:23,189 INFO L290 TraceCheckUtils]: 6: Hoare triple {31159#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31159#(= main_~i~24 0)} is VALID [2022-04-15 11:33:23,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {31159#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31160#(<= main_~i~24 1)} is VALID [2022-04-15 11:33:23,190 INFO L290 TraceCheckUtils]: 8: Hoare triple {31160#(<= main_~i~24 1)} assume !(~i~24 < 4); {31155#false} is VALID [2022-04-15 11:33:23,190 INFO L290 TraceCheckUtils]: 9: Hoare triple {31155#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31155#false} is VALID [2022-04-15 11:33:23,190 INFO L272 TraceCheckUtils]: 10: Hoare triple {31155#false} call _BLAST_init(); {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:33:23,191 INFO L290 TraceCheckUtils]: 11: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-15 11:33:23,191 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,191 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-15 11:33:23,191 INFO L290 TraceCheckUtils]: 14: Hoare triple {31155#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31155#false} is VALID [2022-04-15 11:33:23,191 INFO L290 TraceCheckUtils]: 15: Hoare triple {31155#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31155#false} is VALID [2022-04-15 11:33:23,191 INFO L272 TraceCheckUtils]: 16: Hoare triple {31155#false} call stub_driver_init(); {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:33:23,192 INFO L290 TraceCheckUtils]: 17: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-15 11:33:23,192 INFO L290 TraceCheckUtils]: 18: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:23,192 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-15 11:33:23,192 INFO L290 TraceCheckUtils]: 20: Hoare triple {31155#false} assume !!(~status~31 >= 0); {31155#false} is VALID [2022-04-15 11:33:23,192 INFO L290 TraceCheckUtils]: 21: Hoare triple {31155#false} assume !(0 == ~__BLAST_NONDET~3); {31155#false} is VALID [2022-04-15 11:33:23,192 INFO L290 TraceCheckUtils]: 22: Hoare triple {31155#false} assume 1 == ~__BLAST_NONDET~3; {31155#false} is VALID [2022-04-15 11:33:23,193 INFO L272 TraceCheckUtils]: 23: Hoare triple {31155#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31155#false} is VALID [2022-04-15 11:33:23,193 INFO L290 TraceCheckUtils]: 24: Hoare triple {31155#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31155#false} is VALID [2022-04-15 11:33:23,193 INFO L290 TraceCheckUtils]: 25: Hoare triple {31155#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31155#false} is VALID [2022-04-15 11:33:23,193 INFO L272 TraceCheckUtils]: 26: Hoare triple {31155#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31155#false} is VALID [2022-04-15 11:33:23,193 INFO L290 TraceCheckUtils]: 27: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-15 11:33:23,194 INFO L272 TraceCheckUtils]: 28: Hoare triple {31155#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31155#false} is VALID [2022-04-15 11:33:23,194 INFO L290 TraceCheckUtils]: 29: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-15 11:33:23,194 INFO L290 TraceCheckUtils]: 30: Hoare triple {31155#false} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-15 11:33:23,194 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-15 11:33:23,194 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-15 11:33:23,195 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:33:23,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:33:23,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346276846] [2022-04-15 11:33:23,195 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1346276846] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:33:23,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [827761428] [2022-04-15 11:33:23,195 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:33:23,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:33:23,196 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:33:23,197 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:33:23,218 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 11:33:23,922 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:33:23,923 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:33:23,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 1452 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-15 11:33:23,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:33:23,969 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:33:24,115 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L290 TraceCheckUtils]: 6: Hoare triple {31154#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31154#true} is VALID [2022-04-15 11:33:24,116 INFO L290 TraceCheckUtils]: 7: Hoare triple {31154#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L290 TraceCheckUtils]: 8: Hoare triple {31154#true} assume !(~i~24 < 4); {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L290 TraceCheckUtils]: 9: Hoare triple {31154#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L272 TraceCheckUtils]: 10: Hoare triple {31154#true} call _BLAST_init(); {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L290 TraceCheckUtils]: 11: Hoare triple {31154#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-15 11:33:24,117 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31154#true} #6457#return; {31154#true} is VALID [2022-04-15 11:33:24,118 INFO L290 TraceCheckUtils]: 14: Hoare triple {31154#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31154#true} is VALID [2022-04-15 11:33:24,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {31154#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31154#true} is VALID [2022-04-15 11:33:24,118 INFO L272 TraceCheckUtils]: 16: Hoare triple {31154#true} call stub_driver_init(); {31154#true} is VALID [2022-04-15 11:33:24,129 INFO L290 TraceCheckUtils]: 17: Hoare triple {31154#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,129 INFO L290 TraceCheckUtils]: 18: Hoare triple {31224#(= ~s~0 ~NP~0)} assume true; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,130 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31224#(= ~s~0 ~NP~0)} {31154#true} #6459#return; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,130 INFO L290 TraceCheckUtils]: 20: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !!(~status~31 >= 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,131 INFO L290 TraceCheckUtils]: 21: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(0 == ~__BLAST_NONDET~3); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,131 INFO L290 TraceCheckUtils]: 22: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 1 == ~__BLAST_NONDET~3; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,132 INFO L272 TraceCheckUtils]: 23: Hoare triple {31224#(= ~s~0 ~NP~0)} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,132 INFO L290 TraceCheckUtils]: 24: Hoare triple {31224#(= ~s~0 ~NP~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,133 INFO L290 TraceCheckUtils]: 25: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,133 INFO L272 TraceCheckUtils]: 26: Hoare triple {31224#(= ~s~0 ~NP~0)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,134 INFO L290 TraceCheckUtils]: 27: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,134 INFO L272 TraceCheckUtils]: 28: Hoare triple {31224#(= ~s~0 ~NP~0)} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,135 INFO L290 TraceCheckUtils]: 29: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-15 11:33:24,135 INFO L290 TraceCheckUtils]: 30: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-15 11:33:24,135 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-15 11:33:24,135 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-15 11:33:24,135 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:33:24,135 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:33:24,136 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [827761428] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:33:24,136 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:33:24,136 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-15 11:33:24,136 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:33:24,136 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2014994511] [2022-04-15 11:33:24,136 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2014994511] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:33:24,136 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:33:24,136 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:33:24,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213879946] [2022-04-15 11:33:24,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:33:24,137 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-15 11:33:24,137 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:33:24,137 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-15 11:33:24,183 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:33:24,183 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:33:24,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:33:24,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:33:24,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:33:24,184 INFO L87 Difference]: Start difference. First operand 1985 states and 2848 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-15 11:33:43,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:43,266 INFO L93 Difference]: Finished difference Result 5045 states and 7333 transitions. [2022-04-15 11:33:43,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:33:43,266 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-15 11:33:43,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:33:43,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-15 11:33:43,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-15 11:33:43,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-15 11:33:43,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-15 11:33:43,807 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 7332 transitions. [2022-04-15 11:33:49,734 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7332 edges. 7332 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:33:50,610 INFO L225 Difference]: With dead ends: 5045 [2022-04-15 11:33:50,610 INFO L226 Difference]: Without dead ends: 3732 [2022-04-15 11:33:50,616 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:33:50,617 INFO L913 BasicCegarLoop]: 3641 mSDtfsCounter, 2726 mSDsluCounter, 2556 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2726 SdHoareTripleChecker+Valid, 6197 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 11:33:50,617 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2726 Valid, 6197 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 11:33:50,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3732 states. [2022-04-15 11:33:51,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3732 to 3711. [2022-04-15 11:33:51,534 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:33:51,543 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-15 11:33:51,550 INFO L74 IsIncluded]: Start isIncluded. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-15 11:33:51,557 INFO L87 Difference]: Start difference. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-15 11:33:52,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:52,027 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-15 11:33:52,027 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-15 11:33:52,044 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:33:52,044 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:33:52,053 INFO L74 IsIncluded]: Start isIncluded. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-15 11:33:52,061 INFO L87 Difference]: Start difference. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-15 11:33:52,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:33:52,601 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-15 11:33:52,601 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-15 11:33:52,614 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:33:52,614 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:33:52,614 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:33:52,615 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:33:52,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-15 11:33:53,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5386 transitions. [2022-04-15 11:33:53,516 INFO L78 Accepts]: Start accepts. Automaton has 3711 states and 5386 transitions. Word has length 33 [2022-04-15 11:33:53,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:33:53,517 INFO L478 AbstractCegarLoop]: Abstraction has 3711 states and 5386 transitions. [2022-04-15 11:33:53,517 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-15 11:33:53,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3711 states and 5386 transitions. [2022-04-15 11:34:09,263 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5386 edges. 5386 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:34:09,264 INFO L276 IsEmpty]: Start isEmpty. Operand 3711 states and 5386 transitions. [2022-04-15 11:34:09,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-15 11:34:09,266 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:34:09,266 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:34:09,295 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 11:34:09,479 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-15 11:34:09,479 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:34:09,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:34:09,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 1 times [2022-04-15 11:34:09,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:34:09,480 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1098596748] [2022-04-15 11:34:09,488 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:34:09,488 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:34:09,488 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:34:09,488 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 2 times [2022-04-15 11:34:09,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:34:09,489 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87552560] [2022-04-15 11:34:09,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:34:09,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:34:09,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:09,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:34:09,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:09,856 INFO L290 TraceCheckUtils]: 0: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-15 11:34:09,856 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:09,856 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-15 11:34:09,896 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:34:09,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:09,908 INFO L290 TraceCheckUtils]: 0: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-15 11:34:09,908 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:09,908 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-15 11:34:09,926 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:34:09,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:09,947 INFO L290 TraceCheckUtils]: 0: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-15 11:34:09,947 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:09,947 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-15 11:34:09,962 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-15 11:34:09,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:09,997 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-15 11:34:09,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:10,009 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:34:10,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:10,020 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-15 11:34:10,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,021 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-15 11:34:10,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,022 INFO L272 TraceCheckUtils]: 1: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:10,022 INFO L290 TraceCheckUtils]: 2: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,022 INFO L290 TraceCheckUtils]: 3: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-15 11:34:10,023 INFO L290 TraceCheckUtils]: 4: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,023 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-15 11:34:10,023 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,024 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-15 11:34:10,024 INFO L290 TraceCheckUtils]: 0: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,025 INFO L272 TraceCheckUtils]: 2: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:10,025 INFO L290 TraceCheckUtils]: 3: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,025 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:10,026 INFO L290 TraceCheckUtils]: 5: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,026 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-15 11:34:10,026 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,026 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-15 11:34:10,028 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,029 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-15 11:34:10,029 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-15 11:34:10,029 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,029 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-15 11:34:10,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:34:10,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-15 11:34:10,032 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-15 11:34:10,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-15 11:34:10,033 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56250#(= main_~i~24 0)} is VALID [2022-04-15 11:34:10,037 INFO L290 TraceCheckUtils]: 6: Hoare triple {56250#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56250#(= main_~i~24 0)} is VALID [2022-04-15 11:34:10,037 INFO L290 TraceCheckUtils]: 7: Hoare triple {56250#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56251#(<= main_~i~24 1)} is VALID [2022-04-15 11:34:10,038 INFO L290 TraceCheckUtils]: 8: Hoare triple {56251#(<= main_~i~24 1)} assume !(~i~24 < 4); {56246#false} is VALID [2022-04-15 11:34:10,038 INFO L290 TraceCheckUtils]: 9: Hoare triple {56246#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56246#false} is VALID [2022-04-15 11:34:10,038 INFO L272 TraceCheckUtils]: 10: Hoare triple {56246#false} call _BLAST_init(); {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:10,038 INFO L290 TraceCheckUtils]: 11: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-15 11:34:10,038 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,038 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-15 11:34:10,038 INFO L290 TraceCheckUtils]: 14: Hoare triple {56246#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56246#false} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 15: Hoare triple {56246#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56246#false} is VALID [2022-04-15 11:34:10,039 INFO L272 TraceCheckUtils]: 16: Hoare triple {56246#false} call stub_driver_init(); {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 17: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,039 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 20: Hoare triple {56246#false} assume !!(~status~31 >= 0); {56246#false} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 21: Hoare triple {56246#false} assume !(0 == ~__BLAST_NONDET~3); {56246#false} is VALID [2022-04-15 11:34:10,039 INFO L290 TraceCheckUtils]: 22: Hoare triple {56246#false} assume 1 == ~__BLAST_NONDET~3; {56246#false} is VALID [2022-04-15 11:34:10,040 INFO L272 TraceCheckUtils]: 23: Hoare triple {56246#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:10,040 INFO L290 TraceCheckUtils]: 24: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,040 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,040 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:10,041 INFO L290 TraceCheckUtils]: 27: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,041 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:10,041 INFO L290 TraceCheckUtils]: 29: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,042 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-15 11:34:10,043 INFO L290 TraceCheckUtils]: 38: Hoare triple {56246#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56246#false} is VALID [2022-04-15 11:34:10,043 INFO L290 TraceCheckUtils]: 39: Hoare triple {56246#false} assume !(0 != ~we_should_unload~0); {56246#false} is VALID [2022-04-15 11:34:10,043 INFO L290 TraceCheckUtils]: 40: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-15 11:34:10,043 INFO L290 TraceCheckUtils]: 41: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L290 TraceCheckUtils]: 42: Hoare triple {56246#false} assume !(~s~0 == ~UNLOADED~0); {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L290 TraceCheckUtils]: 43: Hoare triple {56246#false} assume !(-1 == ~status~31); {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L290 TraceCheckUtils]: 44: Hoare triple {56246#false} assume !(~s~0 != ~SKIP2~0); {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L290 TraceCheckUtils]: 45: Hoare triple {56246#false} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-15 11:34:10,044 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-15 11:34:10,045 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-15 11:34:10,045 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:34:10,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:34:10,045 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87552560] [2022-04-15 11:34:10,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87552560] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:34:10,045 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [361796567] [2022-04-15 11:34:10,046 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:34:10,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:34:10,046 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:34:10,047 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:34:10,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 11:34:10,782 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:34:10,782 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:34:10,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 1479 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-15 11:34:10,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:10,827 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:34:10,941 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56245#true} is VALID [2022-04-15 11:34:10,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-15 11:34:10,941 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {56245#true} assume !(~i~24 < 4); {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56245#true} is VALID [2022-04-15 11:34:10,942 INFO L272 TraceCheckUtils]: 10: Hoare triple {56245#true} call _BLAST_init(); {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56245#true} #6457#return; {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L290 TraceCheckUtils]: 14: Hoare triple {56245#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L290 TraceCheckUtils]: 15: Hoare triple {56245#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L272 TraceCheckUtils]: 16: Hoare triple {56245#true} call stub_driver_init(); {56245#true} is VALID [2022-04-15 11:34:10,943 INFO L290 TraceCheckUtils]: 17: Hoare triple {56245#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56245#true} #6459#return; {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 20: Hoare triple {56245#true} assume !!(~status~31 >= 0); {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 21: Hoare triple {56245#true} assume !(0 == ~__BLAST_NONDET~3); {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 22: Hoare triple {56245#true} assume 1 == ~__BLAST_NONDET~3; {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L272 TraceCheckUtils]: 23: Hoare triple {56245#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 24: Hoare triple {56245#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,944 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L290 TraceCheckUtils]: 27: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L290 TraceCheckUtils]: 29: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-15 11:34:10,945 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56245#true} #6463#return; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L290 TraceCheckUtils]: 38: Hoare triple {56245#true} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56245#true} is VALID [2022-04-15 11:34:10,946 INFO L290 TraceCheckUtils]: 39: Hoare triple {56245#true} assume !(0 != ~we_should_unload~0); {56245#true} is VALID [2022-04-15 11:34:10,948 INFO L290 TraceCheckUtils]: 40: Hoare triple {56245#true} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-15 11:34:10,949 INFO L290 TraceCheckUtils]: 41: Hoare triple {56412#(not (= ~pended~0 1))} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-15 11:34:10,949 INFO L290 TraceCheckUtils]: 42: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 == ~UNLOADED~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-15 11:34:10,949 INFO L290 TraceCheckUtils]: 43: Hoare triple {56412#(not (= ~pended~0 1))} assume !(-1 == ~status~31); {56412#(not (= ~pended~0 1))} is VALID [2022-04-15 11:34:10,950 INFO L290 TraceCheckUtils]: 44: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 != ~SKIP2~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-15 11:34:10,950 INFO L290 TraceCheckUtils]: 45: Hoare triple {56412#(not (= ~pended~0 1))} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-15 11:34:10,950 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-15 11:34:10,950 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-15 11:34:10,950 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-15 11:34:10,950 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:34:10,951 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:34:10,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [361796567] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:34:10,951 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:34:10,951 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-15 11:34:10,951 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:34:10,951 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1098596748] [2022-04-15 11:34:10,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1098596748] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:34:10,952 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:34:10,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:34:10,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856748618] [2022-04-15 11:34:10,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:34:10,952 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-15 11:34:10,952 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:34:10,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:11,000 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:34:11,000 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:34:11,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:34:11,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:34:11,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-15 11:34:11,002 INFO L87 Difference]: Start difference. First operand 3711 states and 5386 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:22,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:34:22,597 INFO L93 Difference]: Finished difference Result 3829 states and 5529 transitions. [2022-04-15 11:34:22,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:34:22,597 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-15 11:34:22,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:34:22,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:22,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-15 11:34:22,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:22,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-15 11:34:22,809 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2934 transitions. [2022-04-15 11:34:25,287 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2934 edges. 2934 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:34:26,020 INFO L225 Difference]: With dead ends: 3829 [2022-04-15 11:34:26,021 INFO L226 Difference]: Without dead ends: 3810 [2022-04-15 11:34:26,022 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-15 11:34:26,023 INFO L913 BasicCegarLoop]: 2842 mSDtfsCounter, 2820 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2820 SdHoareTripleChecker+Valid, 2912 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 11:34:26,023 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2820 Valid, 2912 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 11:34:26,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3810 states. [2022-04-15 11:34:26,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3810 to 3804. [2022-04-15 11:34:26,704 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:34:26,711 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-15 11:34:26,718 INFO L74 IsIncluded]: Start isIncluded. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-15 11:34:26,726 INFO L87 Difference]: Start difference. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-15 11:34:27,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:34:27,380 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-15 11:34:27,380 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-15 11:34:27,393 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:34:27,394 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:34:27,402 INFO L74 IsIncluded]: Start isIncluded. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-15 11:34:27,407 INFO L87 Difference]: Start difference. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-15 11:34:28,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:34:28,061 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-15 11:34:28,062 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-15 11:34:28,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:34:28,074 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:34:28,074 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:34:28,074 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:34:28,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-15 11:34:29,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3804 states to 3804 states and 5497 transitions. [2022-04-15 11:34:29,112 INFO L78 Accepts]: Start accepts. Automaton has 3804 states and 5497 transitions. Word has length 49 [2022-04-15 11:34:29,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:34:29,113 INFO L478 AbstractCegarLoop]: Abstraction has 3804 states and 5497 transitions. [2022-04-15 11:34:29,113 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:29,113 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3804 states and 5497 transitions. [2022-04-15 11:34:45,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5497 edges. 5497 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:34:45,052 INFO L276 IsEmpty]: Start isEmpty. Operand 3804 states and 5497 transitions. [2022-04-15 11:34:45,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-15 11:34:45,054 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:34:45,054 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:34:45,087 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 11:34:45,275 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:34:45,275 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:34:45,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:34:45,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 1 times [2022-04-15 11:34:45,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:34:45,276 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1546214292] [2022-04-15 11:34:45,283 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:34:45,283 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:34:45,283 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:34:45,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 2 times [2022-04-15 11:34:45,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:34:45,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128101587] [2022-04-15 11:34:45,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:34:45,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:34:45,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,571 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:34:45,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,600 INFO L290 TraceCheckUtils]: 0: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-15 11:34:45,600 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,601 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-15 11:34:45,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:34:45,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,644 INFO L290 TraceCheckUtils]: 0: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-15 11:34:45,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,645 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-15 11:34:45,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:34:45,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-15 11:34:45,675 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,675 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-15 11:34:45,689 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-15 11:34:45,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-15 11:34:45,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,726 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:34:45,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:45,735 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-15 11:34:45,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,736 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-15 11:34:45,737 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,738 INFO L272 TraceCheckUtils]: 1: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:45,738 INFO L290 TraceCheckUtils]: 2: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,738 INFO L290 TraceCheckUtils]: 3: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-15 11:34:45,738 INFO L290 TraceCheckUtils]: 4: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,738 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-15 11:34:45,739 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,739 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-15 11:34:45,739 INFO L290 TraceCheckUtils]: 0: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-15 11:34:45,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-15 11:34:45,740 INFO L272 TraceCheckUtils]: 2: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:45,741 INFO L290 TraceCheckUtils]: 3: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,741 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:45,741 INFO L290 TraceCheckUtils]: 5: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-15 11:34:45,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,743 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-15 11:34:45,746 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:34:45,746 INFO L290 TraceCheckUtils]: 1: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-15 11:34:45,746 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,748 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-15 11:34:45,748 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-15 11:34:45,748 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79327#(= main_~i~24 0)} is VALID [2022-04-15 11:34:45,749 INFO L290 TraceCheckUtils]: 6: Hoare triple {79327#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79327#(= main_~i~24 0)} is VALID [2022-04-15 11:34:45,749 INFO L290 TraceCheckUtils]: 7: Hoare triple {79327#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79328#(<= main_~i~24 1)} is VALID [2022-04-15 11:34:45,749 INFO L290 TraceCheckUtils]: 8: Hoare triple {79328#(<= main_~i~24 1)} assume !(~i~24 < 4); {79323#false} is VALID [2022-04-15 11:34:45,750 INFO L290 TraceCheckUtils]: 9: Hoare triple {79323#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79323#false} is VALID [2022-04-15 11:34:45,750 INFO L272 TraceCheckUtils]: 10: Hoare triple {79323#false} call _BLAST_init(); {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:45,750 INFO L290 TraceCheckUtils]: 11: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-15 11:34:45,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,755 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-15 11:34:45,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {79323#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79323#false} is VALID [2022-04-15 11:34:45,755 INFO L290 TraceCheckUtils]: 15: Hoare triple {79323#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79323#false} is VALID [2022-04-15 11:34:45,755 INFO L272 TraceCheckUtils]: 16: Hoare triple {79323#false} call stub_driver_init(); {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:45,755 INFO L290 TraceCheckUtils]: 17: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,756 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 20: Hoare triple {79323#false} assume !!(~status~31 >= 0); {79323#false} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 21: Hoare triple {79323#false} assume !(0 == ~__BLAST_NONDET~3); {79323#false} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 22: Hoare triple {79323#false} assume 1 == ~__BLAST_NONDET~3; {79323#false} is VALID [2022-04-15 11:34:45,756 INFO L272 TraceCheckUtils]: 23: Hoare triple {79323#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 24: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-15 11:34:45,756 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-15 11:34:45,757 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:45,757 INFO L290 TraceCheckUtils]: 27: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,758 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:34:45,758 INFO L290 TraceCheckUtils]: 29: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:45,758 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-15 11:34:45,758 INFO L290 TraceCheckUtils]: 31: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,758 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 33: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,759 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 35: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 36: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:45,759 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 38: Hoare triple {79323#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79323#false} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 39: Hoare triple {79323#false} assume !(0 != ~we_should_unload~0); {79323#false} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 40: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-15 11:34:45,759 INFO L290 TraceCheckUtils]: 41: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-15 11:34:45,760 INFO L290 TraceCheckUtils]: 42: Hoare triple {79323#false} assume !(~s~0 == ~UNLOADED~0); {79323#false} is VALID [2022-04-15 11:34:45,760 INFO L290 TraceCheckUtils]: 43: Hoare triple {79323#false} assume !(-1 == ~status~31); {79323#false} is VALID [2022-04-15 11:34:45,764 INFO L290 TraceCheckUtils]: 44: Hoare triple {79323#false} assume ~s~0 != ~SKIP2~0; {79323#false} is VALID [2022-04-15 11:34:45,764 INFO L290 TraceCheckUtils]: 45: Hoare triple {79323#false} assume ~s~0 != ~IPC~0; {79323#false} is VALID [2022-04-15 11:34:45,765 INFO L290 TraceCheckUtils]: 46: Hoare triple {79323#false} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-15 11:34:45,765 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-15 11:34:45,765 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-15 11:34:45,765 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:34:45,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:34:45,768 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2128101587] [2022-04-15 11:34:45,768 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2128101587] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:34:45,768 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [949658358] [2022-04-15 11:34:45,768 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:34:45,768 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:34:45,769 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:34:45,769 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:34:45,771 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 11:34:46,444 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:34:46,444 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:34:46,448 INFO L263 TraceCheckSpWp]: Trace formula consists of 1477 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-15 11:34:46,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:34:46,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:34:46,617 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79322#true} is VALID [2022-04-15 11:34:46,618 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {79322#true} assume !(~i~24 < 4); {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L272 TraceCheckUtils]: 10: Hoare triple {79322#true} call _BLAST_init(); {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79322#true} #6457#return; {79322#true} is VALID [2022-04-15 11:34:46,619 INFO L290 TraceCheckUtils]: 14: Hoare triple {79322#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {79322#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L272 TraceCheckUtils]: 16: Hoare triple {79322#true} call stub_driver_init(); {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L290 TraceCheckUtils]: 17: Hoare triple {79322#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79322#true} #6459#return; {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L290 TraceCheckUtils]: 20: Hoare triple {79322#true} assume !!(~status~31 >= 0); {79322#true} is VALID [2022-04-15 11:34:46,620 INFO L290 TraceCheckUtils]: 21: Hoare triple {79322#true} assume !(0 == ~__BLAST_NONDET~3); {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L290 TraceCheckUtils]: 22: Hoare triple {79322#true} assume 1 == ~__BLAST_NONDET~3; {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L272 TraceCheckUtils]: 23: Hoare triple {79322#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L290 TraceCheckUtils]: 24: Hoare triple {79322#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L290 TraceCheckUtils]: 27: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:46,621 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79322#true} is VALID [2022-04-15 11:34:46,622 INFO L290 TraceCheckUtils]: 29: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-15 11:34:46,635 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,636 INFO L290 TraceCheckUtils]: 31: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,636 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6659#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,637 INFO L290 TraceCheckUtils]: 33: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,638 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #5919#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,638 INFO L290 TraceCheckUtils]: 35: Hoare triple {79459#(= ~s~0 ~DC~0)} #res := 0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,638 INFO L290 TraceCheckUtils]: 36: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,639 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6463#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,640 INFO L290 TraceCheckUtils]: 38: Hoare triple {79459#(= ~s~0 ~DC~0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,640 INFO L290 TraceCheckUtils]: 39: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(0 != ~we_should_unload~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,640 INFO L290 TraceCheckUtils]: 40: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,641 INFO L290 TraceCheckUtils]: 41: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,641 INFO L290 TraceCheckUtils]: 42: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(~s~0 == ~UNLOADED~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,641 INFO L290 TraceCheckUtils]: 43: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(-1 == ~status~31); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,642 INFO L290 TraceCheckUtils]: 44: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~SKIP2~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,642 INFO L290 TraceCheckUtils]: 45: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~IPC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-15 11:34:46,643 INFO L290 TraceCheckUtils]: 46: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-15 11:34:46,643 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-15 11:34:46,643 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-15 11:34:46,643 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:34:46,643 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:34:46,643 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [949658358] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:34:46,643 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:34:46,644 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-15 11:34:46,644 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:34:46,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1546214292] [2022-04-15 11:34:46,644 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1546214292] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:34:46,644 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:34:46,644 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:34:46,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263608072] [2022-04-15 11:34:46,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:34:46,645 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-15 11:34:46,645 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:34:46,646 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:34:46,702 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:34:46,702 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:34:46,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:34:46,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:34:46,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-15 11:34:46,703 INFO L87 Difference]: Start difference. First operand 3804 states and 5497 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:35:08,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:35:08,757 INFO L93 Difference]: Finished difference Result 4627 states and 6683 transitions. [2022-04-15 11:35:08,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:35:08,757 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-15 11:35:08,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:35:08,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:35:08,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-15 11:35:08,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:35:09,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-15 11:35:09,054 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4532 transitions. [2022-04-15 11:35:12,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4532 edges. 4532 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:35:13,850 INFO L225 Difference]: With dead ends: 4627 [2022-04-15 11:35:13,850 INFO L226 Difference]: Without dead ends: 4622 [2022-04-15 11:35:13,852 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-15 11:35:13,852 INFO L913 BasicCegarLoop]: 4145 mSDtfsCounter, 1721 mSDsluCounter, 2715 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1721 SdHoareTripleChecker+Valid, 6860 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 11:35:13,852 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1721 Valid, 6860 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 11:35:13,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2022-04-15 11:35:14,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4578. [2022-04-15 11:35:14,841 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:35:14,851 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-15 11:35:14,860 INFO L74 IsIncluded]: Start isIncluded. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-15 11:35:14,868 INFO L87 Difference]: Start difference. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-15 11:35:15,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:35:15,801 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-15 11:35:15,801 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-15 11:35:15,818 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:35:15,818 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:35:15,828 INFO L74 IsIncluded]: Start isIncluded. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-15 11:35:15,838 INFO L87 Difference]: Start difference. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-15 11:35:16,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:35:16,696 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-15 11:35:16,696 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-15 11:35:16,706 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:35:16,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:35:16,707 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:35:16,707 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:35:16,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-15 11:35:18,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4578 states to 4578 states and 6622 transitions. [2022-04-15 11:35:18,213 INFO L78 Accepts]: Start accepts. Automaton has 4578 states and 6622 transitions. Word has length 49 [2022-04-15 11:35:18,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:35:18,214 INFO L478 AbstractCegarLoop]: Abstraction has 4578 states and 6622 transitions. [2022-04-15 11:35:18,214 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:35:18,214 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4578 states and 6622 transitions. [2022-04-15 11:35:38,155 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6622 edges. 6622 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:35:38,155 INFO L276 IsEmpty]: Start isEmpty. Operand 4578 states and 6622 transitions. [2022-04-15 11:35:38,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-15 11:35:38,156 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:35:38,156 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:35:38,176 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 11:35:38,357 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:35:38,357 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:35:38,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:35:38,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 1 times [2022-04-15 11:35:38,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:35:38,357 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [355907717] [2022-04-15 11:35:38,363 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:35:38,363 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:35:38,363 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:35:38,363 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 2 times [2022-04-15 11:35:38,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:35:38,363 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696113514] [2022-04-15 11:35:38,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:35:38,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:35:38,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:35:38,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,664 INFO L290 TraceCheckUtils]: 0: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-15 11:35:38,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,664 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-15 11:35:38,697 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:35:38,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,709 INFO L290 TraceCheckUtils]: 0: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-15 11:35:38,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,709 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-15 11:35:38,727 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:35:38,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,738 INFO L290 TraceCheckUtils]: 0: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-15 11:35:38,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,738 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-15 11:35:38,752 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-15 11:35:38,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-15 11:35:38,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,788 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:35:38,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:38,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-15 11:35:38,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-15 11:35:38,799 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,799 INFO L272 TraceCheckUtils]: 1: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:35:38,799 INFO L290 TraceCheckUtils]: 2: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,800 INFO L290 TraceCheckUtils]: 3: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-15 11:35:38,800 INFO L290 TraceCheckUtils]: 4: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,800 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-15 11:35:38,800 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,800 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-15 11:35:38,801 INFO L290 TraceCheckUtils]: 0: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-15 11:35:38,801 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-15 11:35:38,801 INFO L272 TraceCheckUtils]: 2: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:35:38,801 INFO L290 TraceCheckUtils]: 3: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,802 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:35:38,802 INFO L290 TraceCheckUtils]: 5: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,802 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,803 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-15 11:35:38,807 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:35:38,807 INFO L290 TraceCheckUtils]: 1: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-15 11:35:38,807 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,807 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-15 11:35:38,807 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-15 11:35:38,808 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107172#(= main_~i~24 0)} is VALID [2022-04-15 11:35:38,808 INFO L290 TraceCheckUtils]: 6: Hoare triple {107172#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107172#(= main_~i~24 0)} is VALID [2022-04-15 11:35:38,808 INFO L290 TraceCheckUtils]: 7: Hoare triple {107172#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107173#(<= main_~i~24 1)} is VALID [2022-04-15 11:35:38,809 INFO L290 TraceCheckUtils]: 8: Hoare triple {107173#(<= main_~i~24 1)} assume !(~i~24 < 4); {107168#false} is VALID [2022-04-15 11:35:38,809 INFO L290 TraceCheckUtils]: 9: Hoare triple {107168#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107168#false} is VALID [2022-04-15 11:35:38,809 INFO L272 TraceCheckUtils]: 10: Hoare triple {107168#false} call _BLAST_init(); {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:35:38,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-15 11:35:38,809 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,810 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-15 11:35:38,810 INFO L290 TraceCheckUtils]: 14: Hoare triple {107168#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107168#false} is VALID [2022-04-15 11:35:38,810 INFO L290 TraceCheckUtils]: 15: Hoare triple {107168#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107168#false} is VALID [2022-04-15 11:35:38,810 INFO L272 TraceCheckUtils]: 16: Hoare triple {107168#false} call stub_driver_init(); {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:35:38,810 INFO L290 TraceCheckUtils]: 17: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-15 11:35:38,810 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,810 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-15 11:35:38,810 INFO L290 TraceCheckUtils]: 20: Hoare triple {107168#false} assume !!(~status~31 >= 0); {107168#false} is VALID [2022-04-15 11:35:38,811 INFO L290 TraceCheckUtils]: 21: Hoare triple {107168#false} assume !(0 == ~__BLAST_NONDET~3); {107168#false} is VALID [2022-04-15 11:35:38,811 INFO L290 TraceCheckUtils]: 22: Hoare triple {107168#false} assume 1 == ~__BLAST_NONDET~3; {107168#false} is VALID [2022-04-15 11:35:38,811 INFO L272 TraceCheckUtils]: 23: Hoare triple {107168#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:35:38,811 INFO L290 TraceCheckUtils]: 24: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-15 11:35:38,811 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-15 11:35:38,812 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:35:38,812 INFO L290 TraceCheckUtils]: 27: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:35:38,813 INFO L290 TraceCheckUtils]: 29: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-15 11:35:38,813 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 36: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:38,814 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 38: Hoare triple {107168#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 39: Hoare triple {107168#false} assume !(0 != ~we_should_unload~0); {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 40: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 41: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 42: Hoare triple {107168#false} assume !(~s~0 == ~UNLOADED~0); {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 43: Hoare triple {107168#false} assume !(-1 == ~status~31); {107168#false} is VALID [2022-04-15 11:35:38,814 INFO L290 TraceCheckUtils]: 44: Hoare triple {107168#false} assume !(~s~0 != ~SKIP2~0); {107168#false} is VALID [2022-04-15 11:35:38,815 INFO L290 TraceCheckUtils]: 45: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-15 11:35:38,815 INFO L290 TraceCheckUtils]: 46: Hoare triple {107168#false} assume ~s~0 == ~DC~0; {107168#false} is VALID [2022-04-15 11:35:38,815 INFO L290 TraceCheckUtils]: 47: Hoare triple {107168#false} assume 259 == ~status~31; {107168#false} is VALID [2022-04-15 11:35:38,815 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-15 11:35:38,815 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-15 11:35:38,816 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:35:38,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:35:38,816 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696113514] [2022-04-15 11:35:38,816 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696113514] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:35:38,816 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [737172071] [2022-04-15 11:35:38,816 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:35:38,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:35:38,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:35:38,817 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:35:38,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 11:35:39,498 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:35:39,498 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:35:39,502 INFO L263 TraceCheckSpWp]: Trace formula consists of 1481 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-15 11:35:39,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:35:39,536 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:35:39,707 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107167#true} is VALID [2022-04-15 11:35:39,707 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-15 11:35:39,707 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:39,707 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 8: Hoare triple {107167#true} assume !(~i~24 < 4); {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L272 TraceCheckUtils]: 10: Hoare triple {107167#true} call _BLAST_init(); {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107167#true} #6457#return; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 14: Hoare triple {107167#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L290 TraceCheckUtils]: 15: Hoare triple {107167#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107167#true} is VALID [2022-04-15 11:35:39,708 INFO L272 TraceCheckUtils]: 16: Hoare triple {107167#true} call stub_driver_init(); {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 17: Hoare triple {107167#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107167#true} #6459#return; {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 20: Hoare triple {107167#true} assume !!(~status~31 >= 0); {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 21: Hoare triple {107167#true} assume !(0 == ~__BLAST_NONDET~3); {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 22: Hoare triple {107167#true} assume 1 == ~__BLAST_NONDET~3; {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L272 TraceCheckUtils]: 23: Hoare triple {107167#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107167#true} is VALID [2022-04-15 11:35:39,709 INFO L290 TraceCheckUtils]: 24: Hoare triple {107167#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 27: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 29: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-15 11:35:39,710 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-15 11:35:39,711 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-15 11:35:39,711 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-15 11:35:39,711 INFO L290 TraceCheckUtils]: 36: Hoare triple {107319#(<= |PptDispatchClose_#res| 0)} assume true; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-15 11:35:39,712 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107319#(<= |PptDispatchClose_#res| 0)} {107167#true} #6463#return; {107326#(<= |main_#t~ret1110| 0)} is VALID [2022-04-15 11:35:39,713 INFO L290 TraceCheckUtils]: 38: Hoare triple {107326#(<= |main_#t~ret1110| 0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,713 INFO L290 TraceCheckUtils]: 39: Hoare triple {107330#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,714 INFO L290 TraceCheckUtils]: 40: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,714 INFO L290 TraceCheckUtils]: 41: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,714 INFO L290 TraceCheckUtils]: 42: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,714 INFO L290 TraceCheckUtils]: 43: Hoare triple {107330#(<= main_~status~31 0)} assume !(-1 == ~status~31); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,715 INFO L290 TraceCheckUtils]: 44: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,715 INFO L290 TraceCheckUtils]: 45: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,715 INFO L290 TraceCheckUtils]: 46: Hoare triple {107330#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {107330#(<= main_~status~31 0)} is VALID [2022-04-15 11:35:39,716 INFO L290 TraceCheckUtils]: 47: Hoare triple {107330#(<= main_~status~31 0)} assume 259 == ~status~31; {107168#false} is VALID [2022-04-15 11:35:39,716 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-15 11:35:39,716 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-15 11:35:39,716 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:35:39,716 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:35:39,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [737172071] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:35:39,716 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:35:39,716 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-15 11:35:39,716 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:35:39,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [355907717] [2022-04-15 11:35:39,717 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [355907717] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:35:39,717 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:35:39,717 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 11:35:39,717 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [750638052] [2022-04-15 11:35:39,717 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:35:39,717 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-15 11:35:39,717 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:35:39,718 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:35:39,769 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:35:39,769 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 11:35:39,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:35:39,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 11:35:39,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-15 11:35:39,770 INFO L87 Difference]: Start difference. First operand 4578 states and 6622 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:36:14,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:36:14,193 INFO L93 Difference]: Finished difference Result 4593 states and 6640 transitions. [2022-04-15 11:36:14,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 11:36:14,193 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-15 11:36:14,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:36:14,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:36:14,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-15 11:36:14,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:36:14,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-15 11:36:14,386 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2859 transitions. [2022-04-15 11:36:16,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2859 edges. 2859 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:36:17,774 INFO L225 Difference]: With dead ends: 4593 [2022-04-15 11:36:17,774 INFO L226 Difference]: Without dead ends: 4552 [2022-04-15 11:36:17,777 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-15 11:36:17,777 INFO L913 BasicCegarLoop]: 2840 mSDtfsCounter, 5 mSDsluCounter, 8500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11340 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 11:36:17,777 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11340 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 11:36:17,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4552 states. [2022-04-15 11:36:18,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4552 to 4552. [2022-04-15 11:36:18,587 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:36:18,594 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-15 11:36:18,602 INFO L74 IsIncluded]: Start isIncluded. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-15 11:36:18,610 INFO L87 Difference]: Start difference. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-15 11:36:19,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:36:19,439 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-15 11:36:19,439 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-15 11:36:19,446 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:36:19,446 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:36:19,452 INFO L74 IsIncluded]: Start isIncluded. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-15 11:36:19,456 INFO L87 Difference]: Start difference. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-15 11:36:20,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:36:20,072 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-15 11:36:20,072 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-15 11:36:20,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:36:20,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:36:20,079 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:36:20,079 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:36:20,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-15 11:36:21,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 6585 transitions. [2022-04-15 11:36:21,141 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 6585 transitions. Word has length 50 [2022-04-15 11:36:21,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:36:21,142 INFO L478 AbstractCegarLoop]: Abstraction has 4552 states and 6585 transitions. [2022-04-15 11:36:21,142 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:36:21,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4552 states and 6585 transitions. [2022-04-15 11:36:41,171 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6585 edges. 6585 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:36:41,171 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-15 11:36:41,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-15 11:36:41,172 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:36:41,172 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:36:41,192 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-15 11:36:41,375 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:36:41,375 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:36:41,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:36:41,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 1 times [2022-04-15 11:36:41,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:36:41,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [522009366] [2022-04-15 11:36:41,381 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:36:41,382 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:36:41,382 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:36:41,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 2 times [2022-04-15 11:36:41,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:36:41,382 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802088804] [2022-04-15 11:36:41,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:36:41,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:36:41,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:41,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:36:41,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:41,694 INFO L290 TraceCheckUtils]: 0: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-15 11:36:41,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,694 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-15 11:36:41,724 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:36:41,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:41,735 INFO L290 TraceCheckUtils]: 0: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-15 11:36:41,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,735 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-15 11:36:41,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:36:41,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:41,762 INFO L290 TraceCheckUtils]: 0: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-15 11:36:41,762 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,762 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-15 11:36:41,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-15 11:36:41,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:41,774 INFO L290 TraceCheckUtils]: 0: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-15 11:36:41,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-15 11:36:41,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-15 11:36:41,775 INFO L290 TraceCheckUtils]: 3: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,775 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-15 11:36:41,778 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:36:41,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-15 11:36:41,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,778 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-15 11:36:41,779 INFO L272 TraceCheckUtils]: 4: Hoare triple {134757#true} call #t~ret1155 := main(); {134757#true} is VALID [2022-04-15 11:36:41,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {134757#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134762#(= main_~i~24 0)} is VALID [2022-04-15 11:36:41,779 INFO L290 TraceCheckUtils]: 6: Hoare triple {134762#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134762#(= main_~i~24 0)} is VALID [2022-04-15 11:36:41,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {134762#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134763#(<= main_~i~24 1)} is VALID [2022-04-15 11:36:41,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {134763#(<= main_~i~24 1)} assume !(~i~24 < 4); {134758#false} is VALID [2022-04-15 11:36:41,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {134758#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134758#false} is VALID [2022-04-15 11:36:41,780 INFO L272 TraceCheckUtils]: 10: Hoare triple {134758#false} call _BLAST_init(); {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,781 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 14: Hoare triple {134758#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134758#false} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 15: Hoare triple {134758#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134758#false} is VALID [2022-04-15 11:36:41,781 INFO L272 TraceCheckUtils]: 16: Hoare triple {134758#false} call stub_driver_init(); {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 17: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 18: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,781 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-15 11:36:41,781 INFO L290 TraceCheckUtils]: 20: Hoare triple {134758#false} assume !!(~status~31 >= 0); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 21: Hoare triple {134758#false} assume !(0 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 22: Hoare triple {134758#false} assume !(1 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 23: Hoare triple {134758#false} assume !(3 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 24: Hoare triple {134758#false} assume !(4 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 25: Hoare triple {134758#false} assume !(5 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 26: Hoare triple {134758#false} assume 6 == ~__BLAST_NONDET~3; {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L272 TraceCheckUtils]: 27: Hoare triple {134758#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 28: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134758#false} is VALID [2022-04-15 11:36:41,782 INFO L272 TraceCheckUtils]: 29: Hoare triple {134758#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134757#true} is VALID [2022-04-15 11:36:41,782 INFO L290 TraceCheckUtils]: 30: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 31: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 32: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 33: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-15 11:36:41,783 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 35: Hoare triple {134758#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 36: Hoare triple {134758#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 37: Hoare triple {134758#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 38: Hoare triple {134758#false} assume 3 == #t~mem1080;havoc #t~mem1080; {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 39: Hoare triple {134758#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134758#false} is VALID [2022-04-15 11:36:41,783 INFO L290 TraceCheckUtils]: 40: Hoare triple {134758#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L272 TraceCheckUtils]: 41: Hoare triple {134758#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 42: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 43: Hoare triple {134758#false} assume 0 != ~compRegistered~0; {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 44: Hoare triple {134758#false} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-15 11:36:41,784 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-15 11:36:41,785 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:36:41,785 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:36:41,785 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802088804] [2022-04-15 11:36:41,785 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802088804] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:36:41,785 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2115497419] [2022-04-15 11:36:41,785 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:36:41,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:36:41,786 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:36:41,787 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:36:41,792 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 11:36:42,642 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:36:42,642 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:36:42,647 INFO L263 TraceCheckSpWp]: Trace formula consists of 1578 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-15 11:36:42,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:36:42,683 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:36:42,808 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134757#true} is VALID [2022-04-15 11:36:42,812 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,812 INFO L290 TraceCheckUtils]: 2: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,812 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134784#(= ~routine~0 0)} {134757#true} #6857#return; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1155 := main(); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {134784#(= ~routine~0 0)} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {134784#(= ~routine~0 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,814 INFO L290 TraceCheckUtils]: 7: Hoare triple {134784#(= ~routine~0 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,814 INFO L290 TraceCheckUtils]: 8: Hoare triple {134784#(= ~routine~0 0)} assume !(~i~24 < 4); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,814 INFO L272 TraceCheckUtils]: 10: Hoare triple {134784#(= ~routine~0 0)} call _BLAST_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,815 INFO L290 TraceCheckUtils]: 11: Hoare triple {134784#(= ~routine~0 0)} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,815 INFO L290 TraceCheckUtils]: 12: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,815 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6457#return; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {134784#(= ~routine~0 0)} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,816 INFO L290 TraceCheckUtils]: 15: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,816 INFO L272 TraceCheckUtils]: 16: Hoare triple {134784#(= ~routine~0 0)} call stub_driver_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,817 INFO L290 TraceCheckUtils]: 17: Hoare triple {134784#(= ~routine~0 0)} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,817 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6459#return; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {134784#(= ~routine~0 0)} assume !!(~status~31 >= 0); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,818 INFO L290 TraceCheckUtils]: 21: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,819 INFO L290 TraceCheckUtils]: 22: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,819 INFO L290 TraceCheckUtils]: 23: Hoare triple {134784#(= ~routine~0 0)} assume !(3 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,819 INFO L290 TraceCheckUtils]: 24: Hoare triple {134784#(= ~routine~0 0)} assume !(4 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,820 INFO L290 TraceCheckUtils]: 25: Hoare triple {134784#(= ~routine~0 0)} assume !(5 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,821 INFO L290 TraceCheckUtils]: 26: Hoare triple {134784#(= ~routine~0 0)} assume 6 == ~__BLAST_NONDET~3; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,822 INFO L272 TraceCheckUtils]: 27: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,825 INFO L290 TraceCheckUtils]: 28: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,826 INFO L272 TraceCheckUtils]: 29: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,827 INFO L290 TraceCheckUtils]: 30: Hoare triple {134784#(= ~routine~0 0)} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,827 INFO L290 TraceCheckUtils]: 31: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~__BLAST_NONDET~26; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,827 INFO L290 TraceCheckUtils]: 32: Hoare triple {134784#(= ~routine~0 0)} #res := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,828 INFO L290 TraceCheckUtils]: 33: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,829 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #5849#return; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,829 INFO L290 TraceCheckUtils]: 35: Hoare triple {134784#(= ~routine~0 0)} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,829 INFO L290 TraceCheckUtils]: 36: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,830 INFO L290 TraceCheckUtils]: 37: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,830 INFO L290 TraceCheckUtils]: 38: Hoare triple {134784#(= ~routine~0 0)} assume 3 == #t~mem1080;havoc #t~mem1080; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,830 INFO L290 TraceCheckUtils]: 39: Hoare triple {134784#(= ~routine~0 0)} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,830 INFO L290 TraceCheckUtils]: 40: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,831 INFO L272 TraceCheckUtils]: 41: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,831 INFO L290 TraceCheckUtils]: 42: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 43: Hoare triple {134784#(= ~routine~0 0)} assume 0 != ~compRegistered~0; {134784#(= ~routine~0 0)} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 44: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-15 11:36:42,832 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-15 11:36:42,833 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:36:42,833 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:36:42,833 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2115497419] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:36:42,833 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:36:42,833 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-15 11:36:42,833 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:36:42,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [522009366] [2022-04-15 11:36:42,833 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [522009366] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:36:42,833 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:36:42,833 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:36:42,833 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018098814] [2022-04-15 11:36:42,833 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:36:42,834 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-15 11:36:42,834 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:36:42,834 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-15 11:36:42,884 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:36:42,884 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:36:42,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:36:42,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:36:42,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:36:42,885 INFO L87 Difference]: Start difference. First operand 4552 states and 6585 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-15 11:36:54,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:36:54,903 INFO L93 Difference]: Finished difference Result 7500 states and 10838 transitions. [2022-04-15 11:36:54,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:36:54,903 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-15 11:36:54,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:36:54,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-15 11:36:55,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-15 11:36:55,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-15 11:36:55,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-15 11:36:55,184 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4966 transitions. [2022-04-15 11:36:59,526 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4966 edges. 4966 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:37:00,568 INFO L225 Difference]: With dead ends: 7500 [2022-04-15 11:37:00,568 INFO L226 Difference]: Without dead ends: 4606 [2022-04-15 11:37:00,577 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:37:00,578 INFO L913 BasicCegarLoop]: 2819 mSDtfsCounter, 2710 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2710 SdHoareTripleChecker+Valid, 2964 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 11:37:00,578 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2710 Valid, 2964 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 11:37:00,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4606 states. [2022-04-15 11:37:01,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4606 to 4521. [2022-04-15 11:37:01,519 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:37:01,525 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-15 11:37:01,531 INFO L74 IsIncluded]: Start isIncluded. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-15 11:37:01,537 INFO L87 Difference]: Start difference. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-15 11:37:02,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:37:02,165 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-15 11:37:02,165 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-15 11:37:02,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:37:02,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:37:02,178 INFO L74 IsIncluded]: Start isIncluded. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-15 11:37:02,181 INFO L87 Difference]: Start difference. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-15 11:37:02,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:37:02,799 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-15 11:37:02,799 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-15 11:37:02,808 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:37:02,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:37:02,809 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:37:02,809 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:37:02,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-15 11:37:03,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 6531 transitions. [2022-04-15 11:37:03,861 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 6531 transitions. Word has length 51 [2022-04-15 11:37:03,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:37:03,862 INFO L478 AbstractCegarLoop]: Abstraction has 4521 states and 6531 transitions. [2022-04-15 11:37:03,862 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-15 11:37:03,862 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4521 states and 6531 transitions. [2022-04-15 11:37:24,937 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6531 edges. 6531 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:37:24,937 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-15 11:37:24,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-15 11:37:24,938 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:37:24,938 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:37:24,959 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-15 11:37:25,139 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:37:25,140 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:37:25,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:37:25,140 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 1 times [2022-04-15 11:37:25,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:37:25,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [693616272] [2022-04-15 11:37:25,147 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:37:25,148 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:37:25,148 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:37:25,148 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 2 times [2022-04-15 11:37:25,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:37:25,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453289249] [2022-04-15 11:37:25,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:37:25,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:37:25,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,439 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:37:25,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,481 INFO L290 TraceCheckUtils]: 0: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-15 11:37:25,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,482 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-15 11:37:25,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:37:25,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,523 INFO L290 TraceCheckUtils]: 0: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-15 11:37:25,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,524 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-15 11:37:25,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:37:25,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,557 INFO L290 TraceCheckUtils]: 0: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-15 11:37:25,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,557 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-15 11:37:25,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-15 11:37:25,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-04-15 11:37:25,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,607 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:37:25,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:25,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-15 11:37:25,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-15 11:37:25,616 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,616 INFO L272 TraceCheckUtils]: 1: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:37:25,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 3: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 4: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 0: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-15 11:37:25,617 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-15 11:37:25,618 INFO L272 TraceCheckUtils]: 3: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:37:25,618 INFO L290 TraceCheckUtils]: 4: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L272 TraceCheckUtils]: 5: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:37:25,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L290 TraceCheckUtils]: 10: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-15 11:37:25,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-15 11:37:25,620 INFO L290 TraceCheckUtils]: 13: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,620 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-15 11:37:25,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:37:25,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-15 11:37:25,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-15 11:37:25,623 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-15 11:37:25,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168190#(= main_~i~24 0)} is VALID [2022-04-15 11:37:25,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {168190#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168190#(= main_~i~24 0)} is VALID [2022-04-15 11:37:25,624 INFO L290 TraceCheckUtils]: 7: Hoare triple {168190#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168191#(<= main_~i~24 1)} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {168191#(<= main_~i~24 1)} assume !(~i~24 < 4); {168186#false} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {168186#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168186#false} is VALID [2022-04-15 11:37:25,625 INFO L272 TraceCheckUtils]: 10: Hoare triple {168186#false} call _BLAST_init(); {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 11: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,625 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 14: Hoare triple {168186#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168186#false} is VALID [2022-04-15 11:37:25,625 INFO L290 TraceCheckUtils]: 15: Hoare triple {168186#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L272 TraceCheckUtils]: 16: Hoare triple {168186#false} call stub_driver_init(); {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,626 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {168186#false} assume !!(~status~31 >= 0); {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 21: Hoare triple {168186#false} assume !(0 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 22: Hoare triple {168186#false} assume !(1 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 23: Hoare triple {168186#false} assume !(3 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 24: Hoare triple {168186#false} assume !(4 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-15 11:37:25,626 INFO L290 TraceCheckUtils]: 25: Hoare triple {168186#false} assume 5 == ~__BLAST_NONDET~3; {168186#false} is VALID [2022-04-15 11:37:25,627 INFO L272 TraceCheckUtils]: 26: Hoare triple {168186#false} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:37:25,627 INFO L290 TraceCheckUtils]: 27: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-15 11:37:25,627 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-15 11:37:25,627 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-15 11:37:25,627 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:37:25,628 INFO L290 TraceCheckUtils]: 31: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,628 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:37:25,628 INFO L290 TraceCheckUtils]: 33: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:25,628 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 40: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:25,629 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 42: Hoare triple {168186#false} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168186#false} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 43: Hoare triple {168186#false} assume !(0 != ~we_should_unload~0); {168186#false} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 44: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-15 11:37:25,629 INFO L290 TraceCheckUtils]: 45: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 46: Hoare triple {168186#false} assume !(~s~0 == ~UNLOADED~0); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 47: Hoare triple {168186#false} assume !(-1 == ~status~31); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 48: Hoare triple {168186#false} assume !(~s~0 != ~SKIP2~0); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 49: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 50: Hoare triple {168186#false} assume ~s~0 == ~DC~0; {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 51: Hoare triple {168186#false} assume 259 == ~status~31; {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-15 11:37:25,630 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-15 11:37:25,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:37:25,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:37:25,631 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453289249] [2022-04-15 11:37:25,631 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [453289249] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:37:25,631 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1830211770] [2022-04-15 11:37:25,631 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:37:25,631 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:37:25,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:37:25,636 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:37:25,640 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 11:37:26,418 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:37:26,419 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:37:26,425 INFO L263 TraceCheckSpWp]: Trace formula consists of 1484 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-15 11:37:26,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:37:26,463 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:37:26,634 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume !(~i~24 < 4); {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 9: Hoare triple {168185#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L272 TraceCheckUtils]: 10: Hoare triple {168185#true} call _BLAST_init(); {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 11: Hoare triple {168185#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-15 11:37:26,635 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168185#true} #6457#return; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 14: Hoare triple {168185#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 15: Hoare triple {168185#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L272 TraceCheckUtils]: 16: Hoare triple {168185#true} call stub_driver_init(); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 17: Hoare triple {168185#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168185#true} #6459#return; {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 20: Hoare triple {168185#true} assume !!(~status~31 >= 0); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 21: Hoare triple {168185#true} assume !(0 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 22: Hoare triple {168185#true} assume !(1 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 23: Hoare triple {168185#true} assume !(3 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 24: Hoare triple {168185#true} assume !(4 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-15 11:37:26,636 INFO L290 TraceCheckUtils]: 25: Hoare triple {168185#true} assume 5 == ~__BLAST_NONDET~3; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L272 TraceCheckUtils]: 26: Hoare triple {168185#true} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 27: Hoare triple {168185#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 31: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 33: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-15 11:37:26,637 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-15 11:37:26,638 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-15 11:37:26,638 INFO L290 TraceCheckUtils]: 40: Hoare triple {168350#(<= |PptDispatchCleanup_#res| 0)} assume true; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-15 11:37:26,639 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168350#(<= |PptDispatchCleanup_#res| 0)} {168185#true} #6469#return; {168357#(<= |main_#t~ret1113| 0)} is VALID [2022-04-15 11:37:26,639 INFO L290 TraceCheckUtils]: 42: Hoare triple {168357#(<= |main_#t~ret1113| 0)} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,640 INFO L290 TraceCheckUtils]: 43: Hoare triple {168361#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,640 INFO L290 TraceCheckUtils]: 44: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,640 INFO L290 TraceCheckUtils]: 45: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,641 INFO L290 TraceCheckUtils]: 46: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,641 INFO L290 TraceCheckUtils]: 47: Hoare triple {168361#(<= main_~status~31 0)} assume !(-1 == ~status~31); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,641 INFO L290 TraceCheckUtils]: 48: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,642 INFO L290 TraceCheckUtils]: 49: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,642 INFO L290 TraceCheckUtils]: 50: Hoare triple {168361#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {168361#(<= main_~status~31 0)} is VALID [2022-04-15 11:37:26,642 INFO L290 TraceCheckUtils]: 51: Hoare triple {168361#(<= main_~status~31 0)} assume 259 == ~status~31; {168186#false} is VALID [2022-04-15 11:37:26,642 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-15 11:37:26,642 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-15 11:37:26,643 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:37:26,643 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:37:26,643 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1830211770] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:37:26,643 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:37:26,643 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-15 11:37:26,643 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:37:26,643 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [693616272] [2022-04-15 11:37:26,643 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [693616272] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:37:26,643 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:37:26,643 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 11:37:26,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96338865] [2022-04-15 11:37:26,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:37:26,644 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-15 11:37:26,644 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:37:26,644 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:37:26,696 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:37:26,696 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 11:37:26,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:37:26,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 11:37:26,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-15 11:37:26,697 INFO L87 Difference]: Start difference. First operand 4521 states and 6531 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:38:00,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:00,453 INFO L93 Difference]: Finished difference Result 4536 states and 6549 transitions. [2022-04-15 11:38:00,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 11:38:00,453 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-15 11:38:00,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:38:00,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:38:00,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-15 11:38:00,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:38:00,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-15 11:38:00,611 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2816 transitions. [2022-04-15 11:38:03,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2816 edges. 2816 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:38:04,084 INFO L225 Difference]: With dead ends: 4536 [2022-04-15 11:38:04,084 INFO L226 Difference]: Without dead ends: 4519 [2022-04-15 11:38:04,085 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-15 11:38:04,085 INFO L913 BasicCegarLoop]: 2811 mSDtfsCounter, 5 mSDsluCounter, 8402 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11213 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 11:38:04,086 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11213 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 11:38:04,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4519 states. [2022-04-15 11:38:04,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4519 to 4519. [2022-04-15 11:38:04,901 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:38:04,906 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:04,910 INFO L74 IsIncluded]: Start isIncluded. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:04,915 INFO L87 Difference]: Start difference. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:05,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:05,501 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-15 11:38:05,501 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-15 11:38:05,511 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:38:05,511 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:38:05,519 INFO L74 IsIncluded]: Start isIncluded. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-15 11:38:05,526 INFO L87 Difference]: Start difference. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-15 11:38:06,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:06,143 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-15 11:38:06,144 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-15 11:38:06,150 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:38:06,151 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:38:06,151 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:38:06,151 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:38:06,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:07,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4519 states to 4519 states and 6527 transitions. [2022-04-15 11:38:07,267 INFO L78 Accepts]: Start accepts. Automaton has 4519 states and 6527 transitions. Word has length 54 [2022-04-15 11:38:07,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:38:07,267 INFO L478 AbstractCegarLoop]: Abstraction has 4519 states and 6527 transitions. [2022-04-15 11:38:07,268 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:38:07,268 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4519 states and 6527 transitions. [2022-04-15 11:38:27,824 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6527 edges. 6527 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:38:27,824 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-15 11:38:27,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-15 11:38:27,825 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:38:27,825 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:38:27,846 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-15 11:38:28,026 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:38:28,026 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:38:28,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:38:28,026 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 1 times [2022-04-15 11:38:28,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:38:28,027 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2117625876] [2022-04-15 11:38:28,048 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:38:28,049 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:38:28,049 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:38:28,049 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 2 times [2022-04-15 11:38:28,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:38:28,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527131886] [2022-04-15 11:38:28,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:38:28,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:38:28,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:28,321 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:38:28,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:28,341 INFO L290 TraceCheckUtils]: 0: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-15 11:38:28,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,341 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-15 11:38:28,375 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:38:28,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:28,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-15 11:38:28,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,384 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-15 11:38:28,406 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:38:28,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:28,415 INFO L290 TraceCheckUtils]: 0: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-15 11:38:28,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,416 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-15 11:38:28,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-15 11:38:28,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:28,425 INFO L290 TraceCheckUtils]: 0: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-15 11:38:28,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-15 11:38:28,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-15 11:38:28,426 INFO L290 TraceCheckUtils]: 3: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,426 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-15 11:38:28,429 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:38:28,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-15 11:38:28,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-15 11:38:28,429 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-15 11:38:28,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195547#(= main_~i~24 0)} is VALID [2022-04-15 11:38:28,430 INFO L290 TraceCheckUtils]: 6: Hoare triple {195547#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195547#(= main_~i~24 0)} is VALID [2022-04-15 11:38:28,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {195547#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195548#(<= main_~i~24 1)} is VALID [2022-04-15 11:38:28,431 INFO L290 TraceCheckUtils]: 8: Hoare triple {195548#(<= main_~i~24 1)} assume !(~i~24 < 4); {195543#false} is VALID [2022-04-15 11:38:28,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {195543#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195543#false} is VALID [2022-04-15 11:38:28,431 INFO L272 TraceCheckUtils]: 10: Hoare triple {195543#false} call _BLAST_init(); {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:38:28,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-15 11:38:28,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,431 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 14: Hoare triple {195543#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 15: Hoare triple {195543#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L272 TraceCheckUtils]: 16: Hoare triple {195543#false} call stub_driver_init(); {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 17: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,432 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 20: Hoare triple {195543#false} assume !!(~status~31 >= 0); {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 21: Hoare triple {195543#false} assume !(0 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 22: Hoare triple {195543#false} assume !(1 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 23: Hoare triple {195543#false} assume !(3 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-15 11:38:28,432 INFO L290 TraceCheckUtils]: 24: Hoare triple {195543#false} assume !(4 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 25: Hoare triple {195543#false} assume !(5 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 26: Hoare triple {195543#false} assume 6 == ~__BLAST_NONDET~3; {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L272 TraceCheckUtils]: 27: Hoare triple {195543#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 28: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L272 TraceCheckUtils]: 29: Hoare triple {195543#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:28,433 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-15 11:38:28,433 INFO L290 TraceCheckUtils]: 35: Hoare triple {195543#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 36: Hoare triple {195543#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 37: Hoare triple {195543#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 38: Hoare triple {195543#false} assume 3 == #t~mem1080;havoc #t~mem1080; {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 39: Hoare triple {195543#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 40: Hoare triple {195543#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L272 TraceCheckUtils]: 41: Hoare triple {195543#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 42: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 43: Hoare triple {195543#false} assume !(0 != ~compRegistered~0); {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 44: Hoare triple {195543#false} assume 0 == ~__BLAST_NONDET~14; {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 45: Hoare triple {195543#false} ~returnVal2~0 := 0; {195543#false} is VALID [2022-04-15 11:38:28,434 INFO L290 TraceCheckUtils]: 46: Hoare triple {195543#false} assume !(~s~0 == ~NP~0); {195543#false} is VALID [2022-04-15 11:38:28,435 INFO L290 TraceCheckUtils]: 47: Hoare triple {195543#false} assume !(~s~0 == ~MPR1~0); {195543#false} is VALID [2022-04-15 11:38:28,435 INFO L290 TraceCheckUtils]: 48: Hoare triple {195543#false} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-15 11:38:28,435 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-15 11:38:28,435 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-15 11:38:28,435 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:38:28,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:38:28,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527131886] [2022-04-15 11:38:28,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1527131886] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:38:28,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [927040967] [2022-04-15 11:38:28,436 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:38:28,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:38:28,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:38:28,437 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:38:28,438 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 11:38:29,289 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:38:29,290 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:38:29,294 INFO L263 TraceCheckSpWp]: Trace formula consists of 1576 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-15 11:38:29,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:38:29,328 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:38:29,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195542#true} is VALID [2022-04-15 11:38:29,433 INFO L290 TraceCheckUtils]: 6: Hoare triple {195542#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195542#true} is VALID [2022-04-15 11:38:29,435 INFO L290 TraceCheckUtils]: 7: Hoare triple {195542#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195542#true} is VALID [2022-04-15 11:38:29,435 INFO L290 TraceCheckUtils]: 8: Hoare triple {195542#true} assume !(~i~24 < 4); {195542#true} is VALID [2022-04-15 11:38:29,435 INFO L290 TraceCheckUtils]: 9: Hoare triple {195542#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195542#true} is VALID [2022-04-15 11:38:29,435 INFO L272 TraceCheckUtils]: 10: Hoare triple {195542#true} call _BLAST_init(); {195542#true} is VALID [2022-04-15 11:38:29,435 INFO L290 TraceCheckUtils]: 11: Hoare triple {195542#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195542#true} #6457#return; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 14: Hoare triple {195542#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 15: Hoare triple {195542#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L272 TraceCheckUtils]: 16: Hoare triple {195542#true} call stub_driver_init(); {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 17: Hoare triple {195542#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195542#true} #6459#return; {195542#true} is VALID [2022-04-15 11:38:29,436 INFO L290 TraceCheckUtils]: 20: Hoare triple {195542#true} assume !!(~status~31 >= 0); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 21: Hoare triple {195542#true} assume !(0 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 22: Hoare triple {195542#true} assume !(1 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 23: Hoare triple {195542#true} assume !(3 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {195542#true} assume !(4 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 25: Hoare triple {195542#true} assume !(5 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 26: Hoare triple {195542#true} assume 6 == ~__BLAST_NONDET~3; {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L272 TraceCheckUtils]: 27: Hoare triple {195542#true} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 28: Hoare triple {195542#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L272 TraceCheckUtils]: 29: Hoare triple {195542#true} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-15 11:38:29,437 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195542#true} #5849#return; {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 35: Hoare triple {195542#true} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 36: Hoare triple {195542#true} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 37: Hoare triple {195542#true} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 38: Hoare triple {195542#true} assume 3 == #t~mem1080;havoc #t~mem1080; {195542#true} is VALID [2022-04-15 11:38:29,438 INFO L290 TraceCheckUtils]: 39: Hoare triple {195542#true} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,439 INFO L290 TraceCheckUtils]: 40: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,440 INFO L272 TraceCheckUtils]: 41: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,440 INFO L290 TraceCheckUtils]: 42: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,440 INFO L290 TraceCheckUtils]: 43: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(0 != ~compRegistered~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,441 INFO L290 TraceCheckUtils]: 44: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume 0 == ~__BLAST_NONDET~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,441 INFO L290 TraceCheckUtils]: 45: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~returnVal2~0 := 0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,442 INFO L290 TraceCheckUtils]: 46: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~NP~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,442 INFO L290 TraceCheckUtils]: 47: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~MPR1~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-15 11:38:29,442 INFO L290 TraceCheckUtils]: 48: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-15 11:38:29,442 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-15 11:38:29,442 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-15 11:38:29,442 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:38:29,443 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:38:29,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [927040967] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:38:29,443 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:38:29,443 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-15 11:38:29,443 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:38:29,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2117625876] [2022-04-15 11:38:29,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2117625876] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:38:29,443 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:38:29,443 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 11:38:29,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [306245604] [2022-04-15 11:38:29,444 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:38:29,444 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-15 11:38:29,444 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:38:29,444 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-15 11:38:29,496 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:38:29,496 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 11:38:29,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:38:29,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 11:38:29,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:38:29,497 INFO L87 Difference]: Start difference. First operand 4519 states and 6527 transitions. Second operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-15 11:38:48,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:48,966 INFO L93 Difference]: Finished difference Result 4533 states and 6545 transitions. [2022-04-15 11:38:48,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 11:38:48,966 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-15 11:38:48,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:38:48,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-15 11:38:49,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-15 11:38:49,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-15 11:38:49,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-15 11:38:49,129 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2831 transitions. [2022-04-15 11:38:51,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2831 edges. 2831 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:38:52,699 INFO L225 Difference]: With dead ends: 4533 [2022-04-15 11:38:52,699 INFO L226 Difference]: Without dead ends: 4530 [2022-04-15 11:38:52,700 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-15 11:38:52,701 INFO L913 BasicCegarLoop]: 2791 mSDtfsCounter, 33 mSDsluCounter, 2726 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 5517 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 11:38:52,701 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 5517 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 11:38:52,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4530 states. [2022-04-15 11:38:53,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4530 to 4527. [2022-04-15 11:38:53,653 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:38:53,659 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:53,663 INFO L74 IsIncluded]: Start isIncluded. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:53,667 INFO L87 Difference]: Start difference. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:54,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:54,254 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-15 11:38:54,254 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-15 11:38:54,261 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:38:54,262 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:38:54,268 INFO L74 IsIncluded]: Start isIncluded. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-15 11:38:54,272 INFO L87 Difference]: Start difference. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-15 11:38:54,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:38:54,877 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-15 11:38:54,877 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-15 11:38:54,884 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:38:54,884 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:38:54,884 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:38:54,884 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:38:54,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-15 11:38:55,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4527 states to 4527 states and 6539 transitions. [2022-04-15 11:38:55,960 INFO L78 Accepts]: Start accepts. Automaton has 4527 states and 6539 transitions. Word has length 51 [2022-04-15 11:38:55,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:38:55,960 INFO L478 AbstractCegarLoop]: Abstraction has 4527 states and 6539 transitions. [2022-04-15 11:38:55,960 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-15 11:38:55,960 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4527 states and 6539 transitions. [2022-04-15 11:39:16,964 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6539 edges. 6539 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:39:16,964 INFO L276 IsEmpty]: Start isEmpty. Operand 4527 states and 6539 transitions. [2022-04-15 11:39:16,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-15 11:39:16,965 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:39:16,965 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:39:16,986 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-15 11:39:17,165 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-15 11:39:17,166 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:39:17,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:39:17,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 1 times [2022-04-15 11:39:17,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:39:17,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1317952677] [2022-04-15 11:39:17,185 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:39:17,185 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:39:17,185 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:39:17,185 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 2 times [2022-04-15 11:39:17,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:39:17,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101778078] [2022-04-15 11:39:17,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:39:17,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:39:17,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,449 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:39:17,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,469 INFO L290 TraceCheckUtils]: 0: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-15 11:39:17,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,470 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-15 11:39:17,498 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:39:17,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,507 INFO L290 TraceCheckUtils]: 0: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-15 11:39:17,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,508 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-15 11:39:17,523 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:39:17,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,532 INFO L290 TraceCheckUtils]: 0: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-15 11:39:17,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,533 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-15 11:39:17,533 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-15 11:39:17,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-15 11:39:17,598 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-15 11:39:17,598 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,598 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-15 11:39:17,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-15 11:39:17,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:39:17,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,694 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-15 11:39:17,695 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,695 INFO L290 TraceCheckUtils]: 2: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-15 11:39:17,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-15 11:39:17,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:39:17,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,742 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:39:17,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:17,753 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,753 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-15 11:39:17,753 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,753 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-15 11:39:17,753 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,754 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,754 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-15 11:39:17,754 INFO L290 TraceCheckUtils]: 4: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,754 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-15 11:39:17,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,755 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-15 11:39:17,755 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-15 11:39:17,755 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,756 INFO L272 TraceCheckUtils]: 3: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,756 INFO L290 TraceCheckUtils]: 4: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 10: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,757 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-15 11:39:17,757 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-15 11:39:17,758 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-15 11:39:17,758 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-15 11:39:17,758 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,758 INFO L290 TraceCheckUtils]: 4: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,759 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-15 11:39:17,760 INFO L290 TraceCheckUtils]: 6: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-15 11:39:17,760 INFO L290 TraceCheckUtils]: 7: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-15 11:39:17,760 INFO L272 TraceCheckUtils]: 8: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:39:17,761 INFO L290 TraceCheckUtils]: 9: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-15 11:39:17,761 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,761 INFO L290 TraceCheckUtils]: 11: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,762 INFO L272 TraceCheckUtils]: 12: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,762 INFO L290 TraceCheckUtils]: 13: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,762 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-15 11:39:17,762 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,762 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-15 11:39:17,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,763 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-15 11:39:17,763 INFO L290 TraceCheckUtils]: 19: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-15 11:39:17,763 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,763 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-15 11:39:17,763 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-15 11:39:17,763 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-15 11:39:17,763 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:17,763 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-15 11:39:17,767 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:39:17,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-15 11:39:17,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,767 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-15 11:39:17,767 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-15 11:39:17,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222901#(= main_~i~24 0)} is VALID [2022-04-15 11:39:17,768 INFO L290 TraceCheckUtils]: 6: Hoare triple {222901#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222901#(= main_~i~24 0)} is VALID [2022-04-15 11:39:17,768 INFO L290 TraceCheckUtils]: 7: Hoare triple {222901#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222902#(<= main_~i~24 1)} is VALID [2022-04-15 11:39:17,769 INFO L290 TraceCheckUtils]: 8: Hoare triple {222902#(<= main_~i~24 1)} assume !(~i~24 < 4); {222897#false} is VALID [2022-04-15 11:39:17,769 INFO L290 TraceCheckUtils]: 9: Hoare triple {222897#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222897#false} is VALID [2022-04-15 11:39:17,769 INFO L272 TraceCheckUtils]: 10: Hoare triple {222897#false} call _BLAST_init(); {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:39:17,769 INFO L290 TraceCheckUtils]: 11: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-15 11:39:17,769 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,769 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 14: Hoare triple {222897#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 15: Hoare triple {222897#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L272 TraceCheckUtils]: 16: Hoare triple {222897#false} call stub_driver_init(); {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 17: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,770 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 20: Hoare triple {222897#false} assume !!(~status~31 >= 0); {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 21: Hoare triple {222897#false} assume !(0 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume !(1 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-15 11:39:17,770 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} assume 3 == ~__BLAST_NONDET~3; {222897#false} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222897#false} is VALID [2022-04-15 11:39:17,771 INFO L272 TraceCheckUtils]: 25: Hoare triple {222897#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222897#false} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 26: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222897#false} is VALID [2022-04-15 11:39:17,771 INFO L272 TraceCheckUtils]: 27: Hoare triple {222897#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,771 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-15 11:39:17,771 INFO L272 TraceCheckUtils]: 32: Hoare triple {222897#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:39:17,771 INFO L290 TraceCheckUtils]: 33: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-15 11:39:17,772 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-15 11:39:17,772 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-15 11:39:17,772 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,772 INFO L290 TraceCheckUtils]: 37: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-15 11:39:17,773 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-15 11:39:17,774 INFO L290 TraceCheckUtils]: 39: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-15 11:39:17,774 INFO L290 TraceCheckUtils]: 40: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-15 11:39:17,774 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:39:17,774 INFO L290 TraceCheckUtils]: 42: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-15 11:39:17,775 INFO L272 TraceCheckUtils]: 43: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,775 INFO L290 TraceCheckUtils]: 44: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,776 INFO L272 TraceCheckUtils]: 45: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:39:17,776 INFO L290 TraceCheckUtils]: 46: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-15 11:39:17,776 INFO L290 TraceCheckUtils]: 47: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-15 11:39:17,776 INFO L290 TraceCheckUtils]: 48: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,776 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-15 11:39:17,776 INFO L290 TraceCheckUtils]: 50: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,777 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 52: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 53: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:17,777 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:17,777 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-15 11:39:17,777 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-15 11:39:17,778 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-15 11:39:17,779 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:39:17,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:39:17,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101778078] [2022-04-15 11:39:17,779 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2101778078] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:39:17,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [463124571] [2022-04-15 11:39:17,779 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:39:17,779 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:39:17,780 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:39:17,784 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:39:17,787 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 11:39:18,676 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:39:18,677 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:39:18,685 INFO L263 TraceCheckSpWp]: Trace formula consists of 1862 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-15 11:39:18,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:39:18,738 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:39:18,951 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222896#true} is VALID [2022-04-15 11:39:18,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 7: Hoare triple {222896#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume !(~i~24 < 4); {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {222896#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call _BLAST_init(); {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222896#true} #6457#return; {222896#true} is VALID [2022-04-15 11:39:18,952 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L272 TraceCheckUtils]: 16: Hoare triple {222896#true} call stub_driver_init(); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222896#true} #6459#return; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume !!(~status~31 >= 0); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 21: Hoare triple {222896#true} assume !(0 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 22: Hoare triple {222896#true} assume !(1 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 23: Hoare triple {222896#true} assume 3 == ~__BLAST_NONDET~3; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 24: Hoare triple {222896#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L272 TraceCheckUtils]: 25: Hoare triple {222896#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L290 TraceCheckUtils]: 26: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222896#true} is VALID [2022-04-15 11:39:18,953 INFO L272 TraceCheckUtils]: 27: Hoare triple {222896#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222896#true} #5941#return; {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L272 TraceCheckUtils]: 32: Hoare triple {222896#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 33: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-15 11:39:18,954 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-15 11:39:18,955 INFO L290 TraceCheckUtils]: 37: Hoare triple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} assume true; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-15 11:39:18,956 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} {222896#true} #6705#return; {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} is VALID [2022-04-15 11:39:18,956 INFO L290 TraceCheckUtils]: 39: Hoare triple {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-15 11:39:18,956 INFO L290 TraceCheckUtils]: 40: Hoare triple {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 42: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L272 TraceCheckUtils]: 43: Hoare triple {222897#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 44: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L272 TraceCheckUtils]: 45: Hoare triple {222897#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 46: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 47: Hoare triple {222897#false} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 48: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222897#false} {222897#false} #6659#return; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 50: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222897#false} {222897#false} #6455#return; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 52: Hoare triple {222897#false} #res := ~Status; {222897#false} is VALID [2022-04-15 11:39:18,957 INFO L290 TraceCheckUtils]: 53: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222897#false} {222897#false} #6707#return; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222896#true} #5943#return; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-15 11:39:18,958 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-15 11:39:18,959 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-15 11:39:18,959 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-15 11:39:18,959 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:39:18,959 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:39:18,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [463124571] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:39:18,959 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:39:18,959 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [12] total 15 [2022-04-15 11:39:18,959 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:39:18,959 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1317952677] [2022-04-15 11:39:18,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1317952677] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:39:18,960 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:39:18,960 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 11:39:18,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150315836] [2022-04-15 11:39:18,960 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:39:18,960 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-15 11:39:18,960 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:39:18,960 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:39:19,025 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:39:19,025 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 11:39:19,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:39:19,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 11:39:19,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-15 11:39:19,026 INFO L87 Difference]: Start difference. First operand 4527 states and 6539 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:39:57,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:39:57,317 INFO L93 Difference]: Finished difference Result 8396 states and 12123 transitions. [2022-04-15 11:39:57,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 11:39:57,317 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-15 11:39:57,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:39:57,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:39:57,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-15 11:39:57,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:39:57,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-15 11:39:57,640 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 5306 transitions. [2022-04-15 11:40:02,878 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5306 edges. 5306 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:40:03,914 INFO L225 Difference]: With dead ends: 8396 [2022-04-15 11:40:03,915 INFO L226 Difference]: Without dead ends: 4531 [2022-04-15 11:40:03,923 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-15 11:40:03,923 INFO L913 BasicCegarLoop]: 2793 mSDtfsCounter, 3 mSDsluCounter, 8372 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 11165 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 11:40:03,924 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 11165 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 11:40:03,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4531 states. [2022-04-15 11:40:04,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4531 to 4531. [2022-04-15 11:40:04,744 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:40:04,750 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-15 11:40:04,755 INFO L74 IsIncluded]: Start isIncluded. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-15 11:40:04,761 INFO L87 Difference]: Start difference. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-15 11:40:05,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:40:05,392 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-15 11:40:05,392 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-15 11:40:05,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:40:05,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:40:05,407 INFO L74 IsIncluded]: Start isIncluded. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-15 11:40:05,412 INFO L87 Difference]: Start difference. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-15 11:40:06,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:40:06,067 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-15 11:40:06,067 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-15 11:40:06,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:40:06,074 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:40:06,074 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:40:06,074 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:40:06,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-15 11:40:07,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4531 states to 4531 states and 6544 transitions. [2022-04-15 11:40:07,256 INFO L78 Accepts]: Start accepts. Automaton has 4531 states and 6544 transitions. Word has length 69 [2022-04-15 11:40:07,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:40:07,256 INFO L478 AbstractCegarLoop]: Abstraction has 4531 states and 6544 transitions. [2022-04-15 11:40:07,256 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:40:07,257 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4531 states and 6544 transitions. [2022-04-15 11:40:28,852 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6544 edges. 6544 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:40:28,852 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-15 11:40:28,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-15 11:40:28,853 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:40:28,853 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:40:28,875 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 11:40:29,054 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-15 11:40:29,054 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:40:29,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:40:29,055 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 1 times [2022-04-15 11:40:29,055 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:40:29,055 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2028336688] [2022-04-15 11:40:29,060 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:40:29,060 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:40:29,060 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:40:29,060 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 2 times [2022-04-15 11:40:29,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:40:29,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380047898] [2022-04-15 11:40:29,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:40:29,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:40:29,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:40:29,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,419 INFO L290 TraceCheckUtils]: 0: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-15 11:40:29,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,419 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-15 11:40:29,455 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:40:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-15 11:40:29,465 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,465 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-15 11:40:29,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:40:29,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,495 INFO L290 TraceCheckUtils]: 0: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-15 11:40:29,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,495 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-15 11:40:29,495 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-15 11:40:29,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,506 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-15 11:40:29,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-15 11:40:29,507 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,507 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-15 11:40:29,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-15 11:40:29,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:40:29,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-15 11:40:29,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-15 11:40:29,552 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-15 11:40:29,552 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-15 11:40:29,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,571 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:40:29,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,580 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:40:29,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:29,589 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:29,589 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,590 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:29,590 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,590 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-15 11:40:29,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-15 11:40:29,592 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,592 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L272 TraceCheckUtils]: 3: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,593 INFO L290 TraceCheckUtils]: 4: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,593 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,594 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-15 11:40:29,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-15 11:40:29,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-15 11:40:29,596 INFO L272 TraceCheckUtils]: 8: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:40:29,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-15 11:40:29,596 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,597 INFO L272 TraceCheckUtils]: 12: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,597 INFO L290 TraceCheckUtils]: 13: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,597 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:29,597 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 19: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-15 11:40:29,598 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,599 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-15 11:40:29,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:40:29,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-15 11:40:29,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-15 11:40:29,603 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-15 11:40:29,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258106#(= main_~i~24 0)} is VALID [2022-04-15 11:40:29,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {258106#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258106#(= main_~i~24 0)} is VALID [2022-04-15 11:40:29,604 INFO L290 TraceCheckUtils]: 7: Hoare triple {258106#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258107#(<= main_~i~24 1)} is VALID [2022-04-15 11:40:29,604 INFO L290 TraceCheckUtils]: 8: Hoare triple {258107#(<= main_~i~24 1)} assume !(~i~24 < 4); {258102#false} is VALID [2022-04-15 11:40:29,604 INFO L290 TraceCheckUtils]: 9: Hoare triple {258102#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258102#false} is VALID [2022-04-15 11:40:29,604 INFO L272 TraceCheckUtils]: 10: Hoare triple {258102#false} call _BLAST_init(); {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 11: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,605 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 14: Hoare triple {258102#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258102#false} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 15: Hoare triple {258102#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258102#false} is VALID [2022-04-15 11:40:29,605 INFO L272 TraceCheckUtils]: 16: Hoare triple {258102#false} call stub_driver_init(); {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 17: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,605 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-15 11:40:29,605 INFO L290 TraceCheckUtils]: 20: Hoare triple {258102#false} assume !!(~status~31 >= 0); {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 21: Hoare triple {258102#false} assume !(0 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 22: Hoare triple {258102#false} assume !(1 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 23: Hoare triple {258102#false} assume 3 == ~__BLAST_NONDET~3; {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 24: Hoare triple {258102#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L272 TraceCheckUtils]: 25: Hoare triple {258102#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 26: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258102#false} is VALID [2022-04-15 11:40:29,606 INFO L272 TraceCheckUtils]: 27: Hoare triple {258102#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-15 11:40:29,606 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-15 11:40:29,607 INFO L272 TraceCheckUtils]: 32: Hoare triple {258102#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:40:29,607 INFO L290 TraceCheckUtils]: 33: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L290 TraceCheckUtils]: 37: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-15 11:40:29,607 INFO L290 TraceCheckUtils]: 39: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-15 11:40:29,608 INFO L290 TraceCheckUtils]: 40: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-15 11:40:29,608 INFO L272 TraceCheckUtils]: 41: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:40:29,609 INFO L290 TraceCheckUtils]: 42: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-15 11:40:29,609 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,609 INFO L290 TraceCheckUtils]: 44: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,610 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:40:29,610 INFO L290 TraceCheckUtils]: 46: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:29,610 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:29,610 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,610 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 55: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 56: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 57: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:29,611 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-15 11:40:29,611 INFO L290 TraceCheckUtils]: 59: Hoare triple {258102#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 60: Hoare triple {258102#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-15 11:40:29,612 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-15 11:40:29,613 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:40:29,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:40:29,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1380047898] [2022-04-15 11:40:29,613 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1380047898] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:40:29,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [130421219] [2022-04-15 11:40:29,613 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:40:29,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:40:29,614 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:40:29,616 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:40:29,655 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 11:40:30,680 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:40:30,680 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:40:30,686 INFO L263 TraceCheckSpWp]: Trace formula consists of 1863 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 11:40:30,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:40:30,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:40:30,996 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258101#true} is VALID [2022-04-15 11:40:30,996 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume !(~i~24 < 4); {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 9: Hoare triple {258101#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call _BLAST_init(); {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-15 11:40:30,997 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258101#true} #6457#return; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L272 TraceCheckUtils]: 16: Hoare triple {258101#true} call stub_driver_init(); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258101#true} #6459#return; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume !!(~status~31 >= 0); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 21: Hoare triple {258101#true} assume !(0 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume !(1 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} assume 3 == ~__BLAST_NONDET~3; {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L272 TraceCheckUtils]: 25: Hoare triple {258101#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258101#true} is VALID [2022-04-15 11:40:30,998 INFO L290 TraceCheckUtils]: 26: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L272 TraceCheckUtils]: 27: Hoare triple {258101#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258101#true} #5941#return; {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L272 TraceCheckUtils]: 32: Hoare triple {258101#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L290 TraceCheckUtils]: 33: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-15 11:40:30,999 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-15 11:40:31,000 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-15 11:40:31,003 INFO L290 TraceCheckUtils]: 37: Hoare triple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} assume true; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-15 11:40:31,005 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} {258101#true} #6705#return; {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} is VALID [2022-04-15 11:40:31,005 INFO L290 TraceCheckUtils]: 39: Hoare triple {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-15 11:40:31,006 INFO L290 TraceCheckUtils]: 40: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume !(~status~23 >= 0); {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-15 11:40:31,006 INFO L272 TraceCheckUtils]: 41: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258101#true} is VALID [2022-04-15 11:40:31,006 INFO L290 TraceCheckUtils]: 42: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-15 11:40:31,006 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258101#true} is VALID [2022-04-15 11:40:31,006 INFO L290 TraceCheckUtils]: 44: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:31,006 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 46: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-15 11:40:31,007 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-15 11:40:31,008 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #6707#return; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-15 11:40:31,009 INFO L290 TraceCheckUtils]: 55: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-15 11:40:31,009 INFO L290 TraceCheckUtils]: 56: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #res := ~status~23; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-15 11:40:31,009 INFO L290 TraceCheckUtils]: 57: Hoare triple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} assume true; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-15 11:40:31,011 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} {258101#true} #5943#return; {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} is VALID [2022-04-15 11:40:31,011 INFO L290 TraceCheckUtils]: 59: Hoare triple {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} is VALID [2022-04-15 11:40:31,012 INFO L290 TraceCheckUtils]: 60: Hoare triple {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-15 11:40:31,012 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-15 11:40:31,012 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-15 11:40:31,012 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-15 11:40:31,012 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-15 11:40:31,012 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-15 11:40:31,013 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-15 11:40:31,013 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-15 11:40:31,013 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-15 11:40:31,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:40:31,013 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:40:31,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [130421219] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:40:31,013 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:40:31,013 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-15 11:40:31,014 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:40:31,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2028336688] [2022-04-15 11:40:31,014 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2028336688] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:40:31,014 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:40:31,014 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-15 11:40:31,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [617457943] [2022-04-15 11:40:31,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:40:31,015 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-15 11:40:31,015 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:40:31,015 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:40:31,089 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:40:31,089 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-15 11:40:31,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:40:31,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-15 11:40:31,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-15 11:40:31,090 INFO L87 Difference]: Start difference. First operand 4531 states and 6544 transitions. Second operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:41:36,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:41:36,826 INFO L93 Difference]: Finished difference Result 7739 states and 11131 transitions. [2022-04-15 11:41:36,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 11:41:36,826 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-15 11:41:36,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:41:36,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:41:36,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-15 11:41:36,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:41:37,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-15 11:41:37,148 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 5302 transitions. [2022-04-15 11:41:42,771 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5302 edges. 5302 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:41:43,818 INFO L225 Difference]: With dead ends: 7739 [2022-04-15 11:41:43,818 INFO L226 Difference]: Without dead ends: 4406 [2022-04-15 11:41:43,825 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2022-04-15 11:41:43,825 INFO L913 BasicCegarLoop]: 2789 mSDtfsCounter, 5 mSDsluCounter, 16695 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 19484 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 11:41:43,825 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 19484 Invalid, 71 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 11:41:43,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4406 states. [2022-04-15 11:41:44,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4406 to 4403. [2022-04-15 11:41:44,584 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:41:44,590 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-15 11:41:44,595 INFO L74 IsIncluded]: Start isIncluded. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-15 11:41:44,599 INFO L87 Difference]: Start difference. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-15 11:41:45,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:41:45,238 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-15 11:41:45,238 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-15 11:41:45,244 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:41:45,244 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:41:45,250 INFO L74 IsIncluded]: Start isIncluded. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-15 11:41:45,253 INFO L87 Difference]: Start difference. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-15 11:41:45,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:41:45,848 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-15 11:41:45,849 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-15 11:41:45,855 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:41:45,855 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:41:45,855 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:41:45,856 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:41:45,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-15 11:41:46,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4403 states to 4403 states and 6322 transitions. [2022-04-15 11:41:46,944 INFO L78 Accepts]: Start accepts. Automaton has 4403 states and 6322 transitions. Word has length 69 [2022-04-15 11:41:46,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:41:46,945 INFO L478 AbstractCegarLoop]: Abstraction has 4403 states and 6322 transitions. [2022-04-15 11:41:46,945 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-15 11:41:46,945 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4403 states and 6322 transitions. [2022-04-15 11:42:08,932 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6322 edges. 6322 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:42:08,933 INFO L276 IsEmpty]: Start isEmpty. Operand 4403 states and 6322 transitions. [2022-04-15 11:42:08,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-15 11:42:08,934 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:42:08,934 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:42:08,960 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 11:42:09,148 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-15 11:42:09,148 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:42:09,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:42:09,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 1 times [2022-04-15 11:42:09,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:42:09,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [569332345] [2022-04-15 11:42:09,155 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:42:09,155 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:42:09,155 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:42:09,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 2 times [2022-04-15 11:42:09,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:42:09,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193701045] [2022-04-15 11:42:09,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:42:09,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:42:09,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,398 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:42:09,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,422 INFO L290 TraceCheckUtils]: 0: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-15 11:42:09,423 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,423 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-15 11:42:09,454 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:42:09,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,490 INFO L290 TraceCheckUtils]: 0: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-15 11:42:09,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,490 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-15 11:42:09,510 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:42:09,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,531 INFO L290 TraceCheckUtils]: 0: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-15 11:42:09,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,531 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-15 11:42:09,545 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 11:42:09,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,568 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-15 11:42:09,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,580 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:42:09,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:09,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-15 11:42:09,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-15 11:42:09,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,591 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-15 11:42:09,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L272 TraceCheckUtils]: 1: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 3: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 4: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-15 11:42:09,592 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,593 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-15 11:42:09,593 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-15 11:42:09,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-15 11:42:09,594 INFO L272 TraceCheckUtils]: 2: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:42:09,594 INFO L290 TraceCheckUtils]: 3: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-15 11:42:09,594 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-15 11:42:09,594 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-15 11:42:09,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-15 11:42:09,594 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 10: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L290 TraceCheckUtils]: 16: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,595 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-15 11:42:09,598 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:42:09,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-15 11:42:09,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-15 11:42:09,599 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-15 11:42:09,599 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291493#(= main_~i~24 0)} is VALID [2022-04-15 11:42:09,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {291493#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291493#(= main_~i~24 0)} is VALID [2022-04-15 11:42:09,600 INFO L290 TraceCheckUtils]: 7: Hoare triple {291493#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291494#(<= main_~i~24 1)} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 8: Hoare triple {291494#(<= main_~i~24 1)} assume !(~i~24 < 4); {291489#false} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 9: Hoare triple {291489#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291489#false} is VALID [2022-04-15 11:42:09,601 INFO L272 TraceCheckUtils]: 10: Hoare triple {291489#false} call _BLAST_init(); {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 11: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,601 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 14: Hoare triple {291489#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291489#false} is VALID [2022-04-15 11:42:09,601 INFO L290 TraceCheckUtils]: 15: Hoare triple {291489#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291489#false} is VALID [2022-04-15 11:42:09,601 INFO L272 TraceCheckUtils]: 16: Hoare triple {291489#false} call stub_driver_init(); {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:42:09,602 INFO L290 TraceCheckUtils]: 17: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-15 11:42:09,602 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,602 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-15 11:42:09,602 INFO L290 TraceCheckUtils]: 20: Hoare triple {291489#false} assume !!(~status~31 >= 0); {291489#false} is VALID [2022-04-15 11:42:09,602 INFO L290 TraceCheckUtils]: 21: Hoare triple {291489#false} assume 0 == ~__BLAST_NONDET~3; {291489#false} is VALID [2022-04-15 11:42:09,603 INFO L272 TraceCheckUtils]: 22: Hoare triple {291489#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:42:09,603 INFO L290 TraceCheckUtils]: 23: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-15 11:42:09,603 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:42:09,604 INFO L290 TraceCheckUtils]: 26: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-15 11:42:09,604 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 34: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 35: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 37: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 38: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 39: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:09,605 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-15 11:42:09,605 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-15 11:42:09,606 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-15 11:42:09,607 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:42:09,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:42:09,607 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193701045] [2022-04-15 11:42:09,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193701045] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:42:09,607 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [792814257] [2022-04-15 11:42:09,608 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:42:09,608 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:42:09,608 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:42:09,612 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:42:09,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 11:42:10,447 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:42:10,448 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:42:10,452 INFO L263 TraceCheckSpWp]: Trace formula consists of 1514 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-15 11:42:10,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:42:10,495 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:42:10,667 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} assume !(~i~24 < 4); {291488#true} is VALID [2022-04-15 11:42:10,667 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L272 TraceCheckUtils]: 10: Hoare triple {291488#true} call _BLAST_init(); {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #6457#return; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L272 TraceCheckUtils]: 16: Hoare triple {291488#true} call stub_driver_init(); {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 17: Hoare triple {291488#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291488#true} #6459#return; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 20: Hoare triple {291488#true} assume !!(~status~31 >= 0); {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L290 TraceCheckUtils]: 21: Hoare triple {291488#true} assume 0 == ~__BLAST_NONDET~3; {291488#true} is VALID [2022-04-15 11:42:10,668 INFO L272 TraceCheckUtils]: 22: Hoare triple {291488#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 23: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 26: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-15 11:42:10,669 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-15 11:42:10,670 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-15 11:42:10,670 INFO L290 TraceCheckUtils]: 34: Hoare triple {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} #res := ~status~23; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-15 11:42:10,670 INFO L290 TraceCheckUtils]: 35: Hoare triple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} assume true; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-15 11:42:10,671 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} {291488#true} #5993#return; {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 37: Hoare triple {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291655#(<= 0 PptDispatchCreate_~status~1)} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 38: Hoare triple {291655#(<= 0 PptDispatchCreate_~status~1)} assume !(~status~1 >= 0);#res := ~status~1; {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 39: Hoare triple {291489#false} assume true; {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291489#false} {291488#true} #6461#return; {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-15 11:42:10,672 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-15 11:42:10,673 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:42:10,673 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:42:10,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [792814257] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:42:10,673 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:42:10,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-04-15 11:42:10,674 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:42:10,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [569332345] [2022-04-15 11:42:10,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [569332345] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:42:10,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:42:10,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 11:42:10,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650276436] [2022-04-15 11:42:10,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:42:10,674 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-15 11:42:10,675 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:42:10,675 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:42:10,736 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:42:10,736 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 11:42:10,736 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:42:10,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 11:42:10,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2022-04-15 11:42:10,737 INFO L87 Difference]: Start difference. First operand 4403 states and 6322 transitions. Second operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:42:56,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:42:56,860 INFO L93 Difference]: Finished difference Result 4446 states and 6373 transitions. [2022-04-15 11:42:56,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 11:42:56,860 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-15 11:42:56,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 11:42:56,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:42:56,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-15 11:42:56,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:42:57,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-15 11:42:57,020 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 2848 transitions. [2022-04-15 11:42:59,972 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:43:00,978 INFO L225 Difference]: With dead ends: 4446 [2022-04-15 11:43:00,978 INFO L226 Difference]: Without dead ends: 4402 [2022-04-15 11:43:00,980 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2022-04-15 11:43:00,980 INFO L913 BasicCegarLoop]: 2785 mSDtfsCounter, 10 mSDsluCounter, 11121 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 13906 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 11:43:00,980 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 13906 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 11:43:00,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4402 states. [2022-04-15 11:43:01,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4402 to 4400. [2022-04-15 11:43:01,793 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 11:43:01,799 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-15 11:43:01,802 INFO L74 IsIncluded]: Start isIncluded. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-15 11:43:01,806 INFO L87 Difference]: Start difference. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-15 11:43:02,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:43:02,383 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-15 11:43:02,383 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-15 11:43:02,389 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:43:02,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:43:02,395 INFO L74 IsIncluded]: Start isIncluded. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-15 11:43:02,398 INFO L87 Difference]: Start difference. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-15 11:43:03,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 11:43:03,005 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-15 11:43:03,005 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-15 11:43:03,011 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 11:43:03,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 11:43:03,011 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 11:43:03,011 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 11:43:03,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-15 11:43:03,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4400 states to 4400 states and 6318 transitions. [2022-04-15 11:43:03,999 INFO L78 Accepts]: Start accepts. Automaton has 4400 states and 6318 transitions. Word has length 52 [2022-04-15 11:43:04,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 11:43:04,000 INFO L478 AbstractCegarLoop]: Abstraction has 4400 states and 6318 transitions. [2022-04-15 11:43:04,000 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-15 11:43:04,000 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4400 states and 6318 transitions. [2022-04-15 11:43:25,577 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6318 edges. 6318 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:43:25,577 INFO L276 IsEmpty]: Start isEmpty. Operand 4400 states and 6318 transitions. [2022-04-15 11:43:25,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-15 11:43:25,578 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 11:43:25,578 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 11:43:25,599 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 11:43:25,778 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-15 11:43:25,779 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 11:43:25,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 11:43:25,779 INFO L85 PathProgramCache]: Analyzing trace with hash 851781494, now seen corresponding path program 1 times [2022-04-15 11:43:25,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 11:43:25,779 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [862960398] [2022-04-15 11:43:25,785 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 11:43:25,785 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-15 11:43:25,785 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-15 11:43:25,785 INFO L85 PathProgramCache]: Analyzing trace with hash 851781494, now seen corresponding path program 2 times [2022-04-15 11:43:25,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 11:43:25,785 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070681328] [2022-04-15 11:43:25,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 11:43:25,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 11:43:25,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,055 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 11:43:26,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,080 INFO L290 TraceCheckUtils]: 0: Hoare triple {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-15 11:43:26,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,081 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-15 11:43:26,114 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-15 11:43:26,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,124 INFO L290 TraceCheckUtils]: 0: Hoare triple {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-15 11:43:26,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,124 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318198#false} #6457#return; {318198#false} is VALID [2022-04-15 11:43:26,143 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 11:43:26,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,153 INFO L290 TraceCheckUtils]: 0: Hoare triple {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-15 11:43:26,153 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,153 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318198#false} #6459#return; {318198#false} is VALID [2022-04-15 11:43:26,169 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 11:43:26,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-15 11:43:26,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,208 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:43:26,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-15 11:43:26,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:26,227 INFO L290 TraceCheckUtils]: 0: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:26,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,228 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:26,228 INFO L290 TraceCheckUtils]: 0: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L272 TraceCheckUtils]: 1: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L290 TraceCheckUtils]: 3: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L290 TraceCheckUtils]: 4: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,229 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-15 11:43:26,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-15 11:43:26,230 INFO L272 TraceCheckUtils]: 1: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,231 INFO L272 TraceCheckUtils]: 3: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,231 INFO L290 TraceCheckUtils]: 4: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:26,231 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L290 TraceCheckUtils]: 10: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L290 TraceCheckUtils]: 0: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-15 11:43:26,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-15 11:43:26,233 INFO L272 TraceCheckUtils]: 2: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:43:26,234 INFO L290 TraceCheckUtils]: 3: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-15 11:43:26,234 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,234 INFO L290 TraceCheckUtils]: 5: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,235 INFO L272 TraceCheckUtils]: 6: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,235 INFO L290 TraceCheckUtils]: 7: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L290 TraceCheckUtils]: 9: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L290 TraceCheckUtils]: 14: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-15 11:43:26,236 INFO L290 TraceCheckUtils]: 16: Hoare triple {318197#true} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318197#true} is VALID [2022-04-15 11:43:26,237 INFO L290 TraceCheckUtils]: 17: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,237 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {318197#true} {318198#false} #6461#return; {318198#false} is VALID [2022-04-15 11:43:26,240 INFO L272 TraceCheckUtils]: 0: Hoare triple {318197#true} call ULTIMATE.init(); {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 11:43:26,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-15 11:43:26,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,241 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-15 11:43:26,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call #t~ret1155 := main(); {318197#true} is VALID [2022-04-15 11:43:26,241 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318202#(= main_~i~24 0)} is VALID [2022-04-15 11:43:26,241 INFO L290 TraceCheckUtils]: 6: Hoare triple {318202#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {318202#(= main_~i~24 0)} is VALID [2022-04-15 11:43:26,242 INFO L290 TraceCheckUtils]: 7: Hoare triple {318202#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318203#(<= main_~i~24 1)} is VALID [2022-04-15 11:43:26,242 INFO L290 TraceCheckUtils]: 8: Hoare triple {318203#(<= main_~i~24 1)} assume !(~i~24 < 4); {318198#false} is VALID [2022-04-15 11:43:26,242 INFO L290 TraceCheckUtils]: 9: Hoare triple {318198#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318198#false} is VALID [2022-04-15 11:43:26,242 INFO L272 TraceCheckUtils]: 10: Hoare triple {318198#false} call _BLAST_init(); {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 11: Hoare triple {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 12: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,243 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318197#true} {318198#false} #6457#return; {318198#false} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 14: Hoare triple {318198#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {318198#false} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 15: Hoare triple {318198#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {318198#false} is VALID [2022-04-15 11:43:26,243 INFO L272 TraceCheckUtils]: 16: Hoare triple {318198#false} call stub_driver_init(); {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 17: Hoare triple {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 18: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,243 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318197#true} {318198#false} #6459#return; {318198#false} is VALID [2022-04-15 11:43:26,243 INFO L290 TraceCheckUtils]: 20: Hoare triple {318198#false} assume !!(~status~31 >= 0); {318198#false} is VALID [2022-04-15 11:43:26,244 INFO L290 TraceCheckUtils]: 21: Hoare triple {318198#false} assume 0 == ~__BLAST_NONDET~3; {318198#false} is VALID [2022-04-15 11:43:26,244 INFO L272 TraceCheckUtils]: 22: Hoare triple {318198#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:43:26,244 INFO L290 TraceCheckUtils]: 23: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-15 11:43:26,244 INFO L290 TraceCheckUtils]: 24: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-15 11:43:26,245 INFO L272 TraceCheckUtils]: 25: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-15 11:43:26,245 INFO L290 TraceCheckUtils]: 26: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-15 11:43:26,246 INFO L272 TraceCheckUtils]: 27: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,246 INFO L290 TraceCheckUtils]: 28: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,246 INFO L272 TraceCheckUtils]: 29: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-15 11:43:26,246 INFO L290 TraceCheckUtils]: 30: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 31: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 32: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 34: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 36: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 37: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-15 11:43:26,247 INFO L290 TraceCheckUtils]: 39: Hoare triple {318197#true} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318197#true} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 40: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:26,248 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {318197#true} {318198#false} #6461#return; {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 42: Hoare triple {318198#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 43: Hoare triple {318198#false} assume !(0 != ~we_should_unload~0); {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 44: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 45: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 46: Hoare triple {318198#false} assume !(~s~0 == ~UNLOADED~0); {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 47: Hoare triple {318198#false} assume !(-1 == ~status~31); {318198#false} is VALID [2022-04-15 11:43:26,248 INFO L290 TraceCheckUtils]: 48: Hoare triple {318198#false} assume !(~s~0 != ~SKIP2~0); {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L290 TraceCheckUtils]: 49: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L290 TraceCheckUtils]: 50: Hoare triple {318198#false} assume ~s~0 == ~DC~0; {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L290 TraceCheckUtils]: 51: Hoare triple {318198#false} assume 259 == ~status~31; {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L272 TraceCheckUtils]: 52: Hoare triple {318198#false} call errorFn(); {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L290 TraceCheckUtils]: 53: Hoare triple {318198#false} assume !false; {318198#false} is VALID [2022-04-15 11:43:26,249 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 11:43:26,249 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 11:43:26,250 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070681328] [2022-04-15 11:43:26,250 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2070681328] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 11:43:26,250 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [984984914] [2022-04-15 11:43:26,250 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 11:43:26,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 11:43:26,251 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 11:43:26,255 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 11:43:26,257 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 11:43:27,205 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-15 11:43:27,205 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 11:43:27,210 INFO L263 TraceCheckSpWp]: Trace formula consists of 1517 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-15 11:43:27,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 11:43:27,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 11:43:27,549 INFO L272 TraceCheckUtils]: 0: Hoare triple {318197#true} call ULTIMATE.init(); {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call #t~ret1155 := main(); {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {318197#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume !(~i~24 < 4); {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 9: Hoare triple {318197#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L272 TraceCheckUtils]: 10: Hoare triple {318197#true} call _BLAST_init(); {318197#true} is VALID [2022-04-15 11:43:27,550 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318197#true} {318197#true} #6457#return; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {318197#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {318197#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L272 TraceCheckUtils]: 16: Hoare triple {318197#true} call stub_driver_init(); {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 17: Hoare triple {318197#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 18: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318197#true} {318197#true} #6459#return; {318197#true} is VALID [2022-04-15 11:43:27,551 INFO L290 TraceCheckUtils]: 20: Hoare triple {318197#true} assume !!(~status~31 >= 0); {318197#true} is VALID [2022-04-15 11:43:27,552 INFO L290 TraceCheckUtils]: 21: Hoare triple {318197#true} assume 0 == ~__BLAST_NONDET~3; {318197#true} is VALID [2022-04-15 11:43:27,552 INFO L272 TraceCheckUtils]: 22: Hoare triple {318197#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318197#true} is VALID [2022-04-15 11:43:27,552 INFO L290 TraceCheckUtils]: 23: Hoare triple {318197#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-15 11:43:27,552 INFO L290 TraceCheckUtils]: 24: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-15 11:43:27,552 INFO L272 TraceCheckUtils]: 25: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318197#true} is VALID [2022-04-15 11:43:27,561 INFO L290 TraceCheckUtils]: 26: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} is VALID [2022-04-15 11:43:27,561 INFO L272 TraceCheckUtils]: 27: Hoare triple {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L290 TraceCheckUtils]: 28: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L272 TraceCheckUtils]: 29: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L290 TraceCheckUtils]: 30: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L290 TraceCheckUtils]: 31: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L290 TraceCheckUtils]: 32: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-15 11:43:27,562 INFO L290 TraceCheckUtils]: 34: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-15 11:43:27,563 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {318197#true} {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} #6455#return; {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} is VALID [2022-04-15 11:43:27,564 INFO L290 TraceCheckUtils]: 36: Hoare triple {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} #res := ~Status; {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} is VALID [2022-04-15 11:43:27,564 INFO L290 TraceCheckUtils]: 37: Hoare triple {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} assume true; {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} is VALID [2022-04-15 11:43:27,565 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} {318197#true} #5991#return; {318378#(<= (+ 1073741738 |PptDispatchCreate_#t~ret288|) 0)} is VALID [2022-04-15 11:43:27,566 INFO L290 TraceCheckUtils]: 39: Hoare triple {318378#(<= (+ 1073741738 |PptDispatchCreate_#t~ret288|) 0)} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} is VALID [2022-04-15 11:43:27,566 INFO L290 TraceCheckUtils]: 40: Hoare triple {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} assume true; {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} is VALID [2022-04-15 11:43:27,567 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} {318197#true} #6461#return; {318389#(<= (+ 1073741738 |main_#t~ret1109|) 0)} is VALID [2022-04-15 11:43:27,567 INFO L290 TraceCheckUtils]: 42: Hoare triple {318389#(<= (+ 1073741738 |main_#t~ret1109|) 0)} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,568 INFO L290 TraceCheckUtils]: 43: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(0 != ~we_should_unload~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,568 INFO L290 TraceCheckUtils]: 44: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,568 INFO L290 TraceCheckUtils]: 45: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,569 INFO L290 TraceCheckUtils]: 46: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(~s~0 == ~UNLOADED~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,569 INFO L290 TraceCheckUtils]: 47: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(-1 == ~status~31); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,569 INFO L290 TraceCheckUtils]: 48: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(~s~0 != ~SKIP2~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,569 INFO L290 TraceCheckUtils]: 49: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,570 INFO L290 TraceCheckUtils]: 50: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume ~s~0 == ~DC~0; {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-15 11:43:27,570 INFO L290 TraceCheckUtils]: 51: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume 259 == ~status~31; {318198#false} is VALID [2022-04-15 11:43:27,570 INFO L272 TraceCheckUtils]: 52: Hoare triple {318198#false} call errorFn(); {318198#false} is VALID [2022-04-15 11:43:27,570 INFO L290 TraceCheckUtils]: 53: Hoare triple {318198#false} assume !false; {318198#false} is VALID [2022-04-15 11:43:27,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 11:43:27,570 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-15 11:43:27,571 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [984984914] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:43:27,571 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-15 11:43:27,571 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-15 11:43:27,571 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 11:43:27,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [862960398] [2022-04-15 11:43:27,571 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [862960398] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 11:43:27,571 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 11:43:27,571 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-15 11:43:27,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121672111] [2022-04-15 11:43:27,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 11:43:27,572 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) Word has length 54 [2022-04-15 11:43:27,572 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 11:43:27,572 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) [2022-04-15 11:43:27,634 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 11:43:27,634 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-15 11:43:27,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 11:43:27,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-15 11:43:27,635 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-15 11:43:27,635 INFO L87 Difference]: Start difference. First operand 4400 states and 6318 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7)