/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_1-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 05:57:50,482 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 05:57:50,513 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 05:57:50,532 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-15 05:57:50,544 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 05:57:50,545 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 05:57:50,545 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 05:57:50,546 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 05:57:50,546 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 05:57:50,547 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 05:57:50,548 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 05:57:50,549 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 05:57:50,550 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 05:57:50,564 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 05:57:50,564 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 05:57:50,565 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 05:57:50,566 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 05:57:50,567 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 05:57:50,572 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 05:57:50,573 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 05:57:50,578 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 05:57:50,579 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-15 05:57:50,585 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 05:57:50,585 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 05:57:50,586 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 05:57:50,586 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-15 05:57:50,586 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 05:57:50,586 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-15 05:57:50,586 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 05:57:50,587 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 05:57:50,587 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 05:57:50,588 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-15 05:57:50,588 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-15 05:57:50,589 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-15 05:57:50,589 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 05:57:50,589 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-15 05:57:50,589 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 05:57:50,759 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 05:57:50,785 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 05:57:50,787 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 05:57:50,788 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 05:57:50,795 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 05:57:50,796 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_1-1.c [2022-04-15 05:57:50,838 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88af694d5/d4336e7a4ab948ca871e63cbeec8fc54/FLAG83c46c2fa [2022-04-15 05:57:51,196 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 05:57:51,196 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c [2022-04-15 05:57:51,200 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88af694d5/d4336e7a4ab948ca871e63cbeec8fc54/FLAG83c46c2fa [2022-04-15 05:57:51,210 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88af694d5/d4336e7a4ab948ca871e63cbeec8fc54 [2022-04-15 05:57:51,212 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 05:57:51,214 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-15 05:57:51,216 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 05:57:51,216 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 05:57:51,219 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 05:57:51,223 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,224 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a2fd215 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51, skipping insertion in model container [2022-04-15 05:57:51,224 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,228 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 05:57:51,236 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 05:57:51,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c[322,335] [2022-04-15 05:57:51,395 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 05:57:51,404 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 05:57:51,416 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c[322,335] [2022-04-15 05:57:51,423 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 05:57:51,431 INFO L208 MainTranslator]: Completed translation [2022-04-15 05:57:51,432 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51 WrapperNode [2022-04-15 05:57:51,432 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 05:57:51,432 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 05:57:51,432 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 05:57:51,433 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 05:57:51,439 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,439 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,443 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,443 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,446 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,448 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,449 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,450 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 05:57:51,450 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 05:57:51,450 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 05:57:51,451 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 05:57:51,451 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (1/1) ... [2022-04-15 05:57:51,456 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 05:57:51,463 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 05:57:51,471 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 05:57:51,491 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 05:57:51,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 05:57:51,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 05:57:51,505 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 05:57:51,505 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 05:57:51,506 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 05:57:51,506 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 05:57:51,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 05:57:51,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 05:57:51,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 05:57:51,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 05:57:51,508 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 05:57:51,508 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 05:57:51,553 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 05:57:51,554 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 05:57:51,699 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 05:57:51,703 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 05:57:51,703 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-15 05:57:51,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 05:57:51 BoogieIcfgContainer [2022-04-15 05:57:51,705 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 05:57:51,706 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 05:57:51,706 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 05:57:51,725 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 05:57:51,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 05:57:51" (1/3) ... [2022-04-15 05:57:51,726 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5cb6a333 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 05:57:51, skipping insertion in model container [2022-04-15 05:57:51,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 05:57:51" (2/3) ... [2022-04-15 05:57:51,726 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5cb6a333 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 05:57:51, skipping insertion in model container [2022-04-15 05:57:51,727 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 05:57:51" (3/3) ... [2022-04-15 05:57:51,727 INFO L111 eAbstractionObserver]: Analyzing ICFG phases_1-1.c [2022-04-15 05:57:51,730 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-15 05:57:51,731 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 05:57:51,789 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 05:57:51,793 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 05:57:51,793 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 05:57:51,815 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 05:57:51,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-15 05:57:51,819 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:57:51,819 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:57:51,820 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:57:51,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:57:51,823 INFO L85 PathProgramCache]: Analyzing trace with hash 491760044, now seen corresponding path program 1 times [2022-04-15 05:57:51,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:51,830 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1419353026] [2022-04-15 05:57:51,840 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 05:57:51,841 INFO L85 PathProgramCache]: Analyzing trace with hash 491760044, now seen corresponding path program 2 times [2022-04-15 05:57:51,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:57:51,843 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852143137] [2022-04-15 05:57:51,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:57:51,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:57:51,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:51,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:57:51,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:51,974 INFO L290 TraceCheckUtils]: 0: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {22#true} is VALID [2022-04-15 05:57:51,974 INFO L290 TraceCheckUtils]: 1: Hoare triple {22#true} assume true; {22#true} is VALID [2022-04-15 05:57:51,975 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22#true} {22#true} #40#return; {22#true} is VALID [2022-04-15 05:57:51,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {22#true} call ULTIMATE.init(); {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:57:51,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {22#true} is VALID [2022-04-15 05:57:51,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {22#true} assume true; {22#true} is VALID [2022-04-15 05:57:51,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22#true} {22#true} #40#return; {22#true} is VALID [2022-04-15 05:57:51,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {22#true} call #t~ret5 := main(); {22#true} is VALID [2022-04-15 05:57:51,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {22#true} ~x~0 := 0; {22#true} is VALID [2022-04-15 05:57:51,977 INFO L290 TraceCheckUtils]: 6: Hoare triple {22#true} assume !true; {23#false} is VALID [2022-04-15 05:57:51,977 INFO L272 TraceCheckUtils]: 7: Hoare triple {23#false} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {23#false} is VALID [2022-04-15 05:57:51,978 INFO L290 TraceCheckUtils]: 8: Hoare triple {23#false} ~cond := #in~cond; {23#false} is VALID [2022-04-15 05:57:51,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {23#false} assume 0 == ~cond; {23#false} is VALID [2022-04-15 05:57:51,978 INFO L290 TraceCheckUtils]: 10: Hoare triple {23#false} assume !false; {23#false} is VALID [2022-04-15 05:57:51,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:57:51,978 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:57:51,979 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852143137] [2022-04-15 05:57:51,979 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [852143137] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:51,979 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:51,979 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 05:57:51,981 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 05:57:51,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1419353026] [2022-04-15 05:57:51,981 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1419353026] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:51,981 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:51,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 05:57:51,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097463961] [2022-04-15 05:57:51,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 05:57:51,985 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 05:57:51,986 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 05:57:51,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:51,999 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:51,999 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 05:57:52,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:52,015 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 05:57:52,015 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 05:57:52,017 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,098 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-04-15 05:57:52,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 05:57:52,098 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 05:57:52,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 05:57:52,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-15 05:57:52,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-15 05:57:52,111 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2022-04-15 05:57:52,157 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:52,163 INFO L225 Difference]: With dead ends: 30 [2022-04-15 05:57:52,163 INFO L226 Difference]: Without dead ends: 13 [2022-04-15 05:57:52,165 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 05:57:52,168 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 05:57:52,170 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 22 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 05:57:52,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-15 05:57:52,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-15 05:57:52,188 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 05:57:52,189 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,189 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,189 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,192 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-15 05:57:52,192 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-15 05:57:52,192 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:52,192 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:52,193 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-15 05:57:52,193 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-15 05:57:52,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,194 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-15 05:57:52,194 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-15 05:57:52,195 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:52,195 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:52,195 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 05:57:52,195 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 05:57:52,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-04-15 05:57:52,197 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 11 [2022-04-15 05:57:52,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 05:57:52,197 INFO L478 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-04-15 05:57:52,197 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,197 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 14 transitions. [2022-04-15 05:57:52,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:52,216 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-15 05:57:52,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-15 05:57:52,219 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:57:52,219 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:57:52,222 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 05:57:52,222 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:57:52,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:57:52,223 INFO L85 PathProgramCache]: Analyzing trace with hash 482524834, now seen corresponding path program 1 times [2022-04-15 05:57:52,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:52,223 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [438174374] [2022-04-15 05:57:52,223 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-15 05:57:52,223 INFO L85 PathProgramCache]: Analyzing trace with hash 482524834, now seen corresponding path program 2 times [2022-04-15 05:57:52,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:57:52,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621986748] [2022-04-15 05:57:52,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:57:52,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:57:52,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:52,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:57:52,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:52,319 INFO L290 TraceCheckUtils]: 0: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {142#true} is VALID [2022-04-15 05:57:52,319 INFO L290 TraceCheckUtils]: 1: Hoare triple {142#true} assume true; {142#true} is VALID [2022-04-15 05:57:52,319 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {142#true} {142#true} #40#return; {142#true} is VALID [2022-04-15 05:57:52,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {142#true} call ULTIMATE.init(); {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:57:52,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {142#true} is VALID [2022-04-15 05:57:52,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {142#true} assume true; {142#true} is VALID [2022-04-15 05:57:52,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {142#true} {142#true} #40#return; {142#true} is VALID [2022-04-15 05:57:52,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {142#true} call #t~ret5 := main(); {142#true} is VALID [2022-04-15 05:57:52,335 INFO L290 TraceCheckUtils]: 5: Hoare triple {142#true} ~x~0 := 0; {147#(= main_~x~0 0)} is VALID [2022-04-15 05:57:52,336 INFO L290 TraceCheckUtils]: 6: Hoare triple {147#(= main_~x~0 0)} assume !(~x~0 % 4294967296 < 268435455); {143#false} is VALID [2022-04-15 05:57:52,336 INFO L272 TraceCheckUtils]: 7: Hoare triple {143#false} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {143#false} is VALID [2022-04-15 05:57:52,337 INFO L290 TraceCheckUtils]: 8: Hoare triple {143#false} ~cond := #in~cond; {143#false} is VALID [2022-04-15 05:57:52,337 INFO L290 TraceCheckUtils]: 9: Hoare triple {143#false} assume 0 == ~cond; {143#false} is VALID [2022-04-15 05:57:52,337 INFO L290 TraceCheckUtils]: 10: Hoare triple {143#false} assume !false; {143#false} is VALID [2022-04-15 05:57:52,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:57:52,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:57:52,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621986748] [2022-04-15 05:57:52,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1621986748] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:52,338 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:52,338 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 05:57:52,338 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 05:57:52,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [438174374] [2022-04-15 05:57:52,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [438174374] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:52,339 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:52,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 05:57:52,339 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949133209] [2022-04-15 05:57:52,339 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 05:57:52,340 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 05:57:52,340 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 05:57:52,341 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,352 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:52,352 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 05:57:52,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:52,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 05:57:52,353 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-15 05:57:52,354 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,408 INFO L93 Difference]: Finished difference Result 22 states and 26 transitions. [2022-04-15 05:57:52,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 05:57:52,408 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-15 05:57:52,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 05:57:52,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 26 transitions. [2022-04-15 05:57:52,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 26 transitions. [2022-04-15 05:57:52,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 26 transitions. [2022-04-15 05:57:52,438 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:52,441 INFO L225 Difference]: With dead ends: 22 [2022-04-15 05:57:52,441 INFO L226 Difference]: Without dead ends: 15 [2022-04-15 05:57:52,442 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-15 05:57:52,445 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 05:57:52,445 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 19 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 05:57:52,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-15 05:57:52,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-15 05:57:52,458 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 05:57:52,459 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,459 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,460 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,461 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-15 05:57:52,461 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 05:57:52,461 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:52,461 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:52,462 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 05:57:52,462 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 05:57:52,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:52,463 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-15 05:57:52,463 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 05:57:52,463 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:52,464 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:52,464 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 05:57:52,464 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 05:57:52,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-04-15 05:57:52,465 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 11 [2022-04-15 05:57:52,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 05:57:52,465 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-04-15 05:57:52,466 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:52,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 16 transitions. [2022-04-15 05:57:52,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:52,480 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 05:57:52,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-15 05:57:52,480 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:57:52,480 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:57:52,481 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 05:57:52,481 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:57:52,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:57:52,482 INFO L85 PathProgramCache]: Analyzing trace with hash 925229631, now seen corresponding path program 1 times [2022-04-15 05:57:52,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:52,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2074042821] [2022-04-15 05:57:55,554 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 05:57:55,776 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 1 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 05:57:55,777 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 05:57:55,779 INFO L85 PathProgramCache]: Analyzing trace with hash -1303175503, now seen corresponding path program 1 times [2022-04-15 05:57:55,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:57:55,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918814043] [2022-04-15 05:57:55,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:57:55,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:57:55,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:55,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:57:55,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:57:55,900 INFO L290 TraceCheckUtils]: 0: Hoare triple {264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {257#true} is VALID [2022-04-15 05:57:55,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} assume true; {257#true} is VALID [2022-04-15 05:57:55,901 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {257#true} {257#true} #40#return; {257#true} is VALID [2022-04-15 05:57:55,901 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} call ULTIMATE.init(); {264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:57:55,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {257#true} is VALID [2022-04-15 05:57:55,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} assume true; {257#true} is VALID [2022-04-15 05:57:55,902 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} #40#return; {257#true} is VALID [2022-04-15 05:57:55,902 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} call #t~ret5 := main(); {257#true} is VALID [2022-04-15 05:57:55,902 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} ~x~0 := 0; {262#(= main_~x~0 0)} is VALID [2022-04-15 05:57:55,904 INFO L290 TraceCheckUtils]: 6: Hoare triple {262#(= main_~x~0 0)} [46] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_11 v_main_~x~0_10)) (.cse1 (= |v_main_#t~post4_4| |v_main_#t~post4_3|)) (.cse2 (mod v_main_~x~0_11 4294967296))) (or (and .cse0 .cse1) (and .cse0 (<= 65520 .cse2) .cse1) (and (< .cse2 65520) (<= (div (+ (* (- 1) v_main_~x~0_10) 65520) (- 4294967296)) (+ (div (+ v_main_~x~0_11 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_11 v_main_~x~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_#t~post4=|v_main_#t~post4_4|} OutVars{main_~x~0=v_main_~x~0_10, main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {263#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 65521))} is VALID [2022-04-15 05:57:55,904 INFO L290 TraceCheckUtils]: 7: Hoare triple {263#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 65521))} [45] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-15 05:57:55,904 INFO L272 TraceCheckUtils]: 8: Hoare triple {258#false} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {258#false} is VALID [2022-04-15 05:57:55,904 INFO L290 TraceCheckUtils]: 9: Hoare triple {258#false} ~cond := #in~cond; {258#false} is VALID [2022-04-15 05:57:55,905 INFO L290 TraceCheckUtils]: 10: Hoare triple {258#false} assume 0 == ~cond; {258#false} is VALID [2022-04-15 05:57:55,905 INFO L290 TraceCheckUtils]: 11: Hoare triple {258#false} assume !false; {258#false} is VALID [2022-04-15 05:57:55,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:57:55,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:57:55,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918814043] [2022-04-15 05:57:55,905 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [918814043] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:55,906 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:55,906 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 05:57:55,976 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 05:57:55,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2074042821] [2022-04-15 05:57:55,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2074042821] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:57:55,976 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:57:55,976 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 05:57:55,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387703102] [2022-04-15 05:57:55,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 05:57:55,977 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 05:57:55,977 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 05:57:55,977 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:55,987 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:55,988 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 05:57:55,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:55,988 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 05:57:55,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2022-04-15 05:57:55,989 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:56,100 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-15 05:57:56,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 05:57:56,100 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 05:57:56,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 05:57:56,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 24 transitions. [2022-04-15 05:57:56,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 24 transitions. [2022-04-15 05:57:56,103 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 24 transitions. [2022-04-15 05:57:56,126 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:56,127 INFO L225 Difference]: With dead ends: 22 [2022-04-15 05:57:56,127 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 05:57:56,128 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-15 05:57:56,128 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 05:57:56,129 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 18 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 05:57:56,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 05:57:56,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-15 05:57:56,137 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 05:57:56,137 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,137 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,138 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:56,139 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 05:57:56,139 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 05:57:56,139 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:56,139 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:56,139 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 05:57:56,139 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 05:57:56,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:57:56,140 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 05:57:56,140 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 05:57:56,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:57:56,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:57:56,141 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 05:57:56,141 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 05:57:56,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-04-15 05:57:56,141 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 13 [2022-04-15 05:57:56,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 05:57:56,142 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-04-15 05:57:56,142 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 1.8) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:57:56,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 19 transitions. [2022-04-15 05:57:56,161 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:57:56,161 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 05:57:56,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-15 05:57:56,161 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:57:56,162 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:57:56,162 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-15 05:57:56,162 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:57:56,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:57:56,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1220035546, now seen corresponding path program 1 times [2022-04-15 05:57:56,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:57:56,163 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [578433561] [2022-04-15 05:57:59,251 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 05:57:59,451 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 1 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 05:58:00,377 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 0 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 05:58:00,380 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 05:58:00,383 INFO L85 PathProgramCache]: Analyzing trace with hash 442797488, now seen corresponding path program 1 times [2022-04-15 05:58:00,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:58:00,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188908286] [2022-04-15 05:58:00,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:58:00,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:58:00,397 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 2) .v_it_3.0) (* (- 1) main_~x~0_6) (* 4294967296 (div (+ (* 2 .v_it_3.0) main_~x~0_6) 4294967296)) 65520) 0) [2022-04-15 05:58:00,400 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 2) .v_it_3.0) (* (- 1) main_~x~0_6) (* 4294967296 (div (+ (* 2 .v_it_3.0) main_~x~0_6) 4294967296)) 268435455) 0)) [2022-04-15 05:58:00,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:00,463 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 2) .v_it_3.1) (* (- 1) main_~x~0_6) (* 4294967296 (div (+ (* 2 .v_it_3.1) main_~x~0_6) 4294967296)) 65520) 0) [2022-04-15 05:58:00,464 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 2) .v_it_3.1) (* (- 1) main_~x~0_6) (* 4294967296 (div (+ (* 2 .v_it_3.1) main_~x~0_6) 4294967296)) 268435455) 0)) [2022-04-15 05:58:00,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:58:00,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:00,593 INFO L290 TraceCheckUtils]: 0: Hoare triple {396#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {385#true} is VALID [2022-04-15 05:58:00,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {385#true} assume true; {385#true} is VALID [2022-04-15 05:58:00,594 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {385#true} {385#true} #40#return; {385#true} is VALID [2022-04-15 05:58:00,594 INFO L272 TraceCheckUtils]: 0: Hoare triple {385#true} call ULTIMATE.init(); {396#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:58:00,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {396#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {385#true} is VALID [2022-04-15 05:58:00,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {385#true} assume true; {385#true} is VALID [2022-04-15 05:58:00,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {385#true} {385#true} #40#return; {385#true} is VALID [2022-04-15 05:58:00,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {385#true} call #t~ret5 := main(); {385#true} is VALID [2022-04-15 05:58:00,599 INFO L290 TraceCheckUtils]: 5: Hoare triple {385#true} ~x~0 := 0; {390#(= main_~x~0 0)} is VALID [2022-04-15 05:58:00,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {390#(= main_~x~0 0)} [48] L16-2-->L15-2_primed: Formula: (let ((.cse0 (mod v_main_~x~0_18 4294967296)) (.cse1 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (< .cse0 65520) (< v_main_~x~0_18 v_main_~x~0_17) (<= (div (+ 65520 (* (- 1) v_main_~x~0_17)) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 (<= 65520 .cse0)) (and .cse1 .cse2))) InVars {main_~x~0=v_main_~x~0_18, main_#t~post4=|v_main_#t~post4_9|} OutVars{main_~x~0=v_main_~x~0_17, main_#t~post4=|v_main_#t~post4_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 05:58:00,600 INFO L290 TraceCheckUtils]: 7: Hoare triple {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [49] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 05:58:00,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [50] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_20 4294967296))) (let ((.cse0 (<= 65520 .cse4)) (.cse2 (< .cse4 268435455)) (.cse3 (= v_main_~x~0_20 v_main_~x~0_19))) (or (and .cse0 (forall ((v_it_3 Int)) (or (let ((.cse1 (mod (+ (* v_it_3 2) v_main_~x~0_20) 4294967296))) (and (< .cse1 268435455) (<= 65520 .cse1))) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))))) (= (mod (+ v_main_~x~0_20 v_main_~x~0_19) 2) 0) .cse2 (< 0 (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))) (and (or (not .cse0) (not .cse2)) .cse3) .cse3))) InVars {main_~x~0=v_main_~x~0_20} OutVars{main_~x~0=v_main_~x~0_19} AuxVars[] AssignedVars[main_~x~0] {392#(or (and (<= main_~x~0 65520) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is VALID [2022-04-15 05:58:00,606 INFO L290 TraceCheckUtils]: 9: Hoare triple {392#(or (and (<= main_~x~0 65520) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [47] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {393#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 05:58:00,607 INFO L272 TraceCheckUtils]: 10: Hoare triple {393#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {394#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 05:58:00,607 INFO L290 TraceCheckUtils]: 11: Hoare triple {394#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {395#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 05:58:00,608 INFO L290 TraceCheckUtils]: 12: Hoare triple {395#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {386#false} is VALID [2022-04-15 05:58:00,608 INFO L290 TraceCheckUtils]: 13: Hoare triple {386#false} assume !false; {386#false} is VALID [2022-04-15 05:58:00,608 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:58:00,608 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:58:00,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188908286] [2022-04-15 05:58:00,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188908286] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 05:58:00,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1974208989] [2022-04-15 05:58:00,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:58:00,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 05:58:00,609 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 05:58:00,610 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 05:58:00,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 05:58:00,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:00,666 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 05:58:00,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:00,705 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 05:58:15,838 INFO L272 TraceCheckUtils]: 0: Hoare triple {385#true} call ULTIMATE.init(); {385#true} is VALID [2022-04-15 05:58:15,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {385#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {385#true} is VALID [2022-04-15 05:58:15,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {385#true} assume true; {385#true} is VALID [2022-04-15 05:58:15,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {385#true} {385#true} #40#return; {385#true} is VALID [2022-04-15 05:58:15,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {385#true} call #t~ret5 := main(); {385#true} is VALID [2022-04-15 05:58:15,842 INFO L290 TraceCheckUtils]: 5: Hoare triple {385#true} ~x~0 := 0; {390#(= main_~x~0 0)} is VALID [2022-04-15 05:58:15,842 INFO L290 TraceCheckUtils]: 6: Hoare triple {390#(= main_~x~0 0)} [48] L16-2-->L15-2_primed: Formula: (let ((.cse0 (mod v_main_~x~0_18 4294967296)) (.cse1 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (< .cse0 65520) (< v_main_~x~0_18 v_main_~x~0_17) (<= (div (+ 65520 (* (- 1) v_main_~x~0_17)) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 (<= 65520 .cse0)) (and .cse1 .cse2))) InVars {main_~x~0=v_main_~x~0_18, main_#t~post4=|v_main_#t~post4_9|} OutVars{main_~x~0=v_main_~x~0_17, main_#t~post4=|v_main_#t~post4_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 05:58:15,843 INFO L290 TraceCheckUtils]: 7: Hoare triple {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [49] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 05:58:15,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {391#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [50] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_20 4294967296))) (let ((.cse0 (<= 65520 .cse4)) (.cse2 (< .cse4 268435455)) (.cse3 (= v_main_~x~0_20 v_main_~x~0_19))) (or (and .cse0 (forall ((v_it_3 Int)) (or (let ((.cse1 (mod (+ (* v_it_3 2) v_main_~x~0_20) 4294967296))) (and (< .cse1 268435455) (<= 65520 .cse1))) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))))) (= (mod (+ v_main_~x~0_20 v_main_~x~0_19) 2) 0) .cse2 (< 0 (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))) (and (or (not .cse0) (not .cse2)) .cse3) .cse3))) InVars {main_~x~0=v_main_~x~0_20} OutVars{main_~x~0=v_main_~x~0_19} AuxVars[] AssignedVars[main_~x~0] {424#(or (exists ((aux_div_v_main_~x~0_28_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 Int) (aux_div_aux_mod_v_main_~x~0_28_31_42 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) 1) main_~x~0) (<= (div (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* (- 1) main_~x~0) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2)) (- 4294967296)) 0) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169) (<= 0 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2)) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) 4294967296 (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296))) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 268435455 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296))) (< (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 2) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296)) main_~x~0) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296)) main_~x~0) (forall ((v_it_3 Int)) (or (and (<= 65520 (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296)) (< (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296) 268435455)) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169))))))) (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 05:58:15,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {424#(or (exists ((aux_div_v_main_~x~0_28_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 Int) (aux_div_aux_mod_v_main_~x~0_28_31_42 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) 1) main_~x~0) (<= (div (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* (- 1) main_~x~0) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2)) (- 4294967296)) 0) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169) (<= 0 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2)) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) 4294967296 (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296))) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 268435455 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296))) (< (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 2) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296)) main_~x~0) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296)) main_~x~0) (forall ((v_it_3 Int)) (or (and (<= 65520 (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296)) (< (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296) 268435455)) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169))))))) (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [47] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {428#(and (exists ((aux_div_v_main_~x~0_28_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 Int) (aux_div_aux_mod_v_main_~x~0_28_31_42 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) 1) main_~x~0) (<= (div (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* (- 1) main_~x~0) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2)) (- 4294967296)) 0) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169) (<= 0 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2)) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) 4294967296 (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296))) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 268435455 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296))) (< (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 2) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296)) main_~x~0) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296)) main_~x~0) (forall ((v_it_3 Int)) (or (and (<= 65520 (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296)) (< (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296) 268435455)) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169))))))) (not (< (mod main_~x~0 4294967296) 268435455)))} is VALID [2022-04-15 05:58:15,907 INFO L272 TraceCheckUtils]: 10: Hoare triple {428#(and (exists ((aux_div_v_main_~x~0_28_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 Int) (aux_div_aux_mod_v_main_~x~0_28_31_42 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) 1) main_~x~0) (<= (div (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* (- 1) main_~x~0) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2)) (- 4294967296)) 0) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169) (<= 0 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2)) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) 4294967296 (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296))) (< main_~x~0 (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 268435455 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296))) (< (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 2) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) 65520 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_28_31_42 4294967296)) main_~x~0) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 2) (* aux_div_v_main_~x~0_28_31 4294967296)) main_~x~0) (forall ((v_it_3 Int)) (or (and (<= 65520 (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296)) (< (mod (+ (* v_it_3 2) main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169 4294967294) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 4294967294)) 4294967296) 268435455)) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_28_31_42_169_56 aux_div_aux_mod_aux_mod_v_main_~x~0_28_31_42_169))))))) (not (< (mod main_~x~0 4294967296) 268435455)))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {432#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 05:58:15,908 INFO L290 TraceCheckUtils]: 11: Hoare triple {432#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {436#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 05:58:15,908 INFO L290 TraceCheckUtils]: 12: Hoare triple {436#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {386#false} is VALID [2022-04-15 05:58:15,908 INFO L290 TraceCheckUtils]: 13: Hoare triple {386#false} assume !false; {386#false} is VALID [2022-04-15 05:58:15,908 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:58:15,909 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 05:58:31,921 INFO L290 TraceCheckUtils]: 13: Hoare triple {386#false} assume !false; {386#false} is VALID [2022-04-15 05:58:31,923 INFO L290 TraceCheckUtils]: 12: Hoare triple {436#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {386#false} is VALID [2022-04-15 05:58:31,924 INFO L290 TraceCheckUtils]: 11: Hoare triple {432#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {436#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 05:58:31,925 INFO L272 TraceCheckUtils]: 10: Hoare triple {393#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {432#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 05:58:31,925 INFO L290 TraceCheckUtils]: 9: Hoare triple {455#(or (< (mod main_~x~0 4294967296) 268435455) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [47] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {393#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 05:58:33,933 WARN L290 TraceCheckUtils]: 8: Hoare triple {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} [50] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_20 4294967296))) (let ((.cse0 (<= 65520 .cse4)) (.cse2 (< .cse4 268435455)) (.cse3 (= v_main_~x~0_20 v_main_~x~0_19))) (or (and .cse0 (forall ((v_it_3 Int)) (or (let ((.cse1 (mod (+ (* v_it_3 2) v_main_~x~0_20) 4294967296))) (and (< .cse1 268435455) (<= 65520 .cse1))) (not (<= 1 v_it_3)) (not (<= (+ v_it_3 1) (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))))) (= (mod (+ v_main_~x~0_20 v_main_~x~0_19) 2) 0) .cse2 (< 0 (div (+ v_main_~x~0_19 (* (- 1) v_main_~x~0_20)) 2))) (and (or (not .cse0) (not .cse2)) .cse3) .cse3))) InVars {main_~x~0=v_main_~x~0_20} OutVars{main_~x~0=v_main_~x~0_19} AuxVars[] AssignedVars[main_~x~0] {455#(or (< (mod main_~x~0 4294967296) 268435455) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is UNKNOWN [2022-04-15 05:58:33,936 INFO L290 TraceCheckUtils]: 7: Hoare triple {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} [49] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} is VALID [2022-04-15 05:58:34,454 INFO L290 TraceCheckUtils]: 6: Hoare triple {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} [48] L16-2-->L15-2_primed: Formula: (let ((.cse0 (mod v_main_~x~0_18 4294967296)) (.cse1 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (< .cse0 65520) (< v_main_~x~0_18 v_main_~x~0_17) (<= (div (+ 65520 (* (- 1) v_main_~x~0_17)) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 (<= 65520 .cse0)) (and .cse1 .cse2))) InVars {main_~x~0=v_main_~x~0_18, main_#t~post4=|v_main_#t~post4_9|} OutVars{main_~x~0=v_main_~x~0_17, main_#t~post4=|v_main_#t~post4_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} is VALID [2022-04-15 05:58:34,455 INFO L290 TraceCheckUtils]: 5: Hoare triple {385#true} ~x~0 := 0; {459#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div main_~x~0 (- 2)) (+ (div (+ (- 2) (* (- 1) main_~x~0)) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 Int) (aux_div_aux_mod_v_main_~x~0_29_22_78 Int)) (or (exists ((v_it_3 Int)) (and (or (not (<= 65520 (mod (+ (* v_it_3 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_3 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_3) (<= (+ v_it_3 main_~x~0 1) (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648))))) (< (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2) (+ main_~x~0 268435455)) (<= (+ aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 (* aux_div_aux_mod_v_main_~x~0_29_22_78 2147483648)) main_~x~0) (<= (+ main_~x~0 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_29_22_78_58 2))))))} is VALID [2022-04-15 05:58:34,456 INFO L272 TraceCheckUtils]: 4: Hoare triple {385#true} call #t~ret5 := main(); {385#true} is VALID [2022-04-15 05:58:34,456 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {385#true} {385#true} #40#return; {385#true} is VALID [2022-04-15 05:58:34,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {385#true} assume true; {385#true} is VALID [2022-04-15 05:58:34,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {385#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {385#true} is VALID [2022-04-15 05:58:34,456 INFO L272 TraceCheckUtils]: 0: Hoare triple {385#true} call ULTIMATE.init(); {385#true} is VALID [2022-04-15 05:58:34,456 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 05:58:34,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1974208989] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 05:58:34,457 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 05:58:34,457 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 7] total 15 [2022-04-15 05:58:34,674 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 05:58:34,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [578433561] [2022-04-15 05:58:34,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [578433561] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:58:34,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:58:34,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-15 05:58:34,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488980406] [2022-04-15 05:58:34,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 05:58:34,675 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 05:58:34,675 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 05:58:34,675 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:34,690 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:58:34,690 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-15 05:58:34,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 05:58:34,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-15 05:58:34,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2022-04-15 05:58:34,691 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:58:35,027 INFO L93 Difference]: Finished difference Result 31 states and 38 transitions. [2022-04-15 05:58:35,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 05:58:35,028 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 05:58:35,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 05:58:35,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 38 transitions. [2022-04-15 05:58:35,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 38 transitions. [2022-04-15 05:58:35,031 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 38 transitions. [2022-04-15 05:58:35,091 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:58:35,092 INFO L225 Difference]: With dead ends: 31 [2022-04-15 05:58:35,092 INFO L226 Difference]: Without dead ends: 21 [2022-04-15 05:58:35,093 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 21 SyntacticMatches, 7 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=113, Invalid=393, Unknown=0, NotChecked=0, Total=506 [2022-04-15 05:58:35,093 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 19 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 05:58:35,094 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 36 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 05:58:35,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-15 05:58:35,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-04-15 05:58:35,117 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 05:58:35,117 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,117 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,117 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:58:35,118 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-15 05:58:35,118 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-15 05:58:35,119 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:58:35,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:58:35,119 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-15 05:58:35,119 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-15 05:58:35,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:58:35,120 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-15 05:58:35,120 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-15 05:58:35,120 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:58:35,121 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:58:35,121 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 05:58:35,121 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 05:58:35,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2022-04-15 05:58:35,122 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 15 [2022-04-15 05:58:35,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 05:58:35,122 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2022-04-15 05:58:35,122 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:58:35,122 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 24 transitions. [2022-04-15 05:58:35,154 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:58:35,155 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-15 05:58:35,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-15 05:58:35,155 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:58:35,155 INFO L499 BasicCegarLoop]: trace histogram [4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:58:35,164 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-15 05:58:35,356 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 05:58:35,356 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:58:35,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:58:35,357 INFO L85 PathProgramCache]: Analyzing trace with hash -1815013998, now seen corresponding path program 2 times [2022-04-15 05:58:35,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:58:35,357 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1097465046] [2022-04-15 05:58:36,074 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 1 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 05:58:36,369 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 0 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 05:58:36,371 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 05:58:36,374 INFO L85 PathProgramCache]: Analyzing trace with hash -1802637648, now seen corresponding path program 1 times [2022-04-15 05:58:36,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:58:36,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70792183] [2022-04-15 05:58:36,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:58:36,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:58:36,387 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_5.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_5.0)) 4294967296)) 65520) 0) [2022-04-15 05:58:36,387 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_5.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_5.0)) 4294967296)) 268435455) 0)) [2022-04-15 05:58:36,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:36,425 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_5.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_5.1)) 4294967296)) 65520) 0) [2022-04-15 05:58:36,426 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_5.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_5.1)) 4294967296)) 268435455) 0)) [2022-04-15 05:58:36,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:58:36,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:36,516 INFO L290 TraceCheckUtils]: 0: Hoare triple {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {646#true} is VALID [2022-04-15 05:58:36,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {646#true} assume true; {646#true} is VALID [2022-04-15 05:58:36,516 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {646#true} {646#true} #40#return; {646#true} is VALID [2022-04-15 05:58:36,517 INFO L272 TraceCheckUtils]: 0: Hoare triple {646#true} call ULTIMATE.init(); {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:58:36,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {646#true} is VALID [2022-04-15 05:58:36,518 INFO L290 TraceCheckUtils]: 2: Hoare triple {646#true} assume true; {646#true} is VALID [2022-04-15 05:58:36,518 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {646#true} {646#true} #40#return; {646#true} is VALID [2022-04-15 05:58:36,518 INFO L272 TraceCheckUtils]: 4: Hoare triple {646#true} call #t~ret5 := main(); {646#true} is VALID [2022-04-15 05:58:36,518 INFO L290 TraceCheckUtils]: 5: Hoare triple {646#true} ~x~0 := 0; {651#(= main_~x~0 0)} is VALID [2022-04-15 05:58:36,519 INFO L290 TraceCheckUtils]: 6: Hoare triple {651#(= main_~x~0 0)} [52] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_37 v_main_~x~0_36)) (.cse2 (mod v_main_~x~0_37 4294967296)) (.cse1 (= |v_main_#t~post4_16| |v_main_#t~post4_15|))) (or (and .cse0 .cse1) (and (<= (div (+ (* (- 1) v_main_~x~0_36) 65520) (- 4294967296)) (+ (div (+ v_main_~x~0_37 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_37 v_main_~x~0_36) (< .cse2 65520)) (and .cse0 (<= 65520 .cse2) .cse1))) InVars {main_~x~0=v_main_~x~0_37, main_#t~post4=|v_main_#t~post4_16|} OutVars{main_~x~0=v_main_~x~0_36, main_#t~post4=|v_main_#t~post4_15|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:58:36,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [53] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:58:36,524 INFO L290 TraceCheckUtils]: 8: Hoare triple {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [54] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_39 4294967296))) (let ((.cse1 (< .cse4 268435455)) (.cse0 (<= 65520 .cse4)) (.cse2 (= v_main_~x~0_39 v_main_~x~0_38))) (or (and (or (not .cse0) (not .cse1)) .cse2) (and (< 0 (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2))) (forall ((v_it_5 Int)) (or (not (<= 1 v_it_5)) (not (<= (+ v_it_5 1) (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2)))) (let ((.cse3 (mod (+ v_main_~x~0_39 (* v_it_5 2)) 4294967296))) (and (< .cse3 268435455) (<= 65520 .cse3))))) .cse1 (= (mod (+ v_main_~x~0_39 v_main_~x~0_38) 2) 0) .cse0) .cse2))) InVars {main_~x~0=v_main_~x~0_39} OutVars{main_~x~0=v_main_~x~0_38} AuxVars[] AssignedVars[main_~x~0] {653#(or (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 268435454)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is VALID [2022-04-15 05:58:36,524 INFO L290 TraceCheckUtils]: 9: Hoare triple {653#(or (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 268435454)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [51] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {654#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 05:58:36,525 INFO L272 TraceCheckUtils]: 10: Hoare triple {654#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {655#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 05:58:36,527 INFO L290 TraceCheckUtils]: 11: Hoare triple {655#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {656#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 05:58:36,528 INFO L290 TraceCheckUtils]: 12: Hoare triple {656#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {647#false} is VALID [2022-04-15 05:58:36,528 INFO L290 TraceCheckUtils]: 13: Hoare triple {647#false} assume !false; {647#false} is VALID [2022-04-15 05:58:36,528 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:58:36,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:58:36,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70792183] [2022-04-15 05:58:36,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [70792183] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 05:58:36,529 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [726167035] [2022-04-15 05:58:36,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:58:36,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 05:58:36,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 05:58:36,530 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 05:58:36,531 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 05:58:36,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:36,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 05:58:36,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:58:36,617 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 05:58:59,061 INFO L272 TraceCheckUtils]: 0: Hoare triple {646#true} call ULTIMATE.init(); {646#true} is VALID [2022-04-15 05:58:59,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {646#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {646#true} is VALID [2022-04-15 05:58:59,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {646#true} assume true; {646#true} is VALID [2022-04-15 05:58:59,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {646#true} {646#true} #40#return; {646#true} is VALID [2022-04-15 05:58:59,061 INFO L272 TraceCheckUtils]: 4: Hoare triple {646#true} call #t~ret5 := main(); {646#true} is VALID [2022-04-15 05:58:59,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {646#true} ~x~0 := 0; {651#(= main_~x~0 0)} is VALID [2022-04-15 05:58:59,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {651#(= main_~x~0 0)} [52] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_37 v_main_~x~0_36)) (.cse2 (mod v_main_~x~0_37 4294967296)) (.cse1 (= |v_main_#t~post4_16| |v_main_#t~post4_15|))) (or (and .cse0 .cse1) (and (<= (div (+ (* (- 1) v_main_~x~0_36) 65520) (- 4294967296)) (+ (div (+ v_main_~x~0_37 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_37 v_main_~x~0_36) (< .cse2 65520)) (and .cse0 (<= 65520 .cse2) .cse1))) InVars {main_~x~0=v_main_~x~0_37, main_#t~post4=|v_main_#t~post4_16|} OutVars{main_~x~0=v_main_~x~0_36, main_#t~post4=|v_main_#t~post4_15|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:58:59,063 INFO L290 TraceCheckUtils]: 7: Hoare triple {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [53] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:58:59,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {652#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [54] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_39 4294967296))) (let ((.cse1 (< .cse4 268435455)) (.cse0 (<= 65520 .cse4)) (.cse2 (= v_main_~x~0_39 v_main_~x~0_38))) (or (and (or (not .cse0) (not .cse1)) .cse2) (and (< 0 (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2))) (forall ((v_it_5 Int)) (or (not (<= 1 v_it_5)) (not (<= (+ v_it_5 1) (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2)))) (let ((.cse3 (mod (+ v_main_~x~0_39 (* v_it_5 2)) 4294967296))) (and (< .cse3 268435455) (<= 65520 .cse3))))) .cse1 (= (mod (+ v_main_~x~0_39 v_main_~x~0_38) 2) 0) .cse0) .cse2))) InVars {main_~x~0=v_main_~x~0_39} OutVars{main_~x~0=v_main_~x~0_38} AuxVars[] AssignedVars[main_~x~0] {685#(exists ((aux_div_v_main_~x~0_47_55 Int) (aux_div_aux_mod_v_main_~x~0_47_55_103 Int)) (and (or (and (<= (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) main_~x~0) (<= main_~x~0 (+ 65520 (* aux_div_v_main_~x~0_47_55 4294967296)))) (exists ((aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 Int)) (and (<= 65520 (mod (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (<= main_~x~0 (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (+ main_~x~0 65520 (* aux_div_v_main_~x~0_47_55 4294967296))) (forall ((v_it_5 Int)) (or (and (<= 65520 (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (< (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296) 268435455)) (not (<= 1 v_it_5)) (not (<= (+ v_it_5 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 1 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (< (+ aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (<= aux_div_v_main_~x~0_47_55 0) (< 0 (+ aux_div_aux_mod_v_main_~x~0_47_55_103 1))))} is VALID [2022-04-15 05:59:01,133 WARN L290 TraceCheckUtils]: 9: Hoare triple {685#(exists ((aux_div_v_main_~x~0_47_55 Int) (aux_div_aux_mod_v_main_~x~0_47_55_103 Int)) (and (or (and (<= (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) main_~x~0) (<= main_~x~0 (+ 65520 (* aux_div_v_main_~x~0_47_55 4294967296)))) (exists ((aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 Int)) (and (<= 65520 (mod (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (<= main_~x~0 (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (+ main_~x~0 65520 (* aux_div_v_main_~x~0_47_55 4294967296))) (forall ((v_it_5 Int)) (or (and (<= 65520 (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (< (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296) 268435455)) (not (<= 1 v_it_5)) (not (<= (+ v_it_5 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 1 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (< (+ aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (<= aux_div_v_main_~x~0_47_55 0) (< 0 (+ aux_div_aux_mod_v_main_~x~0_47_55_103 1))))} [51] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {689#(and (not (< (mod main_~x~0 4294967296) 268435455)) (exists ((aux_div_v_main_~x~0_47_55 Int) (aux_div_aux_mod_v_main_~x~0_47_55_103 Int)) (and (<= aux_div_v_main_~x~0_47_55 0) (exists ((aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 Int)) (and (<= 65520 (mod (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (<= main_~x~0 (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (+ main_~x~0 65520 (* aux_div_v_main_~x~0_47_55 4294967296))) (forall ((v_it_5 Int)) (or (and (<= 65520 (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (< (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296) 268435455)) (not (<= 1 v_it_5)) (not (<= (+ v_it_5 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 1 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (< (+ aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0))) (< 0 (+ aux_div_aux_mod_v_main_~x~0_47_55_103 1)))))} is UNKNOWN [2022-04-15 05:59:01,142 INFO L272 TraceCheckUtils]: 10: Hoare triple {689#(and (not (< (mod main_~x~0 4294967296) 268435455)) (exists ((aux_div_v_main_~x~0_47_55 Int) (aux_div_aux_mod_v_main_~x~0_47_55_103 Int)) (and (<= aux_div_v_main_~x~0_47_55 0) (exists ((aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 Int)) (and (<= 65520 (mod (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (<= main_~x~0 (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_47_55_103 4294967296) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59)) (+ main_~x~0 65520 (* aux_div_v_main_~x~0_47_55 4294967296))) (forall ((v_it_5 Int)) (or (and (<= 65520 (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296)) (< (mod (+ (* v_it_5 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59) (* main_~x~0 4294967295)) 4294967296) 268435455)) (not (<= 1 v_it_5)) (not (<= (+ v_it_5 aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 1 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0)))) (< (+ aux_div_aux_mod_aux_mod_v_main_~x~0_47_55_103_59 (* aux_div_aux_mod_v_main_~x~0_47_55_103 2147483648)) main_~x~0))) (< 0 (+ aux_div_aux_mod_v_main_~x~0_47_55_103 1)))))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {693#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 05:59:01,142 INFO L290 TraceCheckUtils]: 11: Hoare triple {693#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {697#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 05:59:01,143 INFO L290 TraceCheckUtils]: 12: Hoare triple {697#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {647#false} is VALID [2022-04-15 05:59:01,143 INFO L290 TraceCheckUtils]: 13: Hoare triple {647#false} assume !false; {647#false} is VALID [2022-04-15 05:59:01,143 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:59:01,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 05:59:18,488 WARN L232 SmtUtils]: Spent 10.50s on a formula simplification. DAG size of input: 63 DAG size of output: 61 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 05:59:24,004 INFO L290 TraceCheckUtils]: 13: Hoare triple {647#false} assume !false; {647#false} is VALID [2022-04-15 05:59:24,017 INFO L290 TraceCheckUtils]: 12: Hoare triple {697#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {647#false} is VALID [2022-04-15 05:59:24,017 INFO L290 TraceCheckUtils]: 11: Hoare triple {693#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {697#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 05:59:24,018 INFO L272 TraceCheckUtils]: 10: Hoare triple {654#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {693#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 05:59:24,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {653#(or (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 268435454)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [51] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {654#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 05:59:24,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [54] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_39 4294967296))) (let ((.cse1 (< .cse4 268435455)) (.cse0 (<= 65520 .cse4)) (.cse2 (= v_main_~x~0_39 v_main_~x~0_38))) (or (and (or (not .cse0) (not .cse1)) .cse2) (and (< 0 (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2))) (forall ((v_it_5 Int)) (or (not (<= 1 v_it_5)) (not (<= (+ v_it_5 1) (div (+ v_main_~x~0_39 (* (- 1) v_main_~x~0_38)) (- 2)))) (let ((.cse3 (mod (+ v_main_~x~0_39 (* v_it_5 2)) 4294967296))) (and (< .cse3 268435455) (<= 65520 .cse3))))) .cse1 (= (mod (+ v_main_~x~0_39 v_main_~x~0_38) 2) 0) .cse0) .cse2))) InVars {main_~x~0=v_main_~x~0_39} OutVars{main_~x~0=v_main_~x~0_38} AuxVars[] AssignedVars[main_~x~0] {653#(or (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 268435454)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is VALID [2022-04-15 05:59:24,115 INFO L290 TraceCheckUtils]: 7: Hoare triple {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [53] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 05:59:26,136 WARN L290 TraceCheckUtils]: 6: Hoare triple {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [52] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_37 v_main_~x~0_36)) (.cse2 (mod v_main_~x~0_37 4294967296)) (.cse1 (= |v_main_#t~post4_16| |v_main_#t~post4_15|))) (or (and .cse0 .cse1) (and (<= (div (+ (* (- 1) v_main_~x~0_36) 65520) (- 4294967296)) (+ (div (+ v_main_~x~0_37 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_37 v_main_~x~0_36) (< .cse2 65520)) (and .cse0 (<= 65520 .cse2) .cse1))) InVars {main_~x~0=v_main_~x~0_37, main_#t~post4=|v_main_#t~post4_16|} OutVars{main_~x~0=v_main_~x~0_36, main_#t~post4=|v_main_#t~post4_15|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is UNKNOWN [2022-04-15 05:59:26,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {646#true} ~x~0 := 0; {719#(and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58 Int) (aux_div_v_main_~x~0_48_31 Int) (aux_div_aux_mod_v_main_~x~0_48_31_78 Int)) (or (<= (+ main_~x~0 4294967296 (* aux_div_v_main_~x~0_48_31 4294967296)) (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2))) (<= (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0) (exists ((v_it_5 Int)) (and (or (not (<= 65520 (mod (+ main_~x~0 (* v_it_5 2)) 4294967296))) (not (< (mod (+ main_~x~0 (* v_it_5 2)) 4294967296) 268435455))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)))) (<= (+ main_~x~0 2) (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58)) (<= (+ (* 2 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) (* aux_div_aux_mod_v_main_~x~0_48_31_78 2)) (+ main_~x~0 (* aux_div_v_main_~x~0_48_31 4294967296) 268435454)) (<= (+ aux_div_aux_mod_v_main_~x~0_48_31_78 aux_div_aux_mod_aux_mod_v_main_~x~0_48_31_78_58) main_~x~0))) (not (<= 65520 (mod main_~x~0 4294967296)))) (or (<= (div (* (- 1) main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-15 05:59:26,138 INFO L272 TraceCheckUtils]: 4: Hoare triple {646#true} call #t~ret5 := main(); {646#true} is VALID [2022-04-15 05:59:26,138 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {646#true} {646#true} #40#return; {646#true} is VALID [2022-04-15 05:59:26,138 INFO L290 TraceCheckUtils]: 2: Hoare triple {646#true} assume true; {646#true} is VALID [2022-04-15 05:59:26,138 INFO L290 TraceCheckUtils]: 1: Hoare triple {646#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {646#true} is VALID [2022-04-15 05:59:26,138 INFO L272 TraceCheckUtils]: 0: Hoare triple {646#true} call ULTIMATE.init(); {646#true} is VALID [2022-04-15 05:59:26,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 05:59:26,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [726167035] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 05:59:26,139 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 05:59:26,139 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 7] total 14 [2022-04-15 05:59:30,391 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 05:59:30,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1097465046] [2022-04-15 05:59:30,391 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1097465046] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 05:59:30,391 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 05:59:30,391 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-15 05:59:30,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741277317] [2022-04-15 05:59:30,391 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 05:59:30,392 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 05:59:30,392 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 05:59:30,392 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:30,418 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:59:30,419 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 05:59:30,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 05:59:30,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 05:59:30,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=208, Unknown=3, NotChecked=0, Total=272 [2022-04-15 05:59:30,419 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:59:31,058 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. [2022-04-15 05:59:31,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 05:59:31,058 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 05:59:31,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 05:59:31,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-15 05:59:31,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-15 05:59:31,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 35 transitions. [2022-04-15 05:59:31,124 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:59:31,125 INFO L225 Difference]: With dead ends: 30 [2022-04-15 05:59:31,125 INFO L226 Difference]: Without dead ends: 23 [2022-04-15 05:59:31,126 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 22 SyntacticMatches, 10 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 23.1s TimeCoverageRelationStatistics Valid=102, Invalid=357, Unknown=3, NotChecked=0, Total=462 [2022-04-15 05:59:31,126 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 17 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 99 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 05:59:31,126 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 38 Invalid, 99 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 05:59:31,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-15 05:59:31,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-15 05:59:31,155 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 05:59:31,156 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,156 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,156 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:59:31,157 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-15 05:59:31,157 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 26 transitions. [2022-04-15 05:59:31,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:59:31,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:59:31,158 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 05:59:31,158 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 05:59:31,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 05:59:31,159 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-15 05:59:31,159 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 26 transitions. [2022-04-15 05:59:31,159 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 05:59:31,159 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 05:59:31,159 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 05:59:31,159 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 05:59:31,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 18 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 26 transitions. [2022-04-15 05:59:31,160 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 26 transitions. Word has length 19 [2022-04-15 05:59:31,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 05:59:31,160 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 26 transitions. [2022-04-15 05:59:31,161 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 8 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 05:59:31,161 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 26 transitions. [2022-04-15 05:59:31,199 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 05:59:31,199 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 26 transitions. [2022-04-15 05:59:31,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-15 05:59:31,199 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 05:59:31,199 INFO L499 BasicCegarLoop]: trace histogram [5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 05:59:31,203 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-15 05:59:31,403 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 05:59:31,403 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 05:59:31,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 05:59:31,404 INFO L85 PathProgramCache]: Analyzing trace with hash -205744403, now seen corresponding path program 3 times [2022-04-15 05:59:31,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 05:59:31,404 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2044069369] [2022-04-15 05:59:32,137 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 1 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 05:59:32,417 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 0 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 05:59:32,419 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 05:59:32,424 INFO L85 PathProgramCache]: Analyzing trace with hash 246894512, now seen corresponding path program 1 times [2022-04-15 05:59:32,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 05:59:32,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218353102] [2022-04-15 05:59:32,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:59:32,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 05:59:32,433 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_7.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_7.0)) 4294967296)) 268435455) 0)) [2022-04-15 05:59:32,433 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_7.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_7.0)) 4294967296)) 65520) 0) [2022-04-15 05:59:32,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:59:32,463 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_7.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_7.1)) 4294967296)) 268435455) 0)) [2022-04-15 05:59:32,463 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_7.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_7.1)) 4294967296)) 65520) 0) [2022-04-15 05:59:32,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 05:59:32,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:59:32,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {911#true} is VALID [2022-04-15 05:59:32,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {911#true} assume true; {911#true} is VALID [2022-04-15 05:59:32,651 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {911#true} {911#true} #40#return; {911#true} is VALID [2022-04-15 05:59:32,652 INFO L272 TraceCheckUtils]: 0: Hoare triple {911#true} call ULTIMATE.init(); {922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 05:59:32,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {911#true} is VALID [2022-04-15 05:59:32,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {911#true} assume true; {911#true} is VALID [2022-04-15 05:59:32,652 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {911#true} {911#true} #40#return; {911#true} is VALID [2022-04-15 05:59:32,652 INFO L272 TraceCheckUtils]: 4: Hoare triple {911#true} call #t~ret5 := main(); {911#true} is VALID [2022-04-15 05:59:32,652 INFO L290 TraceCheckUtils]: 5: Hoare triple {911#true} ~x~0 := 0; {916#(= main_~x~0 0)} is VALID [2022-04-15 05:59:32,654 INFO L290 TraceCheckUtils]: 6: Hoare triple {916#(= main_~x~0 0)} [56] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_58 v_main_~x~0_57)) (.cse1 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse2 (mod v_main_~x~0_58 4294967296))) (or (and .cse0 .cse1 (<= 65520 .cse2)) (and .cse0 .cse1) (and (< v_main_~x~0_58 v_main_~x~0_57) (<= (div (+ 65520 (* (- 1) v_main_~x~0_57)) (- 4294967296)) (+ (div (+ v_main_~x~0_58 (- 4294967295)) 4294967296) 1)) (< .cse2 65520)))) InVars {main_~x~0=v_main_~x~0_58, main_#t~post4=|v_main_#t~post4_23|} OutVars{main_~x~0=v_main_~x~0_57, main_#t~post4=|v_main_#t~post4_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:59:32,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [57] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 05:59:32,657 INFO L290 TraceCheckUtils]: 8: Hoare triple {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [58] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_60 4294967296))) (let ((.cse3 (= v_main_~x~0_60 v_main_~x~0_59)) (.cse2 (< .cse4 268435455)) (.cse1 (<= 65520 .cse4))) (or (and (forall ((v_it_7 Int)) (or (let ((.cse0 (mod (+ v_main_~x~0_60 (* v_it_7 2)) 4294967296))) (and (<= 65520 .cse0) (< .cse0 268435455))) (not (<= (+ v_it_7 1) (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2)))) (not (<= 1 v_it_7)))) .cse1 .cse2 (< 0 (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2))) (= (mod (+ v_main_~x~0_60 v_main_~x~0_59) 2) 0)) .cse3 (and .cse3 (or (not .cse2) (not .cse1)))))) InVars {main_~x~0=v_main_~x~0_60} OutVars{main_~x~0=v_main_~x~0_59} AuxVars[] AssignedVars[main_~x~0] {918#(or (<= main_~x~0 (* (div main_~x~0 2) 2)) (<= main_~x~0 (+ 65520 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 05:59:32,658 INFO L290 TraceCheckUtils]: 9: Hoare triple {918#(or (<= main_~x~0 (* (div main_~x~0 2) 2)) (<= main_~x~0 (+ 65520 (* 4294967296 (div main_~x~0 4294967296)))))} [55] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {919#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 05:59:32,658 INFO L272 TraceCheckUtils]: 10: Hoare triple {919#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {920#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 05:59:32,659 INFO L290 TraceCheckUtils]: 11: Hoare triple {920#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {921#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 05:59:32,659 INFO L290 TraceCheckUtils]: 12: Hoare triple {921#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {912#false} is VALID [2022-04-15 05:59:32,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {912#false} assume !false; {912#false} is VALID [2022-04-15 05:59:32,659 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 05:59:32,659 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 05:59:32,659 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218353102] [2022-04-15 05:59:32,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [218353102] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 05:59:32,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [998415928] [2022-04-15 05:59:32,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 05:59:32,660 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 05:59:32,660 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 05:59:32,661 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 05:59:32,662 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 05:59:32,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:59:32,708 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 05:59:32,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 05:59:32,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 06:10:16,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {911#true} call ULTIMATE.init(); {911#true} is VALID [2022-04-15 06:10:16,611 INFO L290 TraceCheckUtils]: 1: Hoare triple {911#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {911#true} is VALID [2022-04-15 06:10:16,611 INFO L290 TraceCheckUtils]: 2: Hoare triple {911#true} assume true; {911#true} is VALID [2022-04-15 06:10:16,611 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {911#true} {911#true} #40#return; {911#true} is VALID [2022-04-15 06:10:16,611 INFO L272 TraceCheckUtils]: 4: Hoare triple {911#true} call #t~ret5 := main(); {911#true} is VALID [2022-04-15 06:10:16,612 INFO L290 TraceCheckUtils]: 5: Hoare triple {911#true} ~x~0 := 0; {916#(= main_~x~0 0)} is VALID [2022-04-15 06:10:16,613 INFO L290 TraceCheckUtils]: 6: Hoare triple {916#(= main_~x~0 0)} [56] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_58 v_main_~x~0_57)) (.cse1 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse2 (mod v_main_~x~0_58 4294967296))) (or (and .cse0 .cse1 (<= 65520 .cse2)) (and .cse0 .cse1) (and (< v_main_~x~0_58 v_main_~x~0_57) (<= (div (+ 65520 (* (- 1) v_main_~x~0_57)) (- 4294967296)) (+ (div (+ v_main_~x~0_58 (- 4294967295)) 4294967296) 1)) (< .cse2 65520)))) InVars {main_~x~0=v_main_~x~0_58, main_#t~post4=|v_main_#t~post4_23|} OutVars{main_~x~0=v_main_~x~0_57, main_#t~post4=|v_main_#t~post4_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 06:10:16,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [57] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} is VALID [2022-04-15 06:10:16,695 INFO L290 TraceCheckUtils]: 8: Hoare triple {917#(and (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0) (< 0 (+ (div main_~x~0 4294967296) 1)))} [58] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_60 4294967296))) (let ((.cse3 (= v_main_~x~0_60 v_main_~x~0_59)) (.cse2 (< .cse4 268435455)) (.cse1 (<= 65520 .cse4))) (or (and (forall ((v_it_7 Int)) (or (let ((.cse0 (mod (+ v_main_~x~0_60 (* v_it_7 2)) 4294967296))) (and (<= 65520 .cse0) (< .cse0 268435455))) (not (<= (+ v_it_7 1) (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2)))) (not (<= 1 v_it_7)))) .cse1 .cse2 (< 0 (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2))) (= (mod (+ v_main_~x~0_60 v_main_~x~0_59) 2) 0)) .cse3 (and .cse3 (or (not .cse2) (not .cse1)))))) InVars {main_~x~0=v_main_~x~0_60} OutVars{main_~x~0=v_main_~x~0_59} AuxVars[] AssignedVars[main_~x~0] {950#(exists ((aux_div_aux_mod_v_main_~x~0_68_31_111 Int) (aux_div_v_main_~x~0_68_31 Int)) (and (or (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 Int)) (and (forall ((v_it_7 Int)) (or (not (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 2147483648) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 2147483648) 1) (+ (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 2147483648) main_~x~0))) (and (< (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296) 268435455) (<= 65520 (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296))) (not (<= 1 v_it_7)))) (< (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (+ main_~x~0 268435455)) (<= main_~x~0 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (+ main_~x~0 4294967296)) (<= (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (<= (+ main_~x~0 (* aux_div_v_main_~x~0_68_31 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294) 2)) (<= (+ main_~x~0 65520) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ main_~x~0 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296))))) (and (<= (* aux_div_v_main_~x~0_68_31 4294967296) main_~x~0) (<= main_~x~0 (+ 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296))))) (<= aux_div_aux_mod_v_main_~x~0_68_31_111 0) (< 0 (+ aux_div_v_main_~x~0_68_31 1))))} is VALID [2022-04-15 06:10:18,705 WARN L290 TraceCheckUtils]: 9: Hoare triple {950#(exists ((aux_div_aux_mod_v_main_~x~0_68_31_111 Int) (aux_div_v_main_~x~0_68_31 Int)) (and (or (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 Int)) (and (forall ((v_it_7 Int)) (or (not (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 2147483648) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 2147483648) 1) (+ (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 2147483648) main_~x~0))) (and (< (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296) 268435455) (<= 65520 (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296))) (not (<= 1 v_it_7)))) (< (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (+ main_~x~0 268435455)) (<= main_~x~0 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (+ main_~x~0 4294967296)) (<= (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (<= (+ main_~x~0 (* aux_div_v_main_~x~0_68_31 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294) 2)) (<= (+ main_~x~0 65520) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ main_~x~0 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296))))) (and (<= (* aux_div_v_main_~x~0_68_31 4294967296) main_~x~0) (<= main_~x~0 (+ 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296))))) (<= aux_div_aux_mod_v_main_~x~0_68_31_111 0) (< 0 (+ aux_div_v_main_~x~0_68_31 1))))} [55] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {954#(and (not (< (mod main_~x~0 4294967296) 268435455)) (exists ((aux_div_aux_mod_v_main_~x~0_68_31_111 Int) (aux_div_v_main_~x~0_68_31 Int)) (and (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 Int)) (and (forall ((v_it_7 Int)) (or (not (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 2147483648) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 2147483648) 1) (+ (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 2147483648) main_~x~0))) (and (< (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296) 268435455) (<= 65520 (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296))) (not (<= 1 v_it_7)))) (< (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (+ main_~x~0 268435455)) (<= main_~x~0 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (+ main_~x~0 4294967296)) (<= (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (<= (+ main_~x~0 (* aux_div_v_main_~x~0_68_31 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294) 2)) (<= (+ main_~x~0 65520) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ main_~x~0 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296))))) (<= aux_div_aux_mod_v_main_~x~0_68_31_111 0) (< 0 (+ aux_div_v_main_~x~0_68_31 1)))))} is UNKNOWN [2022-04-15 06:10:18,784 INFO L272 TraceCheckUtils]: 10: Hoare triple {954#(and (not (< (mod main_~x~0 4294967296) 268435455)) (exists ((aux_div_aux_mod_v_main_~x~0_68_31_111 Int) (aux_div_v_main_~x~0_68_31 Int)) (and (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 Int)) (and (forall ((v_it_7 Int)) (or (not (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 2147483648) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 2147483648) 1) (+ (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 2147483648) main_~x~0))) (and (< (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296) 268435455) (<= 65520 (mod (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* v_it_7 2) (* main_~x~0 4294967295)) 4294967296))) (not (<= 1 v_it_7)))) (< (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (+ main_~x~0 268435455)) (<= main_~x~0 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (< 0 aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2)) (+ main_~x~0 4294967296)) (<= (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (<= (+ main_~x~0 (* aux_div_v_main_~x~0_68_31 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296)) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296))) (< (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ (* main_~x~0 2) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967294) 2)) (<= (+ main_~x~0 65520) (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145_78_94 2) (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_68_31_111_142_145 4294967296)) (+ main_~x~0 65520 (* aux_div_aux_mod_v_main_~x~0_68_31_111 4294967296) (* aux_div_aux_mod_aux_mod_v_main_~x~0_68_31_111_142 4294967296))))) (<= aux_div_aux_mod_v_main_~x~0_68_31_111 0) (< 0 (+ aux_div_v_main_~x~0_68_31 1)))))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {958#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:10:18,785 INFO L290 TraceCheckUtils]: 11: Hoare triple {958#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {962#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 06:10:18,785 INFO L290 TraceCheckUtils]: 12: Hoare triple {962#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {912#false} is VALID [2022-04-15 06:10:18,785 INFO L290 TraceCheckUtils]: 13: Hoare triple {912#false} assume !false; {912#false} is VALID [2022-04-15 06:10:18,786 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:10:18,786 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 06:10:42,476 INFO L290 TraceCheckUtils]: 13: Hoare triple {912#false} assume !false; {912#false} is VALID [2022-04-15 06:10:42,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {962#(<= 1 __VERIFIER_assert_~cond)} assume 0 == ~cond; {912#false} is VALID [2022-04-15 06:10:42,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {958#(<= 1 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {962#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 06:10:42,478 INFO L272 TraceCheckUtils]: 10: Hoare triple {919#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {958#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 06:10:42,478 INFO L290 TraceCheckUtils]: 9: Hoare triple {981#(or (< (mod main_~x~0 4294967296) 268435455) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [55] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {919#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 06:10:44,489 WARN L290 TraceCheckUtils]: 8: Hoare triple {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} [58] L16-2-->L15-2_primed: Formula: (let ((.cse4 (mod v_main_~x~0_60 4294967296))) (let ((.cse3 (= v_main_~x~0_60 v_main_~x~0_59)) (.cse2 (< .cse4 268435455)) (.cse1 (<= 65520 .cse4))) (or (and (forall ((v_it_7 Int)) (or (let ((.cse0 (mod (+ v_main_~x~0_60 (* v_it_7 2)) 4294967296))) (and (<= 65520 .cse0) (< .cse0 268435455))) (not (<= (+ v_it_7 1) (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2)))) (not (<= 1 v_it_7)))) .cse1 .cse2 (< 0 (div (+ v_main_~x~0_60 (* (- 1) v_main_~x~0_59)) (- 2))) (= (mod (+ v_main_~x~0_60 v_main_~x~0_59) 2) 0)) .cse3 (and .cse3 (or (not .cse2) (not .cse1)))))) InVars {main_~x~0=v_main_~x~0_60} OutVars{main_~x~0=v_main_~x~0_59} AuxVars[] AssignedVars[main_~x~0] {981#(or (< (mod main_~x~0 4294967296) 268435455) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is UNKNOWN [2022-04-15 06:10:46,499 WARN L290 TraceCheckUtils]: 7: Hoare triple {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} [57] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} is UNKNOWN [2022-04-15 06:10:48,511 WARN L290 TraceCheckUtils]: 6: Hoare triple {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} [56] L16-2-->L15-2_primed: Formula: (let ((.cse0 (= v_main_~x~0_58 v_main_~x~0_57)) (.cse1 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse2 (mod v_main_~x~0_58 4294967296))) (or (and .cse0 .cse1 (<= 65520 .cse2)) (and .cse0 .cse1) (and (< v_main_~x~0_58 v_main_~x~0_57) (<= (div (+ 65520 (* (- 1) v_main_~x~0_57)) (- 4294967296)) (+ (div (+ v_main_~x~0_58 (- 4294967295)) 4294967296) 1)) (< .cse2 65520)))) InVars {main_~x~0=v_main_~x~0_58, main_#t~post4=|v_main_#t~post4_23|} OutVars{main_~x~0=v_main_~x~0_57, main_#t~post4=|v_main_#t~post4_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} is UNKNOWN [2022-04-15 06:10:48,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {911#true} ~x~0 := 0; {985#(and (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (<= (div (+ (* (- 1) main_~x~0) 268435454) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (<= (div (- main_~x~0) (- 2)) (+ (div (+ (- 2) main_~x~0) 2) 1)) (not (<= 65520 (mod main_~x~0 4294967296))) (forall ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 Int) (aux_div_v_main_~x~0_69_31 Int) (aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 Int)) (or (<= 2 (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56)) (<= aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 0) (< (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 0) (<= (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) (* aux_div_v_main_~x~0_69_31 4294967296) 4294967296) (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2))) (exists ((v_it_7 Int)) (and (<= (+ v_it_7 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56 1) aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119) (or (not (<= 65520 (mod (+ (* v_it_7 2) main_~x~0) 4294967296))) (not (< (mod (+ (* v_it_7 2) main_~x~0) 4294967296) 268435455))) (<= 1 v_it_7))) (< (+ main_~x~0 (* aux_div_aux_mod_aux_mod_v_main_~x~0_69_31_78_119 2)) (+ (* 2 aux_div_aux_mod_aux_mod_aux_mod_v_main_~x~0_69_31_78_119_56) 268435455 (* aux_div_v_main_~x~0_69_31 4294967296)))))))} is VALID [2022-04-15 06:10:48,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {911#true} call #t~ret5 := main(); {911#true} is VALID [2022-04-15 06:10:48,513 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {911#true} {911#true} #40#return; {911#true} is VALID [2022-04-15 06:10:48,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {911#true} assume true; {911#true} is VALID [2022-04-15 06:10:48,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {911#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {911#true} is VALID [2022-04-15 06:10:48,514 INFO L272 TraceCheckUtils]: 0: Hoare triple {911#true} call ULTIMATE.init(); {911#true} is VALID [2022-04-15 06:10:48,514 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 06:10:48,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [998415928] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 06:10:48,514 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 06:10:48,514 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 7] total 15 [2022-04-15 06:11:01,478 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-15 06:11:01,479 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2044069369] [2022-04-15 06:11:01,479 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2044069369] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 06:11:01,479 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 06:11:01,479 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-15 06:11:01,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317607023] [2022-04-15 06:11:01,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 06:11:01,479 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 06:11:01,480 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 06:11:01,480 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:01,516 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:11:01,516 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-15 06:11:01,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-15 06:11:01,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-15 06:11:01,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=253, Unknown=10, NotChecked=0, Total=342 [2022-04-15 06:11:01,517 INFO L87 Difference]: Start difference. First operand 23 states and 26 transitions. Second operand has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:11:04,352 INFO L93 Difference]: Finished difference Result 32 states and 37 transitions. [2022-04-15 06:11:04,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 06:11:04,352 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 06:11:04,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 06:11:04,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 37 transitions. [2022-04-15 06:11:04,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 37 transitions. [2022-04-15 06:11:04,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 37 transitions. [2022-04-15 06:11:04,419 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:11:04,420 INFO L225 Difference]: With dead ends: 32 [2022-04-15 06:11:04,420 INFO L226 Difference]: Without dead ends: 25 [2022-04-15 06:11:04,420 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 21 SyntacticMatches, 11 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 36.8s TimeCoverageRelationStatistics Valid=134, Invalid=455, Unknown=11, NotChecked=0, Total=600 [2022-04-15 06:11:04,421 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 19 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 99 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 99 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 06:11:04,421 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 38 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 99 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 06:11:04,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-15 06:11:04,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-04-15 06:11:04,451 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 06:11:04,451 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,451 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,451 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:11:04,452 INFO L93 Difference]: Finished difference Result 25 states and 28 transitions. [2022-04-15 06:11:04,452 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-04-15 06:11:04,464 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:11:04,464 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:11:04,464 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-15 06:11:04,464 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-15 06:11:04,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 06:11:04,465 INFO L93 Difference]: Finished difference Result 25 states and 28 transitions. [2022-04-15 06:11:04,465 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-04-15 06:11:04,466 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 06:11:04,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 06:11:04,466 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 06:11:04,466 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 06:11:04,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.2) internal successors, (24), 20 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2022-04-15 06:11:04,467 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 21 [2022-04-15 06:11:04,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 06:11:04,467 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2022-04-15 06:11:04,467 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.7) internal successors, (17), 9 states have internal predecessors, (17), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 06:11:04,467 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 28 transitions. [2022-04-15 06:11:04,528 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 06:11:04,528 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-04-15 06:11:04,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-15 06:11:04,529 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 06:11:04,529 INFO L499 BasicCegarLoop]: trace histogram [6, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 06:11:04,533 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 06:11:04,729 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:11:04,730 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 06:11:04,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 06:11:04,730 INFO L85 PathProgramCache]: Analyzing trace with hash 114109832, now seen corresponding path program 4 times [2022-04-15 06:11:04,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-15 06:11:04,730 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [671096293] [2022-04-15 06:11:07,751 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-15 06:11:08,019 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 1 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-15 06:11:08,480 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 0 HavocedVariables, 1 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-15 06:11:08,482 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-15 06:11:08,485 INFO L85 PathProgramCache]: Analyzing trace with hash -1998540624, now seen corresponding path program 1 times [2022-04-15 06:11:08,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 06:11:08,486 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276886583] [2022-04-15 06:11:08,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:11:08,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 06:11:08,505 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_9.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_9.0)) 4294967296)) 65520) 0) [2022-04-15 06:11:08,505 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_9.0) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_9.0)) 4294967296)) 268435455) 0)) [2022-04-15 06:11:08,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:11:08,533 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_9.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_9.1)) 4294967296)) 65520) 0) [2022-04-15 06:11:08,533 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ (* (- 1) main_~x~0_6) (* (- 2) .v_it_9.1) (* 4294967296 (div (+ main_~x~0_6 (* 2 .v_it_9.1)) 4294967296)) 268435455) 0)) [2022-04-15 06:11:08,700 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 06:11:08,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:11:08,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {1203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {1192#true} is VALID [2022-04-15 06:11:08,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {1192#true} assume true; {1192#true} is VALID [2022-04-15 06:11:08,711 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1192#true} {1192#true} #40#return; {1192#true} is VALID [2022-04-15 06:11:08,712 INFO L272 TraceCheckUtils]: 0: Hoare triple {1192#true} call ULTIMATE.init(); {1203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 06:11:08,712 INFO L290 TraceCheckUtils]: 1: Hoare triple {1203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3); {1192#true} is VALID [2022-04-15 06:11:08,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {1192#true} assume true; {1192#true} is VALID [2022-04-15 06:11:08,712 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1192#true} {1192#true} #40#return; {1192#true} is VALID [2022-04-15 06:11:08,712 INFO L272 TraceCheckUtils]: 4: Hoare triple {1192#true} call #t~ret5 := main(); {1192#true} is VALID [2022-04-15 06:11:08,720 INFO L290 TraceCheckUtils]: 5: Hoare triple {1192#true} ~x~0 := 0; {1197#(= main_~x~0 0)} is VALID [2022-04-15 06:11:08,721 INFO L290 TraceCheckUtils]: 6: Hoare triple {1197#(= main_~x~0 0)} [60] L16-2-->L15-2_primed: Formula: (let ((.cse0 (mod v_main_~x~0_80 4294967296))) (or (and (<= (div (+ 65520 (* (- 1) v_main_~x~0_79)) (- 4294967296)) (+ (div (+ v_main_~x~0_80 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_80 v_main_~x~0_79) (< .cse0 65520)) (and (= |v_main_#t~post4_29| |v_main_#t~post4_30|) (= v_main_~x~0_79 v_main_~x~0_80) (<= 65520 .cse0)) (and (= v_main_~x~0_80 v_main_~x~0_79) (= |v_main_#t~post4_30| |v_main_#t~post4_29|)))) InVars {main_~x~0=v_main_~x~0_80, main_#t~post4=|v_main_#t~post4_30|} OutVars{main_~x~0=v_main_~x~0_79, main_#t~post4=|v_main_#t~post4_29|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1198#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 06:11:08,721 INFO L290 TraceCheckUtils]: 7: Hoare triple {1198#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [61] L15-2_primed-->L16-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1198#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} is VALID [2022-04-15 06:11:08,725 INFO L290 TraceCheckUtils]: 8: Hoare triple {1198#(or (and (<= 1 main_~x~0) (<= (div (+ 65520 (* (- 1) main_~x~0)) (- 4294967296)) 0)) (and (<= main_~x~0 0) (<= 0 main_~x~0)))} [62] L16-2-->L15-2_primed: Formula: (let ((.cse3 (mod v_main_~x~0_82 4294967296))) (let ((.cse0 (< .cse3 268435455)) (.cse1 (<= 65520 .cse3))) (or (and (or (not .cse0) (not .cse1)) (= v_main_~x~0_81 v_main_~x~0_82)) (= v_main_~x~0_82 v_main_~x~0_81) (and (forall ((v_it_9 Int)) (or (not (<= 1 v_it_9)) (not (<= (+ v_it_9 1) (div (+ v_main_~x~0_82 (* (- 1) v_main_~x~0_81)) (- 2)))) (let ((.cse2 (mod (+ v_main_~x~0_82 (* v_it_9 2)) 4294967296))) (and (< .cse2 268435455) (<= 65520 .cse2))))) (= (mod (+ v_main_~x~0_81 v_main_~x~0_82) 2) 0) .cse0 (< 0 (div (+ v_main_~x~0_82 (* (- 1) v_main_~x~0_81)) (- 2))) .cse1)))) InVars {main_~x~0=v_main_~x~0_82} OutVars{main_~x~0=v_main_~x~0_81} AuxVars[] AssignedVars[main_~x~0] {1199#(or (and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 65521)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} is VALID [2022-04-15 06:11:08,726 INFO L290 TraceCheckUtils]: 9: Hoare triple {1199#(or (and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 65521)) (<= main_~x~0 (* (div main_~x~0 2) 2)))} [59] L15-2_primed-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1200#(<= main_~x~0 (* (div main_~x~0 2) 2))} is VALID [2022-04-15 06:11:08,727 INFO L272 TraceCheckUtils]: 10: Hoare triple {1200#(<= main_~x~0 (* (div main_~x~0 2) 2))} call __VERIFIER_assert((if 0 == (if ~x~0 % 4294967296 < 0 && 0 != ~x~0 % 4294967296 % 2 then ~x~0 % 4294967296 % 2 - 2 else ~x~0 % 4294967296 % 2) % 4294967296 then 1 else 0)); {1201#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 06:11:08,727 INFO L290 TraceCheckUtils]: 11: Hoare triple {1201#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {1202#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 06:11:08,728 INFO L290 TraceCheckUtils]: 12: Hoare triple {1202#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1193#false} is VALID [2022-04-15 06:11:08,728 INFO L290 TraceCheckUtils]: 13: Hoare triple {1193#false} assume !false; {1193#false} is VALID [2022-04-15 06:11:08,728 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 06:11:08,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 06:11:08,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276886583] [2022-04-15 06:11:08,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1276886583] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 06:11:08,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [28234640] [2022-04-15 06:11:08,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 06:11:08,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 06:11:08,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 06:11:08,731 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 06:11:08,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 06:11:08,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:11:08,764 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 06:11:08,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 06:11:08,794 INFO L286 TraceCheckSpWp]: Computing forward predicates...