/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 19:39:02,128 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 19:39:02,130 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 19:39:02,171 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-14 19:39:02,220 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 19:39:02,221 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 19:39:02,223 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 19:39:02,224 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 19:39:02,236 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 19:39:02,237 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 19:39:02,238 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 19:39:02,238 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 19:39:02,239 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 19:39:02,239 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:39:02,239 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 19:39:02,240 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 19:39:02,240 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 19:39:02,240 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 19:39:02,484 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 19:39:02,505 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 19:39:02,506 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 19:39:02,507 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 19:39:02,508 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 19:39:02,509 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-14 19:39:02,569 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/25f03d024/d978efb0d57c4725a4f8e8fd52cbf754/FLAG9e5b1b07f [2022-04-14 19:39:02,872 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 19:39:02,873 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-14 19:39:02,879 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/25f03d024/d978efb0d57c4725a4f8e8fd52cbf754/FLAG9e5b1b07f [2022-04-14 19:39:03,313 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/25f03d024/d978efb0d57c4725a4f8e8fd52cbf754 [2022-04-14 19:39:03,315 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 19:39:03,316 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 19:39:03,317 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 19:39:03,317 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 19:39:03,324 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 19:39:03,325 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,326 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75f0fd69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03, skipping insertion in model container [2022-04-14 19:39:03,326 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,333 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 19:39:03,343 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 19:39:03,474 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-14 19:39:03,498 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:39:03,505 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 19:39:03,514 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-14 19:39:03,518 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:39:03,529 INFO L208 MainTranslator]: Completed translation [2022-04-14 19:39:03,530 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03 WrapperNode [2022-04-14 19:39:03,530 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 19:39:03,531 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 19:39:03,531 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 19:39:03,531 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 19:39:03,538 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,539 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,543 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,544 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,548 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,553 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,554 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,556 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 19:39:03,557 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 19:39:03,557 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 19:39:03,557 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 19:39:03,558 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,565 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:39:03,585 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:39:03,595 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 19:39:03,615 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 19:39:03,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 19:39:03,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 19:39:03,633 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 19:39:03,633 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 19:39:03,634 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 19:39:03,634 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 19:39:03,634 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 19:39:03,635 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 19:39:03,636 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 19:39:03,636 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 19:39:03,638 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 19:39:03,638 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 19:39:03,639 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 19:39:03,700 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 19:39:03,701 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 19:39:03,887 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 19:39:03,893 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 19:39:03,894 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-14 19:39:03,901 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:39:03 BoogieIcfgContainer [2022-04-14 19:39:03,907 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 19:39:03,908 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 19:39:03,908 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 19:39:03,912 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 19:39:03,915 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:39:03" (1/1) ... [2022-04-14 19:39:03,916 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 19:39:04,359 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:39:04,360 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-14 19:39:04,679 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:39:04,680 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_6, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-14 19:39:05,042 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:39:05,042 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-14 19:39:05,345 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:39:05,346 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_7, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-14 19:39:05,350 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:39:05 BasicIcfg [2022-04-14 19:39:05,350 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 19:39:05,352 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 19:39:05,352 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 19:39:05,355 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 19:39:05,355 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 07:39:03" (1/4) ... [2022-04-14 19:39:05,356 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c91940f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:39:05, skipping insertion in model container [2022-04-14 19:39:05,356 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:39:03" (2/4) ... [2022-04-14 19:39:05,356 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c91940f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:39:05, skipping insertion in model container [2022-04-14 19:39:05,357 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:39:03" (3/4) ... [2022-04-14 19:39:05,357 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c91940f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 07:39:05, skipping insertion in model container [2022-04-14 19:39:05,357 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:39:05" (4/4) ... [2022-04-14 19:39:05,358 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de41.cJordan [2022-04-14 19:39:05,362 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 19:39:05,363 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 19:39:05,396 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 19:39:05,401 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 19:39:05,401 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 19:39:05,415 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 19:39:05,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 19:39:05,420 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:05,420 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:05,420 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:05,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:05,424 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-14 19:39:05,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:05,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870762494] [2022-04-14 19:39:05,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:05,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:05,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:05,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:05,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:05,565 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-14 19:39:05,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:39:05,566 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:39:05,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:05,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-14 19:39:05,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:39:05,569 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:39:05,569 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:39:05,570 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-14 19:39:05,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,570 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-14 19:39:05,571 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,571 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,571 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {27#false} is VALID [2022-04-14 19:39:05,572 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-14 19:39:05,572 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,572 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:39:05,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:05,573 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:05,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1870762494] [2022-04-14 19:39:05,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1870762494] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:39:05,574 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:39:05,574 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 19:39:05,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580750778] [2022-04-14 19:39:05,579 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:39:05,584 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:39:05,586 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:39:05,590 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,612 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:05,612 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 19:39:05,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:39:05,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 19:39:05,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:39:05,647 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:05,713 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-14 19:39:05,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 19:39:05,713 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:39:05,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:39:05,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-14 19:39:05,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-14 19:39:05,729 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 31 transitions. [2022-04-14 19:39:05,797 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:05,803 INFO L225 Difference]: With dead ends: 23 [2022-04-14 19:39:05,804 INFO L226 Difference]: Without dead ends: 16 [2022-04-14 19:39:05,805 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:39:05,809 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:39:05,811 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 19:39:05,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-14 19:39:05,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-14 19:39:05,835 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:39:05,836 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,836 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,837 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:05,844 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-14 19:39:05,844 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:39:05,844 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:05,844 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:05,845 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-14 19:39:05,846 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-14 19:39:05,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:05,848 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-14 19:39:05,848 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:39:05,849 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:05,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:05,850 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:39:05,850 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:39:05,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-14 19:39:05,862 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-14 19:39:05,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:39:05,863 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-14 19:39:05,863 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:05,863 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:39:05,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 19:39:05,864 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:05,864 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:05,864 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 19:39:05,864 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:05,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:05,867 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-14 19:39:05,867 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:05,868 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551542458] [2022-04-14 19:39:05,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:05,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:05,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:06,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-14 19:39:06,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:39:06,205 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:39:06,206 INFO L272 TraceCheckUtils]: 0: Hoare triple {105#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:06,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-14 19:39:06,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:39:06,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:39:06,207 INFO L272 TraceCheckUtils]: 4: Hoare triple {105#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:39:06,208 INFO L290 TraceCheckUtils]: 5: Hoare triple {105#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {110#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,209 INFO L290 TraceCheckUtils]: 6: Hoare triple {110#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,209 INFO L290 TraceCheckUtils]: 7: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,210 INFO L290 TraceCheckUtils]: 8: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,211 INFO L290 TraceCheckUtils]: 9: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,212 INFO L290 TraceCheckUtils]: 10: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {112#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,213 INFO L272 TraceCheckUtils]: 11: Hoare triple {112#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {113#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:39:06,214 INFO L290 TraceCheckUtils]: 12: Hoare triple {113#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {114#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:39:06,214 INFO L290 TraceCheckUtils]: 13: Hoare triple {114#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-14 19:39:06,215 INFO L290 TraceCheckUtils]: 14: Hoare triple {106#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-14 19:39:06,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:06,215 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:06,215 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551542458] [2022-04-14 19:39:06,216 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1551542458] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:39:06,216 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:39:06,216 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-14 19:39:06,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343297066] [2022-04-14 19:39:06,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:39:06,218 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:39:06,218 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:39:06,218 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,234 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:06,235 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:39:06,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:39:06,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:39:06,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-04-14 19:39:06,240 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:06,490 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-14 19:39:06,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-14 19:39:06,490 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:39:06,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:39:06,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-14 19:39:06,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-14 19:39:06,495 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 37 transitions. [2022-04-14 19:39:06,538 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:06,539 INFO L225 Difference]: With dead ends: 27 [2022-04-14 19:39:06,539 INFO L226 Difference]: Without dead ends: 24 [2022-04-14 19:39:06,540 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-04-14 19:39:06,541 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 20 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:39:06,541 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 42 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 59 Invalid, 0 Unknown, 4 Unchecked, 0.1s Time] [2022-04-14 19:39:06,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-14 19:39:06,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 21. [2022-04-14 19:39:06,544 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:39:06,544 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,545 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,545 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:06,549 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-14 19:39:06,549 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-14 19:39:06,549 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:06,549 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:06,550 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-14 19:39:06,550 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-14 19:39:06,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:06,553 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-14 19:39:06,553 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-14 19:39:06,554 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:06,554 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:06,554 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:39:06,554 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:39:06,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2022-04-14 19:39:06,557 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 27 transitions. Word has length 15 [2022-04-14 19:39:06,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:39:06,558 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 27 transitions. [2022-04-14 19:39:06,559 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:06,559 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 27 transitions. [2022-04-14 19:39:06,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:39:06,560 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:06,560 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:06,560 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 19:39:06,560 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:06,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:06,561 INFO L85 PathProgramCache]: Analyzing trace with hash 139812261, now seen corresponding path program 1 times [2022-04-14 19:39:06,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:06,561 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264713630] [2022-04-14 19:39:06,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:06,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:06,583 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:39:06,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,636 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:39:06,731 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:06,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,738 INFO L290 TraceCheckUtils]: 0: Hoare triple {232#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {222#true} is VALID [2022-04-14 19:39:06,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {222#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:06,738 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222#true} {222#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:06,739 INFO L272 TraceCheckUtils]: 0: Hoare triple {222#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:06,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {232#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {222#true} is VALID [2022-04-14 19:39:06,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {222#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:06,740 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222#true} {222#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:06,740 INFO L272 TraceCheckUtils]: 4: Hoare triple {222#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:06,740 INFO L290 TraceCheckUtils]: 5: Hoare triple {222#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {227#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,741 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,742 INFO L290 TraceCheckUtils]: 7: Hoare triple {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,743 INFO L290 TraceCheckUtils]: 8: Hoare triple {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,746 INFO L290 TraceCheckUtils]: 9: Hoare triple {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:06,748 INFO L290 TraceCheckUtils]: 10: Hoare triple {228#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {229#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:06,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {229#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {229#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:06,751 INFO L272 TraceCheckUtils]: 12: Hoare triple {229#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {230#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:39:06,751 INFO L290 TraceCheckUtils]: 13: Hoare triple {230#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {231#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:39:06,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {231#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {223#false} is VALID [2022-04-14 19:39:06,752 INFO L290 TraceCheckUtils]: 15: Hoare triple {223#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {223#false} is VALID [2022-04-14 19:39:06,752 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:06,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:06,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264713630] [2022-04-14 19:39:06,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264713630] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:39:06,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934373520] [2022-04-14 19:39:06,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:06,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:06,753 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:39:06,755 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:39:06,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 19:39:06,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,802 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:39:06,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:06,831 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:39:07,644 INFO L272 TraceCheckUtils]: 0: Hoare triple {222#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:07,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {222#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {222#true} is VALID [2022-04-14 19:39:07,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {222#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:07,645 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222#true} {222#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:07,645 INFO L272 TraceCheckUtils]: 4: Hoare triple {222#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {222#true} is VALID [2022-04-14 19:39:07,645 INFO L290 TraceCheckUtils]: 5: Hoare triple {222#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {251#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:39:07,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {251#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:39:07,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:39:07,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:39:07,648 INFO L290 TraceCheckUtils]: 9: Hoare triple {255#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {265#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:39:07,649 INFO L290 TraceCheckUtils]: 10: Hoare triple {265#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {265#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:39:07,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {265#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {272#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:39:07,651 INFO L272 TraceCheckUtils]: 12: Hoare triple {272#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {276#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:39:07,651 INFO L290 TraceCheckUtils]: 13: Hoare triple {276#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {280#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:39:07,652 INFO L290 TraceCheckUtils]: 14: Hoare triple {280#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {223#false} is VALID [2022-04-14 19:39:07,652 INFO L290 TraceCheckUtils]: 15: Hoare triple {223#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {223#false} is VALID [2022-04-14 19:39:07,652 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:39:07,652 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:39:07,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934373520] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:39:07,653 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:39:07,653 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [8] total 14 [2022-04-14 19:39:07,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [306910423] [2022-04-14 19:39:07,653 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:39:07,654 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:07,654 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:39:07,654 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,670 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:07,670 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:39:07,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:39:07,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:39:07,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2022-04-14 19:39:07,671 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:07,773 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2022-04-14 19:39:07,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-14 19:39:07,773 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:07,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:39:07,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-14 19:39:07,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-14 19:39:07,776 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 31 transitions. [2022-04-14 19:39:07,806 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:07,807 INFO L225 Difference]: With dead ends: 26 [2022-04-14 19:39:07,807 INFO L226 Difference]: Without dead ends: 19 [2022-04-14 19:39:07,808 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:39:07,808 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 9 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:39:07,809 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 64 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 7 Unchecked, 0.0s Time] [2022-04-14 19:39:07,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-04-14 19:39:07,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-04-14 19:39:07,811 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:39:07,811 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,811 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,812 INFO L87 Difference]: Start difference. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:07,813 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-04-14 19:39:07,813 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-04-14 19:39:07,813 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:07,813 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:07,813 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-14 19:39:07,814 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-14 19:39:07,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:07,815 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-04-14 19:39:07,815 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-04-14 19:39:07,815 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:07,815 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:07,815 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:39:07,816 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:39:07,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 23 transitions. [2022-04-14 19:39:07,817 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 23 transitions. Word has length 16 [2022-04-14 19:39:07,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:39:07,817 INFO L478 AbstractCegarLoop]: Abstraction has 19 states and 23 transitions. [2022-04-14 19:39:07,817 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:07,818 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-04-14 19:39:07,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:39:07,818 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:07,818 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:07,850 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-14 19:39:08,039 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:08,040 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:08,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:08,040 INFO L85 PathProgramCache]: Analyzing trace with hash -894405051, now seen corresponding path program 1 times [2022-04-14 19:39:08,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:08,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558880576] [2022-04-14 19:39:08,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:08,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:08,052 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:08,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:08,084 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:08,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:08,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:08,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {381#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-14 19:39:08,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {371#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {371#true} {371#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {371#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {381#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:08,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {381#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-14 19:39:08,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {371#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {371#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,233 INFO L290 TraceCheckUtils]: 5: Hoare triple {371#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {376#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,234 INFO L290 TraceCheckUtils]: 6: Hoare triple {376#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {377#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,234 INFO L290 TraceCheckUtils]: 7: Hoare triple {377#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {377#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,236 INFO L290 TraceCheckUtils]: 8: Hoare triple {377#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,237 INFO L290 TraceCheckUtils]: 9: Hoare triple {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,238 INFO L290 TraceCheckUtils]: 10: Hoare triple {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,239 INFO L290 TraceCheckUtils]: 11: Hoare triple {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:08,240 INFO L272 TraceCheckUtils]: 12: Hoare triple {378#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {379#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:39:08,244 INFO L290 TraceCheckUtils]: 13: Hoare triple {379#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {380#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:39:08,245 INFO L290 TraceCheckUtils]: 14: Hoare triple {380#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-14 19:39:08,245 INFO L290 TraceCheckUtils]: 15: Hoare triple {372#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-14 19:39:08,246 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:08,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:08,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558880576] [2022-04-14 19:39:08,246 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [558880576] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:39:08,247 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1767310505] [2022-04-14 19:39:08,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:08,247 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:08,247 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:39:08,248 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:39:08,271 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 19:39:08,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:08,293 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:39:08,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:08,302 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:39:08,972 INFO L272 TraceCheckUtils]: 0: Hoare triple {371#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,972 INFO L290 TraceCheckUtils]: 1: Hoare triple {371#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-14 19:39:08,973 INFO L290 TraceCheckUtils]: 2: Hoare triple {371#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,973 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,973 INFO L272 TraceCheckUtils]: 4: Hoare triple {371#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-14 19:39:08,974 INFO L290 TraceCheckUtils]: 5: Hoare triple {371#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {400#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:39:08,975 INFO L290 TraceCheckUtils]: 6: Hoare triple {400#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {404#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:39:08,975 INFO L290 TraceCheckUtils]: 7: Hoare triple {404#(not (< 0 (mod main_~n~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {404#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:39:08,976 INFO L290 TraceCheckUtils]: 8: Hoare triple {404#(not (< 0 (mod main_~n~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {404#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:39:08,977 INFO L290 TraceCheckUtils]: 9: Hoare triple {404#(not (< 0 (mod main_~n~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {404#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:39:08,977 INFO L290 TraceCheckUtils]: 10: Hoare triple {404#(not (< 0 (mod main_~n~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {417#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:39:08,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {417#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {417#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:39:08,979 INFO L272 TraceCheckUtils]: 12: Hoare triple {417#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {424#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:39:08,982 INFO L290 TraceCheckUtils]: 13: Hoare triple {424#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {428#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:39:08,982 INFO L290 TraceCheckUtils]: 14: Hoare triple {428#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-14 19:39:08,982 INFO L290 TraceCheckUtils]: 15: Hoare triple {372#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-14 19:39:08,983 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:39:08,983 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:39:08,983 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1767310505] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:39:08,983 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:39:08,983 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8] total 13 [2022-04-14 19:39:08,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161507940] [2022-04-14 19:39:08,984 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:39:08,984 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:08,984 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:39:08,984 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,004 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:09,005 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:39:09,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:39:09,005 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:39:09,006 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2022-04-14 19:39:09,006 INFO L87 Difference]: Start difference. First operand 19 states and 23 transitions. Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:09,110 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-14 19:39:09,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 19:39:09,110 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:09,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:39:09,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 32 transitions. [2022-04-14 19:39:09,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 32 transitions. [2022-04-14 19:39:09,113 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 32 transitions. [2022-04-14 19:39:09,145 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:09,146 INFO L225 Difference]: With dead ends: 25 [2022-04-14 19:39:09,146 INFO L226 Difference]: Without dead ends: 22 [2022-04-14 19:39:09,146 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=165, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:39:09,147 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 6 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 5 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:39:09,147 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 72 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 5 Unchecked, 0.0s Time] [2022-04-14 19:39:09,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-14 19:39:09,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-14 19:39:09,149 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:39:09,149 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,149 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,150 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:09,151 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2022-04-14 19:39:09,151 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-14 19:39:09,151 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:09,151 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:09,152 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-14 19:39:09,152 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-14 19:39:09,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:09,153 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2022-04-14 19:39:09,153 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-14 19:39:09,153 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:09,153 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:09,153 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:39:09,153 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:39:09,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 28 transitions. [2022-04-14 19:39:09,154 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 28 transitions. Word has length 16 [2022-04-14 19:39:09,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:39:09,155 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 28 transitions. [2022-04-14 19:39:09,155 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:09,155 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-14 19:39:09,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:39:09,155 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:09,155 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:09,183 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 19:39:09,371 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-14 19:39:09,372 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:09,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:09,372 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-14 19:39:09,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:09,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057512618] [2022-04-14 19:39:09,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:09,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:09,384 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:09,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:09,401 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:09,539 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:09,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:09,546 INFO L290 TraceCheckUtils]: 0: Hoare triple {540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {529#true} is VALID [2022-04-14 19:39:09,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {529#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:09,546 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {529#true} {529#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:09,547 INFO L272 TraceCheckUtils]: 0: Hoare triple {529#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:09,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {529#true} is VALID [2022-04-14 19:39:09,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {529#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:09,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {529#true} {529#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:09,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {529#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:09,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {529#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {534#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:09,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {534#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {535#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:39:09,554 INFO L290 TraceCheckUtils]: 7: Hoare triple {535#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:09,556 INFO L290 TraceCheckUtils]: 8: Hoare triple {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:09,558 INFO L290 TraceCheckUtils]: 9: Hoare triple {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:09,568 INFO L290 TraceCheckUtils]: 10: Hoare triple {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:09,569 INFO L290 TraceCheckUtils]: 11: Hoare triple {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:09,574 INFO L272 TraceCheckUtils]: 12: Hoare triple {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {538#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:39:09,575 INFO L290 TraceCheckUtils]: 13: Hoare triple {538#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {539#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:39:09,576 INFO L290 TraceCheckUtils]: 14: Hoare triple {539#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:09,576 INFO L290 TraceCheckUtils]: 15: Hoare triple {530#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:09,577 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:09,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:09,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057512618] [2022-04-14 19:39:09,577 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057512618] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:39:09,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [887743413] [2022-04-14 19:39:09,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:09,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:09,577 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:39:09,579 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:39:09,580 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 19:39:09,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:09,634 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-14 19:39:09,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:09,664 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:39:11,566 INFO L272 TraceCheckUtils]: 0: Hoare triple {529#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:11,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {529#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {529#true} is VALID [2022-04-14 19:39:11,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {529#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:11,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {529#true} {529#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:11,567 INFO L272 TraceCheckUtils]: 4: Hoare triple {529#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:11,567 INFO L290 TraceCheckUtils]: 5: Hoare triple {529#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {534#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:11,601 INFO L290 TraceCheckUtils]: 6: Hoare triple {534#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {562#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:39:11,605 INFO L290 TraceCheckUtils]: 7: Hoare triple {562#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {566#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:39:11,607 INFO L290 TraceCheckUtils]: 8: Hoare triple {566#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {570#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} is VALID [2022-04-14 19:39:11,767 INFO L290 TraceCheckUtils]: 9: Hoare triple {570#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:39:11,768 INFO L290 TraceCheckUtils]: 10: Hoare triple {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:39:11,768 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:39:11,769 INFO L272 TraceCheckUtils]: 12: Hoare triple {574#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {584#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:39:11,769 INFO L290 TraceCheckUtils]: 13: Hoare triple {584#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {588#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:39:11,770 INFO L290 TraceCheckUtils]: 14: Hoare triple {588#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:11,771 INFO L290 TraceCheckUtils]: 15: Hoare triple {530#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:11,771 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:11,771 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:39:18,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {530#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:18,662 INFO L290 TraceCheckUtils]: 14: Hoare triple {588#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {530#false} is VALID [2022-04-14 19:39:18,662 INFO L290 TraceCheckUtils]: 13: Hoare triple {584#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {588#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:39:18,663 INFO L272 TraceCheckUtils]: 12: Hoare triple {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {584#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:39:18,664 INFO L290 TraceCheckUtils]: 11: Hoare triple {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:18,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {537#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:18,666 INFO L290 TraceCheckUtils]: 9: Hoare triple {613#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:18,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {613#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:18,667 INFO L290 TraceCheckUtils]: 7: Hoare triple {535#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {536#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:39:18,767 INFO L290 TraceCheckUtils]: 6: Hoare triple {623#(or (forall ((aux_mod_v_main_~x~0_21_31 Int)) (or (> 0 aux_mod_v_main_~x~0_21_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_21_31 Int) (aux_div_v_main_~y~0_23_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_23_31 4294967296) (* aux_div_v_main_~x~0_21_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~y~0_23_31 4294967296) (* aux_div_v_main_~x~0_21_31 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_1 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0))))) (or (forall ((aux_div_v_main_~x~0_21_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296))))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_23_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_23_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_23_31 4294967296) 1) (+ aux_mod_v_main_~x~0_21_31 main_~y~0)))))) (>= aux_mod_v_main_~x~0_21_31 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {535#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:39:18,770 INFO L290 TraceCheckUtils]: 5: Hoare triple {529#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {623#(or (forall ((aux_mod_v_main_~x~0_21_31 Int)) (or (> 0 aux_mod_v_main_~x~0_21_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_21_31 Int) (aux_div_v_main_~y~0_23_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_23_31 4294967296) (* aux_div_v_main_~x~0_21_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~y~0_23_31 4294967296) (* aux_div_v_main_~x~0_21_31 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_1 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0))))) (or (forall ((aux_div_v_main_~x~0_21_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296))))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_23_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_23_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_23_31 4294967296) 1) (+ aux_mod_v_main_~x~0_21_31 main_~y~0)))))) (>= aux_mod_v_main_~x~0_21_31 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:39:18,770 INFO L272 TraceCheckUtils]: 4: Hoare triple {529#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:18,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {529#true} {529#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:18,770 INFO L290 TraceCheckUtils]: 2: Hoare triple {529#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:18,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {529#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {529#true} is VALID [2022-04-14 19:39:18,771 INFO L272 TraceCheckUtils]: 0: Hoare triple {529#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {529#true} is VALID [2022-04-14 19:39:18,771 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:18,771 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [887743413] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:39:18,771 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:39:18,771 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-04-14 19:39:18,772 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770587955] [2022-04-14 19:39:18,772 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:39:18,772 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:18,773 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:39:18,773 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:20,845 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 31 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:20,845 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-14 19:39:20,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:39:20,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-14 19:39:20,846 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=210, Unknown=2, NotChecked=0, Total=272 [2022-04-14 19:39:20,846 INFO L87 Difference]: Start difference. First operand 22 states and 28 transitions. Second operand has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:21,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:21,291 INFO L93 Difference]: Finished difference Result 36 states and 49 transitions. [2022-04-14 19:39:21,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-14 19:39:21,291 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:39:21,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:39:21,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:21,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2022-04-14 19:39:21,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:21,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2022-04-14 19:39:21,295 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 45 transitions. [2022-04-14 19:39:23,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 44 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:39:23,432 INFO L225 Difference]: With dead ends: 36 [2022-04-14 19:39:23,432 INFO L226 Difference]: Without dead ends: 32 [2022-04-14 19:39:23,433 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 21 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=139, Invalid=459, Unknown=2, NotChecked=0, Total=600 [2022-04-14 19:39:23,434 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 35 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 80 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:39:23,434 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 69 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 68 Invalid, 0 Unknown, 80 Unchecked, 0.1s Time] [2022-04-14 19:39:23,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-14 19:39:23,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 27. [2022-04-14 19:39:23,437 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:39:23,437 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:23,437 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:23,437 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:23,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:23,439 INFO L93 Difference]: Finished difference Result 32 states and 44 transitions. [2022-04-14 19:39:23,439 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 44 transitions. [2022-04-14 19:39:23,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:23,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:23,439 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-14 19:39:23,439 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-14 19:39:23,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:39:23,441 INFO L93 Difference]: Finished difference Result 32 states and 44 transitions. [2022-04-14 19:39:23,441 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 44 transitions. [2022-04-14 19:39:23,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:39:23,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:39:23,441 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:39:23,441 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:39:23,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:23,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 37 transitions. [2022-04-14 19:39:23,442 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 37 transitions. Word has length 16 [2022-04-14 19:39:23,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:39:23,443 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 37 transitions. [2022-04-14 19:39:23,443 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 14 states have internal predecessors, (25), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:39:23,443 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 37 transitions. [2022-04-14 19:39:23,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:39:23,444 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:39:23,444 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:39:23,461 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 19:39:23,647 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:23,648 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:39:23,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:39:23,648 INFO L85 PathProgramCache]: Analyzing trace with hash -1930032162, now seen corresponding path program 1 times [2022-04-14 19:39:23,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:39:23,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222646476] [2022-04-14 19:39:23,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:23,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:39:23,667 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:23,668 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:39:23,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:23,714 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:39:23,739 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:39:23,945 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:39:23,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:23,952 INFO L290 TraceCheckUtils]: 0: Hoare triple {801#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {788#true} is VALID [2022-04-14 19:39:23,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {788#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:23,952 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {788#true} {788#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:23,953 INFO L272 TraceCheckUtils]: 0: Hoare triple {788#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {801#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:39:23,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {801#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {788#true} is VALID [2022-04-14 19:39:23,953 INFO L290 TraceCheckUtils]: 2: Hoare triple {788#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:23,953 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {788#true} {788#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:23,954 INFO L272 TraceCheckUtils]: 4: Hoare triple {788#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:23,954 INFO L290 TraceCheckUtils]: 5: Hoare triple {788#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {793#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,955 INFO L290 TraceCheckUtils]: 6: Hoare triple {793#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,956 INFO L290 TraceCheckUtils]: 7: Hoare triple {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {795#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,957 INFO L290 TraceCheckUtils]: 8: Hoare triple {795#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {796#(and (= main_~z~0 0) (<= (+ main_~z~0 main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {796#(and (= main_~z~0 0) (<= (+ main_~z~0 main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {797#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {797#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {797#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:23,960 INFO L290 TraceCheckUtils]: 11: Hoare triple {797#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {798#(and (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:23,961 INFO L290 TraceCheckUtils]: 12: Hoare triple {798#(and (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {798#(and (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:39:23,962 INFO L272 TraceCheckUtils]: 13: Hoare triple {798#(and (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {799#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:39:23,962 INFO L290 TraceCheckUtils]: 14: Hoare triple {799#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {800#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:39:23,963 INFO L290 TraceCheckUtils]: 15: Hoare triple {800#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:39:23,963 INFO L290 TraceCheckUtils]: 16: Hoare triple {789#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:39:23,963 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:23,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:39:23,964 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222646476] [2022-04-14 19:39:23,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222646476] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:39:23,964 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [632990008] [2022-04-14 19:39:23,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:39:23,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:39:23,964 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:39:23,965 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:39:23,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 19:39:24,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:24,013 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-14 19:39:24,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:39:24,029 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:39:24,475 INFO L272 TraceCheckUtils]: 0: Hoare triple {788#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:24,475 INFO L290 TraceCheckUtils]: 1: Hoare triple {788#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {788#true} is VALID [2022-04-14 19:39:24,475 INFO L290 TraceCheckUtils]: 2: Hoare triple {788#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:24,475 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {788#true} {788#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:24,475 INFO L272 TraceCheckUtils]: 4: Hoare triple {788#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:39:24,476 INFO L290 TraceCheckUtils]: 5: Hoare triple {788#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {793#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {793#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,477 INFO L290 TraceCheckUtils]: 7: Hoare triple {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {795#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {795#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,479 INFO L290 TraceCheckUtils]: 10: Hoare triple {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,481 INFO L290 TraceCheckUtils]: 11: Hoare triple {794#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {838#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {838#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {838#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:39:24,482 INFO L272 TraceCheckUtils]: 13: Hoare triple {838#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {845#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:39:24,483 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {849#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:39:24,483 INFO L290 TraceCheckUtils]: 15: Hoare triple {849#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:39:24,483 INFO L290 TraceCheckUtils]: 16: Hoare triple {789#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:39:24,484 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:39:24,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:40:06,544 INFO L290 TraceCheckUtils]: 16: Hoare triple {789#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:40:06,545 INFO L290 TraceCheckUtils]: 15: Hoare triple {849#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {789#false} is VALID [2022-04-14 19:40:06,545 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {849#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:06,546 INFO L272 TraceCheckUtils]: 13: Hoare triple {865#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {845#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:06,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {865#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {865#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-14 19:40:08,560 WARN L290 TraceCheckUtils]: 11: Hoare triple {872#(forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296)))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {865#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is UNKNOWN [2022-04-14 19:40:10,574 WARN L290 TraceCheckUtils]: 10: Hoare triple {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {872#(forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296)))} is UNKNOWN [2022-04-14 19:40:12,588 WARN L290 TraceCheckUtils]: 9: Hoare triple {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:40:14,604 WARN L290 TraceCheckUtils]: 8: Hoare triple {883#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~z~0 4294967296)) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int) (aux_div_v_main_~y~0_26_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31) main_~y~0) (<= aux_mod_v_main_~x~0_26_31 0) (<= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296))) (<= 1 v_it_2))) (<= 4294967296 aux_mod_v_main_~x~0_26_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_v_main_~x~0_26_31) 4294967296))))))) (or (forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296))) (<= 1 v_it_2))) (< 0 aux_mod_v_main_~x~0_26_31) (< aux_mod_v_main_~x~0_26_31 0))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_7 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_7 v_main_~z~0_6) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|) (<= .cse0 0)) (and (< v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_6 (+ (* (- 1) v_main_~x~0_8) v_main_~x~0_9 v_main_~z~0_7)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_7 (* v_it_2 4294967295)) 4294967296)))) (< 0 .cse0)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:40:16,632 WARN L290 TraceCheckUtils]: 7: Hoare triple {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {883#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~z~0 4294967296)) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int) (aux_div_v_main_~y~0_26_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31) main_~y~0) (<= aux_mod_v_main_~x~0_26_31 0) (<= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296))) (<= 1 v_it_2))) (<= 4294967296 aux_mod_v_main_~x~0_26_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_v_main_~x~0_26_31) 4294967296))))))) (or (forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296))) (<= 1 v_it_2))) (< 0 aux_mod_v_main_~x~0_26_31) (< aux_mod_v_main_~x~0_26_31 0))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:40:16,637 INFO L290 TraceCheckUtils]: 6: Hoare triple {890#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {876#(or (forall ((aux_mod_v_main_~y~0_26_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~y~0_26_31) (> 0 aux_mod_v_main_~y~0_26_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_26_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_26_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_26_31 4294967296) aux_mod_v_main_~y~0_26_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))))) (>= aux_mod_v_main_~y~0_26_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:40:16,639 INFO L290 TraceCheckUtils]: 5: Hoare triple {788#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {890#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:40:16,639 INFO L272 TraceCheckUtils]: 4: Hoare triple {788#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:40:16,639 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {788#true} {788#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:40:16,639 INFO L290 TraceCheckUtils]: 2: Hoare triple {788#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:40:16,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {788#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {788#true} is VALID [2022-04-14 19:40:16,639 INFO L272 TraceCheckUtils]: 0: Hoare triple {788#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#true} is VALID [2022-04-14 19:40:16,640 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:16,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [632990008] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:40:16,640 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:40:16,640 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 9] total 19 [2022-04-14 19:40:16,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1020300278] [2022-04-14 19:40:16,640 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:40:16,641 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:40:16,641 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:16,641 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 31 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:26,814 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:40:26,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:26,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:40:26,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=249, Unknown=13, NotChecked=0, Total=342 [2022-04-14 19:40:26,815 INFO L87 Difference]: Start difference. First operand 27 states and 37 transitions. Second operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:41,598 INFO L93 Difference]: Finished difference Result 36 states and 50 transitions. [2022-04-14 19:40:41,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:40:41,598 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:40:41,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:41,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-14 19:40:41,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-14 19:40:41,601 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 39 transitions. [2022-04-14 19:40:41,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:41,650 INFO L225 Difference]: With dead ends: 36 [2022-04-14 19:40:41,650 INFO L226 Difference]: Without dead ends: 33 [2022-04-14 19:40:41,651 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 24 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 40.2s TimeCoverageRelationStatistics Valid=137, Invalid=447, Unknown=16, NotChecked=0, Total=600 [2022-04-14 19:40:41,651 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 29 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:41,652 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 69 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 81 Invalid, 0 Unknown, 29 Unchecked, 0.1s Time] [2022-04-14 19:40:41,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-14 19:40:41,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 29. [2022-04-14 19:40:41,654 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:41,654 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,655 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,655 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:41,656 INFO L93 Difference]: Finished difference Result 33 states and 47 transitions. [2022-04-14 19:40:41,656 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 47 transitions. [2022-04-14 19:40:41,657 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:41,657 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:41,657 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-14 19:40:41,657 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-14 19:40:41,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:41,658 INFO L93 Difference]: Finished difference Result 33 states and 47 transitions. [2022-04-14 19:40:41,658 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 47 transitions. [2022-04-14 19:40:41,659 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:41,659 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:41,659 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:41,659 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:41,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 40 transitions. [2022-04-14 19:40:41,660 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 40 transitions. Word has length 17 [2022-04-14 19:40:41,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:41,660 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 40 transitions. [2022-04-14 19:40:41,661 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:41,661 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-14 19:40:41,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:40:41,661 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:41,661 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:41,685 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-14 19:40:41,875 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:41,875 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:41,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:41,876 INFO L85 PathProgramCache]: Analyzing trace with hash 2088406878, now seen corresponding path program 1 times [2022-04-14 19:40:41,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:41,876 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781449871] [2022-04-14 19:40:41,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:41,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:41,892 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:41,895 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-14 19:40:41,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:41,923 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:41,939 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-14 19:40:42,145 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:42,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:42,150 INFO L290 TraceCheckUtils]: 0: Hoare triple {1067#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1055#true} is VALID [2022-04-14 19:40:42,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {1055#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:42,150 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1055#true} {1055#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:42,151 INFO L272 TraceCheckUtils]: 0: Hoare triple {1055#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1067#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:42,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {1067#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1055#true} is VALID [2022-04-14 19:40:42,151 INFO L290 TraceCheckUtils]: 2: Hoare triple {1055#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:42,151 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1055#true} {1055#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:42,151 INFO L272 TraceCheckUtils]: 4: Hoare triple {1055#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:42,152 INFO L290 TraceCheckUtils]: 5: Hoare triple {1055#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1060#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:42,155 INFO L290 TraceCheckUtils]: 6: Hoare triple {1060#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1061#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:40:42,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {1061#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:42,156 INFO L290 TraceCheckUtils]: 8: Hoare triple {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:42,157 INFO L290 TraceCheckUtils]: 9: Hoare triple {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:42,157 INFO L290 TraceCheckUtils]: 10: Hoare triple {1062#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1063#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:40:42,159 INFO L290 TraceCheckUtils]: 11: Hoare triple {1063#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:40:42,159 INFO L290 TraceCheckUtils]: 12: Hoare triple {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:40:42,160 INFO L272 TraceCheckUtils]: 13: Hoare triple {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1065#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:42,161 INFO L290 TraceCheckUtils]: 14: Hoare triple {1065#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1066#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:42,161 INFO L290 TraceCheckUtils]: 15: Hoare triple {1066#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:42,161 INFO L290 TraceCheckUtils]: 16: Hoare triple {1056#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:42,162 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:42,162 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:42,162 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781449871] [2022-04-14 19:40:42,162 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [781449871] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:42,162 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [601600485] [2022-04-14 19:40:42,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:42,162 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:42,163 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:42,163 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:42,164 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 19:40:42,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:42,327 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-14 19:40:42,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:42,342 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:43,532 INFO L272 TraceCheckUtils]: 0: Hoare triple {1055#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:43,533 INFO L290 TraceCheckUtils]: 1: Hoare triple {1055#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1055#true} is VALID [2022-04-14 19:40:43,533 INFO L290 TraceCheckUtils]: 2: Hoare triple {1055#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:43,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1055#true} {1055#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:43,533 INFO L272 TraceCheckUtils]: 4: Hoare triple {1055#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:40:43,534 INFO L290 TraceCheckUtils]: 5: Hoare triple {1055#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1060#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:43,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {1060#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1089#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:40:43,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {1089#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:40:43,548 INFO L290 TraceCheckUtils]: 8: Hoare triple {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:40:43,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:40:43,558 INFO L290 TraceCheckUtils]: 10: Hoare triple {1093#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1103#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:43,559 INFO L290 TraceCheckUtils]: 11: Hoare triple {1103#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1107#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:40:43,559 INFO L290 TraceCheckUtils]: 12: Hoare triple {1107#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1107#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:40:43,560 INFO L272 TraceCheckUtils]: 13: Hoare triple {1107#(and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1114#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:43,560 INFO L290 TraceCheckUtils]: 14: Hoare triple {1114#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1118#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:43,561 INFO L290 TraceCheckUtils]: 15: Hoare triple {1118#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:43,561 INFO L290 TraceCheckUtils]: 16: Hoare triple {1056#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:43,561 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:43,561 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:40:55,860 INFO L290 TraceCheckUtils]: 16: Hoare triple {1056#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:55,862 INFO L290 TraceCheckUtils]: 15: Hoare triple {1118#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1056#false} is VALID [2022-04-14 19:40:55,863 INFO L290 TraceCheckUtils]: 14: Hoare triple {1114#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1118#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:55,864 INFO L272 TraceCheckUtils]: 13: Hoare triple {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1114#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:55,864 INFO L290 TraceCheckUtils]: 12: Hoare triple {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:40:57,873 WARN L290 TraceCheckUtils]: 11: Hoare triple {1140#(and (or (< 0 (mod main_~x~0 4294967296)) (and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))) (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1064#(and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is UNKNOWN [2022-04-14 19:40:59,904 WARN L290 TraceCheckUtils]: 10: Hoare triple {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1140#(and (or (< 0 (mod main_~x~0 4294967296)) (and (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))) (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))))} is UNKNOWN [2022-04-14 19:41:01,921 WARN L290 TraceCheckUtils]: 9: Hoare triple {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:41:03,932 WARN L290 TraceCheckUtils]: 8: Hoare triple {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:41:03,935 INFO L290 TraceCheckUtils]: 7: Hoare triple {1061#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1144#(or (and (or (and (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< main_~n~0 (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (> 0 aux_mod_v_main_~y~0_30_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (>= aux_mod_v_main_~y~0_30_31 4294967296) (<= (+ aux_mod_v_main_~y~0_30_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod main_~x~0 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:41:05,951 WARN L290 TraceCheckUtils]: 6: Hoare triple {1157#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_31_31 Int)) (or (> 0 aux_mod_v_main_~x~0_31_31) (and (or (forall ((aux_div_v_main_~y~0_31_31 Int) (aux_div_v_main_~x~0_31_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~x~0_31_31 4294967296)) main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~y~0_31_31 4294967296) (* aux_div_v_main_~x~0_31_31 4294967296))) (<= (+ (* aux_div_v_main_~y~0_31_31 4294967296) (* aux_div_v_main_~x~0_31_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (<= (+ aux_mod_v_main_~x~0_31_31 v_it_1 (* aux_div_v_main_~x~0_31_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_31_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~x~0_31_31 4294967296))))) (forall ((aux_div_v_main_~y~0_31_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_31_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_31_31 4294967296) 1) (+ aux_mod_v_main_~x~0_31_31 main_~y~0)))))) (>= aux_mod_v_main_~x~0_31_31 4294967296))))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1061#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-14 19:41:05,958 INFO L290 TraceCheckUtils]: 5: Hoare triple {1055#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1157#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_31_31 Int)) (or (> 0 aux_mod_v_main_~x~0_31_31) (and (or (forall ((aux_div_v_main_~y~0_31_31 Int) (aux_div_v_main_~x~0_31_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~x~0_31_31 4294967296)) main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~y~0_31_31 4294967296) (* aux_div_v_main_~x~0_31_31 4294967296))) (<= (+ (* aux_div_v_main_~y~0_31_31 4294967296) (* aux_div_v_main_~x~0_31_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (<= (+ aux_mod_v_main_~x~0_31_31 v_it_1 (* aux_div_v_main_~x~0_31_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_31_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_31_31 (* aux_div_v_main_~x~0_31_31 4294967296))))) (forall ((aux_div_v_main_~y~0_31_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_31_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_31_31 4294967296) 1) (+ aux_mod_v_main_~x~0_31_31 main_~y~0)))))) (>= aux_mod_v_main_~x~0_31_31 4294967296))))} is VALID [2022-04-14 19:41:05,958 INFO L272 TraceCheckUtils]: 4: Hoare triple {1055#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:41:05,958 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1055#true} {1055#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:41:05,958 INFO L290 TraceCheckUtils]: 2: Hoare triple {1055#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:41:05,958 INFO L290 TraceCheckUtils]: 1: Hoare triple {1055#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1055#true} is VALID [2022-04-14 19:41:05,958 INFO L272 TraceCheckUtils]: 0: Hoare triple {1055#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1055#true} is VALID [2022-04-14 19:41:05,959 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:05,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [601600485] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:41:05,959 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:41:05,959 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 19 [2022-04-14 19:41:05,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006120843] [2022-04-14 19:41:05,959 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:41:05,960 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:05,960 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:05,960 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:16,125 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 32 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:16,125 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:41:16,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:16,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:41:16,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=262, Unknown=2, NotChecked=0, Total=342 [2022-04-14 19:41:16,126 INFO L87 Difference]: Start difference. First operand 29 states and 40 transitions. Second operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:17,050 INFO L93 Difference]: Finished difference Result 41 states and 56 transitions. [2022-04-14 19:41:17,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-14 19:41:17,050 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:17,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:17,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 49 transitions. [2022-04-14 19:41:17,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 49 transitions. [2022-04-14 19:41:17,055 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 49 transitions. [2022-04-14 19:41:17,211 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:17,212 INFO L225 Difference]: With dead ends: 41 [2022-04-14 19:41:17,212 INFO L226 Difference]: Without dead ends: 37 [2022-04-14 19:41:17,212 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 25 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 7.7s TimeCoverageRelationStatistics Valid=163, Invalid=591, Unknown=2, NotChecked=0, Total=756 [2022-04-14 19:41:17,213 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 33 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 158 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 71 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:17,213 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 73 Invalid, 158 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 78 Invalid, 0 Unknown, 71 Unchecked, 0.1s Time] [2022-04-14 19:41:17,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-04-14 19:41:17,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 29. [2022-04-14 19:41:17,216 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:17,216 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,216 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,216 INFO L87 Difference]: Start difference. First operand 37 states. Second operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:17,218 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-14 19:41:17,218 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 51 transitions. [2022-04-14 19:41:17,218 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:17,218 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:17,218 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37 states. [2022-04-14 19:41:17,218 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37 states. [2022-04-14 19:41:17,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:17,220 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-14 19:41:17,220 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 51 transitions. [2022-04-14 19:41:17,220 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:17,220 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:17,220 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:17,220 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:17,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5) internal successors, (36), 24 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 40 transitions. [2022-04-14 19:41:17,221 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 40 transitions. Word has length 17 [2022-04-14 19:41:17,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:17,222 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 40 transitions. [2022-04-14 19:41:17,222 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:17,222 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-14 19:41:17,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:17,222 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:17,222 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:17,245 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:17,443 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:17,444 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:17,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:17,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1433573341, now seen corresponding path program 1 times [2022-04-14 19:41:17,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:17,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342630743] [2022-04-14 19:41:17,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:17,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:17,454 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:17,456 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:17,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:17,472 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:17,479 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:17,707 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:17,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:17,715 INFO L290 TraceCheckUtils]: 0: Hoare triple {1358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1344#true} is VALID [2022-04-14 19:41:17,715 INFO L290 TraceCheckUtils]: 1: Hoare triple {1344#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:17,715 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1344#true} {1344#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:17,715 INFO L272 TraceCheckUtils]: 0: Hoare triple {1344#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:17,716 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1344#true} is VALID [2022-04-14 19:41:17,716 INFO L290 TraceCheckUtils]: 2: Hoare triple {1344#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:17,716 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1344#true} {1344#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:17,716 INFO L272 TraceCheckUtils]: 4: Hoare triple {1344#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:17,716 INFO L290 TraceCheckUtils]: 5: Hoare triple {1344#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1349#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:17,724 INFO L290 TraceCheckUtils]: 6: Hoare triple {1349#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1350#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:17,725 INFO L290 TraceCheckUtils]: 7: Hoare triple {1350#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1351#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:17,726 INFO L290 TraceCheckUtils]: 8: Hoare triple {1351#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1352#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-14 19:41:17,727 INFO L290 TraceCheckUtils]: 9: Hoare triple {1352#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:41:17,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1354#(< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:41:17,729 INFO L290 TraceCheckUtils]: 11: Hoare triple {1354#(< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:41:17,729 INFO L290 TraceCheckUtils]: 12: Hoare triple {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:41:17,731 INFO L272 TraceCheckUtils]: 13: Hoare triple {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1356#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:17,731 INFO L290 TraceCheckUtils]: 14: Hoare triple {1356#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1357#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:17,731 INFO L290 TraceCheckUtils]: 15: Hoare triple {1357#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:17,732 INFO L290 TraceCheckUtils]: 16: Hoare triple {1345#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:17,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:17,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:17,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342630743] [2022-04-14 19:41:17,732 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1342630743] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:17,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1069568431] [2022-04-14 19:41:17,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:17,733 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:17,733 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:17,738 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:17,739 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 19:41:17,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:17,811 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:41:19,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2022-04-14 19:41:19,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:21,212 INFO L272 TraceCheckUtils]: 0: Hoare triple {1344#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:21,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {1344#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1344#true} is VALID [2022-04-14 19:41:21,212 INFO L290 TraceCheckUtils]: 2: Hoare triple {1344#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:21,212 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1344#true} {1344#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:21,212 INFO L272 TraceCheckUtils]: 4: Hoare triple {1344#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1344#true} is VALID [2022-04-14 19:41:21,213 INFO L290 TraceCheckUtils]: 5: Hoare triple {1344#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1349#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:21,392 INFO L290 TraceCheckUtils]: 6: Hoare triple {1349#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1380#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:41:21,393 INFO L290 TraceCheckUtils]: 7: Hoare triple {1380#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1380#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:41:21,394 INFO L290 TraceCheckUtils]: 8: Hoare triple {1380#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1387#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:21,400 INFO L290 TraceCheckUtils]: 9: Hoare triple {1387#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:41:21,401 INFO L290 TraceCheckUtils]: 10: Hoare triple {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:41:21,403 INFO L290 TraceCheckUtils]: 11: Hoare triple {1353#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1397#(and (not (< 0 (mod main_~y~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:21,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {1397#(and (not (< 0 (mod main_~y~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1397#(and (not (< 0 (mod main_~y~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:21,405 INFO L272 TraceCheckUtils]: 13: Hoare triple {1397#(and (not (< 0 (mod main_~y~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1404#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:21,406 INFO L290 TraceCheckUtils]: 14: Hoare triple {1404#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1408#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:21,406 INFO L290 TraceCheckUtils]: 15: Hoare triple {1408#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:21,406 INFO L290 TraceCheckUtils]: 16: Hoare triple {1345#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:21,407 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:41:21,407 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:41:24,721 INFO L290 TraceCheckUtils]: 16: Hoare triple {1345#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:24,721 INFO L290 TraceCheckUtils]: 15: Hoare triple {1408#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:24,722 INFO L290 TraceCheckUtils]: 14: Hoare triple {1404#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1408#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:24,723 INFO L272 TraceCheckUtils]: 13: Hoare triple {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1404#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:24,727 INFO L290 TraceCheckUtils]: 12: Hoare triple {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:41:24,728 INFO L290 TraceCheckUtils]: 11: Hoare triple {1430#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1355#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-14 19:41:24,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {1430#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1430#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:24,729 INFO L290 TraceCheckUtils]: 9: Hoare triple {1437#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1430#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:24,729 INFO L290 TraceCheckUtils]: 8: Hoare triple {1441#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1437#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:41:24,730 INFO L290 TraceCheckUtils]: 7: Hoare triple {1441#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1441#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:41:24,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {1448#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (forall ((aux_mod_v_main_~y~0_35_31 Int)) (or (< aux_mod_v_main_~y~0_35_31 0) (and (or (forall ((aux_div_v_main_~y~0_35_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_35_31 Int)) (not (= (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296)) main_~y~0))))) (< 0 aux_mod_v_main_~y~0_35_31))))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1441#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:41:24,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {1345#false} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1448#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (forall ((aux_mod_v_main_~y~0_35_31 Int)) (or (< aux_mod_v_main_~y~0_35_31 0) (and (or (forall ((aux_div_v_main_~y~0_35_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_35_31 Int)) (not (= (+ aux_mod_v_main_~y~0_35_31 (* aux_div_v_main_~y~0_35_31 4294967296)) main_~y~0))))) (< 0 aux_mod_v_main_~y~0_35_31))))} is VALID [2022-04-14 19:41:24,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {1345#false} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1345#false} is VALID [2022-04-14 19:41:24,757 ERROR L284 TraceCheckUtils]: 3: Hoare quadruple {1344#true} {1344#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1345#false} is INVALID [2022-04-14 19:41:24,757 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-04-14 19:41:24,776 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:24,958 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:24,959 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: invalid Hoare triple in BP at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.checkInterpolantsInductivityBackward(TraceCheckUtils.java:254) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:345) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:595) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:349) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:331) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:411) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:301) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:261) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:153) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-04-14 19:41:24,962 INFO L158 Benchmark]: Toolchain (without parser) took 141645.77ms. Allocated memory was 191.9MB in the beginning and 289.4MB in the end (delta: 97.5MB). Free memory was 135.4MB in the beginning and 110.8MB in the end (delta: 24.5MB). Peak memory consumption was 123.4MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,962 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 191.9MB. Free memory is still 151.0MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-14 19:41:24,962 INFO L158 Benchmark]: CACSL2BoogieTranslator took 212.86ms. Allocated memory was 191.9MB in the beginning and 289.4MB in the end (delta: 97.5MB). Free memory was 135.2MB in the beginning and 258.8MB in the end (delta: -123.5MB). Peak memory consumption was 8.8MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,963 INFO L158 Benchmark]: Boogie Preprocessor took 25.28ms. Allocated memory is still 289.4MB. Free memory was 258.8MB in the beginning and 257.1MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,963 INFO L158 Benchmark]: RCFGBuilder took 350.61ms. Allocated memory is still 289.4MB. Free memory was 257.1MB in the beginning and 244.1MB in the end (delta: 13.0MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,963 INFO L158 Benchmark]: IcfgTransformer took 1442.50ms. Allocated memory is still 289.4MB. Free memory was 244.1MB in the beginning and 167.7MB in the end (delta: 76.4MB). Peak memory consumption was 76.5MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,963 INFO L158 Benchmark]: TraceAbstraction took 139609.01ms. Allocated memory is still 289.4MB. Free memory was 167.0MB in the beginning and 110.8MB in the end (delta: 56.2MB). Peak memory consumption was 57.4MB. Max. memory is 8.0GB. [2022-04-14 19:41:24,964 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from IcfgTransformer: - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 191.9MB. Free memory is still 151.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 212.86ms. Allocated memory was 191.9MB in the beginning and 289.4MB in the end (delta: 97.5MB). Free memory was 135.2MB in the beginning and 258.8MB in the end (delta: -123.5MB). Peak memory consumption was 8.8MB. Max. memory is 8.0GB. * Boogie Preprocessor took 25.28ms. Allocated memory is still 289.4MB. Free memory was 258.8MB in the beginning and 257.1MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 350.61ms. Allocated memory is still 289.4MB. Free memory was 257.1MB in the beginning and 244.1MB in the end (delta: 13.0MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * IcfgTransformer took 1442.50ms. Allocated memory is still 289.4MB. Free memory was 244.1MB in the beginning and 167.7MB in the end (delta: 76.4MB). Peak memory consumption was 76.5MB. Max. memory is 8.0GB. * TraceAbstraction took 139609.01ms. Allocated memory is still 289.4MB. Free memory was 167.0MB in the beginning and 110.8MB in the end (delta: 56.2MB). Peak memory consumption was 57.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: invalid Hoare triple in BP de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: invalid Hoare triple in BP: de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.checkInterpolantsInductivityBackward(TraceCheckUtils.java:254) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-04-14 19:41:25,071 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...