/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 19:40:03,537 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 19:40:03,539 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 19:40:03,572 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-14 19:40:03,612 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 19:40:03,619 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 19:40:03,619 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 19:40:03,620 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 19:40:03,620 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 19:40:03,620 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 19:40:03,621 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 19:40:03,622 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:40:03,622 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 19:40:03,622 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 19:40:03,623 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 19:40:03,623 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 19:40:03,789 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 19:40:03,809 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 19:40:03,810 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 19:40:03,811 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 19:40:03,812 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 19:40:03,812 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-14 19:40:03,860 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/740bace87/a38fb504dbc04ac6833b925fa5d77471/FLAGcc881ae5b [2022-04-14 19:40:04,195 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 19:40:04,196 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-14 19:40:04,199 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/740bace87/a38fb504dbc04ac6833b925fa5d77471/FLAGcc881ae5b [2022-04-14 19:40:04,208 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/740bace87/a38fb504dbc04ac6833b925fa5d77471 [2022-04-14 19:40:04,210 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 19:40:04,211 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 19:40:04,213 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 19:40:04,213 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 19:40:04,215 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 19:40:04,216 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,216 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@18a8af69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04, skipping insertion in model container [2022-04-14 19:40:04,217 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,222 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 19:40:04,231 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 19:40:04,353 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-14 19:40:04,367 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:40:04,373 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 19:40:04,381 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-14 19:40:04,385 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:40:04,393 INFO L208 MainTranslator]: Completed translation [2022-04-14 19:40:04,394 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04 WrapperNode [2022-04-14 19:40:04,394 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 19:40:04,394 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 19:40:04,394 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 19:40:04,395 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 19:40:04,402 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,402 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,407 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,407 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,411 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,414 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,415 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,416 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 19:40:04,416 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 19:40:04,416 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 19:40:04,416 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 19:40:04,417 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,422 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:40:04,428 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:04,437 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 19:40:04,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 19:40:04,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 19:40:04,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 19:40:04,465 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 19:40:04,466 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 19:40:04,466 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 19:40:04,466 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 19:40:04,467 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 19:40:04,467 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 19:40:04,505 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 19:40:04,507 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 19:40:04,675 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 19:40:04,680 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 19:40:04,680 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-14 19:40:04,681 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:40:04 BoogieIcfgContainer [2022-04-14 19:40:04,681 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 19:40:04,682 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 19:40:04,682 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 19:40:04,683 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 19:40:04,685 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:40:04" (1/1) ... [2022-04-14 19:40:04,689 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 19:40:05,205 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:40:05,206 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-14 19:40:05,463 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:40:05,463 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_9, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-14 19:40:07,803 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:40:07,804 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-14 19:40:08,083 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:40:08,083 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_4, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] [2022-04-14 19:40:08,086 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:40:08 BasicIcfg [2022-04-14 19:40:08,086 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 19:40:08,087 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 19:40:08,087 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 19:40:08,089 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 19:40:08,089 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 07:40:04" (1/4) ... [2022-04-14 19:40:08,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@283b88a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:40:08, skipping insertion in model container [2022-04-14 19:40:08,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:40:04" (2/4) ... [2022-04-14 19:40:08,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@283b88a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:40:08, skipping insertion in model container [2022-04-14 19:40:08,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:40:04" (3/4) ... [2022-04-14 19:40:08,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@283b88a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 07:40:08, skipping insertion in model container [2022-04-14 19:40:08,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:40:08" (4/4) ... [2022-04-14 19:40:08,091 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de42.cJordan [2022-04-14 19:40:08,094 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 19:40:08,094 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 19:40:08,120 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 19:40:08,125 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 19:40:08,125 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 19:40:08,135 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 19:40:08,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 19:40:08,139 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:08,140 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:08,140 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:08,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:08,143 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-14 19:40:08,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:08,149 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664194024] [2022-04-14 19:40:08,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:08,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:08,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:08,227 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:08,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:08,238 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-14 19:40:08,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:40:08,239 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:40:08,240 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:08,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-14 19:40:08,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:40:08,240 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:40:08,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-14 19:40:08,241 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-14 19:40:08,241 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,241 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-14 19:40:08,241 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,242 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-14 19:40:08,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:08,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:08,243 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664194024] [2022-04-14 19:40:08,244 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664194024] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:40:08,244 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:40:08,244 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 19:40:08,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772063267] [2022-04-14 19:40:08,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:40:08,248 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:40:08,249 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:08,251 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,264 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:08,264 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 19:40:08,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:08,276 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 19:40:08,277 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:40:08,278 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:08,334 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-14 19:40:08,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 19:40:08,334 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:40:08,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:08,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-14 19:40:08,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-14 19:40:08,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 31 transitions. [2022-04-14 19:40:08,367 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:08,372 INFO L225 Difference]: With dead ends: 23 [2022-04-14 19:40:08,372 INFO L226 Difference]: Without dead ends: 16 [2022-04-14 19:40:08,373 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:40:08,376 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:08,376 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 19:40:08,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-14 19:40:08,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-14 19:40:08,393 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:08,393 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,394 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,394 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:08,396 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-14 19:40:08,396 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:40:08,396 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:08,396 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:08,396 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-14 19:40:08,396 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-14 19:40:08,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:08,398 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-14 19:40:08,398 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:40:08,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:08,398 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:08,398 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:08,398 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:08,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-14 19:40:08,400 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-14 19:40:08,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:08,401 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-14 19:40:08,401 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,401 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-14 19:40:08,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 19:40:08,401 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:08,401 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:08,402 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 19:40:08,402 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:08,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:08,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-14 19:40:08,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:08,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249714250] [2022-04-14 19:40:08,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:08,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:08,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:08,623 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:08,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:08,631 INFO L290 TraceCheckUtils]: 0: Hoare triple {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-14 19:40:08,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:40:08,632 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:40:08,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {105#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:08,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-14 19:40:08,633 INFO L290 TraceCheckUtils]: 2: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:40:08,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:40:08,633 INFO L272 TraceCheckUtils]: 4: Hoare triple {105#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-14 19:40:08,634 INFO L290 TraceCheckUtils]: 5: Hoare triple {105#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {110#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:40:08,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {110#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:08,636 INFO L290 TraceCheckUtils]: 7: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {112#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-14 19:40:08,637 INFO L290 TraceCheckUtils]: 8: Hoare triple {112#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:08,638 INFO L290 TraceCheckUtils]: 9: Hoare triple {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:08,639 INFO L290 TraceCheckUtils]: 10: Hoare triple {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {114#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:08,641 INFO L272 TraceCheckUtils]: 11: Hoare triple {114#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {115#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:08,641 INFO L290 TraceCheckUtils]: 12: Hoare triple {115#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {116#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:08,642 INFO L290 TraceCheckUtils]: 13: Hoare triple {116#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-14 19:40:08,642 INFO L290 TraceCheckUtils]: 14: Hoare triple {106#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-14 19:40:08,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:08,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:08,643 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249714250] [2022-04-14 19:40:08,643 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [249714250] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:40:08,643 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:40:08,643 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-14 19:40:08,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134492601] [2022-04-14 19:40:08,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:40:08,645 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:40:08,645 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:08,646 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:08,662 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-14 19:40:08,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:08,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-14 19:40:08,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-14 19:40:08,663 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:08,990 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-14 19:40:08,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 19:40:08,990 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 19:40:08,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:08,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 37 transitions. [2022-04-14 19:40:08,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:08,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 37 transitions. [2022-04-14 19:40:08,994 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 37 transitions. [2022-04-14 19:40:09,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:09,033 INFO L225 Difference]: With dead ends: 27 [2022-04-14 19:40:09,033 INFO L226 Difference]: Without dead ends: 24 [2022-04-14 19:40:09,033 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:40:09,034 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 18 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:09,035 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 57 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 80 Invalid, 0 Unknown, 4 Unchecked, 0.1s Time] [2022-04-14 19:40:09,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-14 19:40:09,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 21. [2022-04-14 19:40:09,036 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:09,037 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:09,037 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:09,037 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:09,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:09,038 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-14 19:40:09,038 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-14 19:40:09,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:09,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:09,039 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-14 19:40:09,039 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-14 19:40:09,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:09,040 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-14 19:40:09,040 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-14 19:40:09,041 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:09,041 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:09,041 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:09,041 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:09,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:09,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2022-04-14 19:40:09,042 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 27 transitions. Word has length 15 [2022-04-14 19:40:09,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:09,042 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 27 transitions. [2022-04-14 19:40:09,042 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:09,042 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 27 transitions. [2022-04-14 19:40:09,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:40:09,043 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:09,043 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:09,043 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 19:40:09,043 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:09,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:09,043 INFO L85 PathProgramCache]: Analyzing trace with hash 139812261, now seen corresponding path program 1 times [2022-04-14 19:40:09,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:09,043 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114505069] [2022-04-14 19:40:09,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:09,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:09,064 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:40:09,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:09,103 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:40:09,245 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:09,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:09,252 INFO L290 TraceCheckUtils]: 0: Hoare triple {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-14 19:40:09,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,252 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,253 INFO L272 TraceCheckUtils]: 0: Hoare triple {226#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:09,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-14 19:40:09,254 INFO L290 TraceCheckUtils]: 2: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,254 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,254 INFO L272 TraceCheckUtils]: 4: Hoare triple {226#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {226#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {231#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:09,256 INFO L290 TraceCheckUtils]: 6: Hoare triple {231#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {232#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:09,257 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,258 INFO L290 TraceCheckUtils]: 8: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,258 INFO L290 TraceCheckUtils]: 9: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,263 INFO L290 TraceCheckUtils]: 10: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-14 19:40:09,266 INFO L290 TraceCheckUtils]: 11: Hoare triple {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-14 19:40:09,268 INFO L272 TraceCheckUtils]: 12: Hoare triple {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {235#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:09,268 INFO L290 TraceCheckUtils]: 13: Hoare triple {235#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {236#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:09,269 INFO L290 TraceCheckUtils]: 14: Hoare triple {236#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-14 19:40:09,269 INFO L290 TraceCheckUtils]: 15: Hoare triple {227#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-14 19:40:09,269 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:09,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:09,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114505069] [2022-04-14 19:40:09,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114505069] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:09,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1481333965] [2022-04-14 19:40:09,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:09,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:09,270 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:09,271 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:09,272 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 19:40:09,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:09,304 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:40:09,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:09,325 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:09,965 INFO L272 TraceCheckUtils]: 0: Hoare triple {226#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {226#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-14 19:40:09,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,965 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,966 INFO L272 TraceCheckUtils]: 4: Hoare triple {226#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-14 19:40:09,966 INFO L290 TraceCheckUtils]: 5: Hoare triple {226#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {256#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:40:09,967 INFO L290 TraceCheckUtils]: 6: Hoare triple {256#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,967 INFO L290 TraceCheckUtils]: 7: Hoare triple {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,968 INFO L290 TraceCheckUtils]: 8: Hoare triple {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,968 INFO L290 TraceCheckUtils]: 9: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,970 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:09,970 INFO L290 TraceCheckUtils]: 11: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {277#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:40:09,972 INFO L272 TraceCheckUtils]: 12: Hoare triple {277#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {281#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:09,973 INFO L290 TraceCheckUtils]: 13: Hoare triple {281#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {285#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:09,973 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-14 19:40:09,974 INFO L290 TraceCheckUtils]: 15: Hoare triple {227#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-14 19:40:09,974 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:40:09,974 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:40:09,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1481333965] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:40:09,977 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:40:09,977 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-14 19:40:09,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852461988] [2022-04-14 19:40:09,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:40:09,978 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:09,978 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:09,978 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,005 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:10,005 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:40:10,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:10,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:40:10,006 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=168, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:40:10,006 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:10,166 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-14 19:40:10,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-14 19:40:10,166 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:10,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:10,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-14 19:40:10,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-14 19:40:10,168 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 31 transitions. [2022-04-14 19:40:10,198 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:10,199 INFO L225 Difference]: With dead ends: 25 [2022-04-14 19:40:10,199 INFO L226 Difference]: Without dead ends: 20 [2022-04-14 19:40:10,200 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2022-04-14 19:40:10,200 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 8 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:10,200 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [8 Valid, 62 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 4 Unchecked, 0.1s Time] [2022-04-14 19:40:10,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-14 19:40:10,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-14 19:40:10,202 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:10,202 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,202 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,202 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:10,203 INFO L93 Difference]: Finished difference Result 20 states and 25 transitions. [2022-04-14 19:40:10,203 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-14 19:40:10,204 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:10,204 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:10,204 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-14 19:40:10,204 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-14 19:40:10,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:10,205 INFO L93 Difference]: Finished difference Result 20 states and 25 transitions. [2022-04-14 19:40:10,205 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-14 19:40:10,205 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:10,205 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:10,205 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:10,205 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:10,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 25 transitions. [2022-04-14 19:40:10,206 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 25 transitions. Word has length 16 [2022-04-14 19:40:10,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:10,206 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 25 transitions. [2022-04-14 19:40:10,206 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:10,206 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-14 19:40:10,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:40:10,207 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:10,208 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:10,227 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-14 19:40:10,411 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:10,412 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:10,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:10,412 INFO L85 PathProgramCache]: Analyzing trace with hash 912799338, now seen corresponding path program 1 times [2022-04-14 19:40:10,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:10,412 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619440616] [2022-04-14 19:40:10,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:10,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:10,423 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:10,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:10,467 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:10,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:10,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:10,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-14 19:40:10,675 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:10,676 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:10,676 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:10,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-14 19:40:10,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:10,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:10,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:10,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:10,678 INFO L290 TraceCheckUtils]: 6: Hoare triple {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {384#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:10,679 INFO L290 TraceCheckUtils]: 7: Hoare triple {384#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:10,679 INFO L290 TraceCheckUtils]: 8: Hoare triple {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:10,683 INFO L290 TraceCheckUtils]: 9: Hoare triple {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:10,684 INFO L290 TraceCheckUtils]: 10: Hoare triple {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:10,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {387#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:10,687 INFO L272 TraceCheckUtils]: 12: Hoare triple {387#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {388#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:10,688 INFO L290 TraceCheckUtils]: 13: Hoare triple {388#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {389#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:10,688 INFO L290 TraceCheckUtils]: 14: Hoare triple {389#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:10,690 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:10,690 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:10,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:10,691 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619440616] [2022-04-14 19:40:10,691 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [619440616] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:10,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1250032032] [2022-04-14 19:40:10,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:10,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:10,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:10,693 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:10,694 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 19:40:10,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:10,728 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:40:10,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:10,737 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:11,016 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:11,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-14 19:40:11,017 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:11,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:11,017 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:11,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:11,019 INFO L290 TraceCheckUtils]: 6: Hoare triple {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {412#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:11,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:11,020 INFO L290 TraceCheckUtils]: 8: Hoare triple {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:11,020 INFO L290 TraceCheckUtils]: 9: Hoare triple {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:40:11,021 INFO L290 TraceCheckUtils]: 10: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:40:11,022 INFO L290 TraceCheckUtils]: 11: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:40:11,024 INFO L272 TraceCheckUtils]: 12: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {433#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:11,025 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {437#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:11,027 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:11,027 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:11,027 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:11,027 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:40:15,798 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:15,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-14 19:40:15,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {437#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:15,800 INFO L272 TraceCheckUtils]: 12: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {433#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:15,801 INFO L290 TraceCheckUtils]: 11: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:40:15,801 INFO L290 TraceCheckUtils]: 10: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:40:17,832 WARN L290 TraceCheckUtils]: 9: Hoare triple {463#(forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296))))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is UNKNOWN [2022-04-14 19:40:19,842 WARN L290 TraceCheckUtils]: 8: Hoare triple {467#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {463#(forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-14 19:40:19,845 INFO L290 TraceCheckUtils]: 7: Hoare triple {471#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {467#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296)))))} is VALID [2022-04-14 19:40:19,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {475#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {471#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:40:19,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {475#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:40:19,848 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:19,848 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:19,849 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:19,849 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-14 19:40:19,849 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-14 19:40:19,849 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:19,849 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1250032032] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:40:19,849 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:40:19,849 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 9] total 20 [2022-04-14 19:40:19,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916786220] [2022-04-14 19:40:19,849 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:40:19,850 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:19,850 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:19,850 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:23,944 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 33 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:23,945 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-14 19:40:23,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:23,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-14 19:40:23,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=300, Unknown=2, NotChecked=0, Total=380 [2022-04-14 19:40:23,946 INFO L87 Difference]: Start difference. First operand 20 states and 25 transitions. Second operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:26,834 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-14 19:40:26,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:40:26,834 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:26,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:26,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2022-04-14 19:40:26,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2022-04-14 19:40:26,836 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 38 transitions. [2022-04-14 19:40:26,883 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:26,884 INFO L225 Difference]: With dead ends: 28 [2022-04-14 19:40:26,884 INFO L226 Difference]: Without dead ends: 25 [2022-04-14 19:40:26,884 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=145, Invalid=555, Unknown=2, NotChecked=0, Total=702 [2022-04-14 19:40:26,885 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 29 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 29 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:26,885 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 71 Invalid, 130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 90 Invalid, 0 Unknown, 29 Unchecked, 0.1s Time] [2022-04-14 19:40:26,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-14 19:40:26,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 22. [2022-04-14 19:40:26,886 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:26,887 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,887 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,887 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:26,888 INFO L93 Difference]: Finished difference Result 25 states and 34 transitions. [2022-04-14 19:40:26,888 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 34 transitions. [2022-04-14 19:40:26,888 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:26,888 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:26,888 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-14 19:40:26,889 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-14 19:40:26,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:26,890 INFO L93 Difference]: Finished difference Result 25 states and 34 transitions. [2022-04-14 19:40:26,890 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 34 transitions. [2022-04-14 19:40:26,890 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:26,890 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:26,890 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:26,890 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:26,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 28 transitions. [2022-04-14 19:40:26,891 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 28 transitions. Word has length 16 [2022-04-14 19:40:26,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:26,891 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 28 transitions. [2022-04-14 19:40:26,891 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:26,891 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-14 19:40:26,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:40:26,892 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:26,892 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:26,908 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 19:40:27,107 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-14 19:40:27,108 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:27,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:27,108 INFO L85 PathProgramCache]: Analyzing trace with hash -894405051, now seen corresponding path program 1 times [2022-04-14 19:40:27,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:27,108 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959568925] [2022-04-14 19:40:27,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:27,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:27,118 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:27,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:27,132 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:27,266 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:27,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:27,278 INFO L290 TraceCheckUtils]: 0: Hoare triple {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-14 19:40:27,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,278 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,279 INFO L272 TraceCheckUtils]: 0: Hoare triple {611#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:27,279 INFO L290 TraceCheckUtils]: 1: Hoare triple {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-14 19:40:27,279 INFO L290 TraceCheckUtils]: 2: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,279 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,279 INFO L272 TraceCheckUtils]: 4: Hoare triple {611#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,280 INFO L290 TraceCheckUtils]: 5: Hoare triple {611#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {616#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:27,280 INFO L290 TraceCheckUtils]: 6: Hoare triple {616#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {617#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:27,281 INFO L290 TraceCheckUtils]: 7: Hoare triple {617#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {618#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:40:27,283 INFO L290 TraceCheckUtils]: 8: Hoare triple {618#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {619#(or (and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1))) (not (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-14 19:40:27,283 INFO L290 TraceCheckUtils]: 9: Hoare triple {619#(or (and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1))) (not (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-14 19:40:27,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-14 19:40:27,284 INFO L290 TraceCheckUtils]: 11: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-14 19:40:27,285 INFO L272 TraceCheckUtils]: 12: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {621#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:27,286 INFO L290 TraceCheckUtils]: 13: Hoare triple {621#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {622#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:27,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {622#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-14 19:40:27,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {612#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-14 19:40:27,286 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:27,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:27,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959568925] [2022-04-14 19:40:27,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959568925] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:27,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021054166] [2022-04-14 19:40:27,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:27,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:27,287 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:27,289 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:27,289 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 19:40:27,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:27,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:40:27,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:27,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:27,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {611#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {611#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-14 19:40:27,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,870 INFO L272 TraceCheckUtils]: 4: Hoare triple {611#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-14 19:40:27,871 INFO L290 TraceCheckUtils]: 5: Hoare triple {611#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {642#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:40:27,871 INFO L290 TraceCheckUtils]: 6: Hoare triple {642#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:40:27,871 INFO L290 TraceCheckUtils]: 7: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:40:27,872 INFO L290 TraceCheckUtils]: 8: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:40:27,872 INFO L290 TraceCheckUtils]: 9: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:40:27,872 INFO L290 TraceCheckUtils]: 10: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:40:27,873 INFO L290 TraceCheckUtils]: 11: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:40:27,893 INFO L272 TraceCheckUtils]: 12: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {666#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:27,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {666#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {670#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:27,894 INFO L290 TraceCheckUtils]: 14: Hoare triple {670#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-14 19:40:27,894 INFO L290 TraceCheckUtils]: 15: Hoare triple {612#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-14 19:40:27,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:40:27,894 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:40:27,895 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2021054166] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:40:27,895 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:40:27,895 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-14 19:40:27,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13256869] [2022-04-14 19:40:27,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:40:27,895 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:27,895 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:27,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:27,922 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:27,922 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:40:27,922 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:27,922 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:40:27,922 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:40:27,923 INFO L87 Difference]: Start difference. First operand 22 states and 28 transitions. Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:28,024 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2022-04-14 19:40:28,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:40:28,024 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:28,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:28,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 34 transitions. [2022-04-14 19:40:28,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 34 transitions. [2022-04-14 19:40:28,026 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 34 transitions. [2022-04-14 19:40:28,054 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:28,055 INFO L225 Difference]: With dead ends: 28 [2022-04-14 19:40:28,055 INFO L226 Difference]: Without dead ends: 25 [2022-04-14 19:40:28,055 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:40:28,056 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 8 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:28,056 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [8 Valid, 74 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:40:28,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-14 19:40:28,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 23. [2022-04-14 19:40:28,058 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:28,058 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,058 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,058 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:28,060 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2022-04-14 19:40:28,060 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2022-04-14 19:40:28,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:28,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:28,061 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-14 19:40:28,061 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-14 19:40:28,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:28,062 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2022-04-14 19:40:28,062 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2022-04-14 19:40:28,062 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:28,062 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:28,062 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:28,062 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:28,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 30 transitions. [2022-04-14 19:40:28,063 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 30 transitions. Word has length 16 [2022-04-14 19:40:28,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:28,063 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 30 transitions. [2022-04-14 19:40:28,063 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:28,063 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-14 19:40:28,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:40:28,064 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:28,064 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:28,081 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 19:40:28,270 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:28,270 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:28,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:28,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-14 19:40:28,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:28,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392206950] [2022-04-14 19:40:28,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:28,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:28,280 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:28,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:28,303 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:28,479 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:28,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:28,494 INFO L290 TraceCheckUtils]: 0: Hoare triple {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-14 19:40:28,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:28,495 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:28,495 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:28,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-14 19:40:28,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:28,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:28,496 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:28,496 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:28,501 INFO L290 TraceCheckUtils]: 6: Hoare triple {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {789#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)))} is VALID [2022-04-14 19:40:28,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {789#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:28,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {791#(or (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:28,503 INFO L290 TraceCheckUtils]: 9: Hoare triple {791#(or (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:28,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:28,505 INFO L290 TraceCheckUtils]: 11: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:28,507 INFO L272 TraceCheckUtils]: 12: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {794#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:28,507 INFO L290 TraceCheckUtils]: 13: Hoare triple {794#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {795#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:28,507 INFO L290 TraceCheckUtils]: 14: Hoare triple {795#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:28,507 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:28,508 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:28,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:28,508 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392206950] [2022-04-14 19:40:28,508 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392206950] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:28,508 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [676619006] [2022-04-14 19:40:28,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:28,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:28,508 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:28,509 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:28,510 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 19:40:28,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:28,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:40:29,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2022-04-14 19:40:29,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:30,203 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:30,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-14 19:40:30,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:30,204 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:30,204 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:30,204 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:30,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:40:30,221 INFO L290 TraceCheckUtils]: 7: Hoare triple {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:40:30,222 INFO L290 TraceCheckUtils]: 8: Hoare triple {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {825#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} is VALID [2022-04-14 19:40:30,228 INFO L290 TraceCheckUtils]: 9: Hoare triple {825#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {829#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-14 19:40:30,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {829#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:40:30,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:40:30,230 INFO L272 TraceCheckUtils]: 12: Hoare triple {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:30,231 INFO L290 TraceCheckUtils]: 13: Hoare triple {840#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:30,231 INFO L290 TraceCheckUtils]: 14: Hoare triple {844#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:30,231 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:30,231 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:30,232 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:40:35,306 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:35,306 INFO L290 TraceCheckUtils]: 14: Hoare triple {844#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-14 19:40:35,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {840#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:35,308 INFO L272 TraceCheckUtils]: 12: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:35,309 INFO L290 TraceCheckUtils]: 11: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:35,310 INFO L290 TraceCheckUtils]: 10: Hoare triple {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:35,311 INFO L290 TraceCheckUtils]: 9: Hoare triple {869#(or (< 0 (mod main_~z~0 4294967296)) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:35,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {869#(or (< 0 (mod main_~z~0 4294967296)) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:35,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:35,689 INFO L290 TraceCheckUtils]: 6: Hoare triple {879#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 1 aux_mod_v_main_~y~0_18_31) (< aux_mod_v_main_~y~0_18_31 0))))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:40:35,696 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {879#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 1 aux_mod_v_main_~y~0_18_31) (< aux_mod_v_main_~y~0_18_31 0))))} is VALID [2022-04-14 19:40:35,696 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:35,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:35,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:35,697 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-14 19:40:35,697 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-14 19:40:35,697 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:35,697 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [676619006] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:40:35,697 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:40:35,697 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 19 [2022-04-14 19:40:35,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243408112] [2022-04-14 19:40:35,697 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:40:35,698 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:35,698 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:40:35,698 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:37,856 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 32 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:37,856 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:40:37,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:40:37,857 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:40:37,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=264, Unknown=2, NotChecked=0, Total=342 [2022-04-14 19:40:37,857 INFO L87 Difference]: Start difference. First operand 23 states and 30 transitions. Second operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:38,190 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2022-04-14 19:40:38,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:40:38,191 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:40:38,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:40:38,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-14 19:40:38,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-14 19:40:38,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 39 transitions. [2022-04-14 19:40:38,263 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:40:38,264 INFO L225 Difference]: With dead ends: 33 [2022-04-14 19:40:38,264 INFO L226 Difference]: Without dead ends: 30 [2022-04-14 19:40:38,264 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 22 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 176 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=130, Invalid=468, Unknown=2, NotChecked=0, Total=600 [2022-04-14 19:40:38,265 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 30 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:40:38,265 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 63 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 71 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-04-14 19:40:38,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-14 19:40:38,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 26. [2022-04-14 19:40:38,267 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:40:38,267 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,267 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,267 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:38,268 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-14 19:40:38,268 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-14 19:40:38,268 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:38,268 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:38,268 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:40:38,269 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:40:38,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:40:38,269 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-14 19:40:38,269 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-14 19:40:38,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:40:38,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:40:38,270 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:40:38,270 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:40:38,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-04-14 19:40:38,271 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 16 [2022-04-14 19:40:38,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:40:38,271 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-04-14 19:40:38,271 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:40:38,271 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-14 19:40:38,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:40:38,271 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:40:38,271 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:40:38,285 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-14 19:40:38,475 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:38,475 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:40:38,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:40:38,476 INFO L85 PathProgramCache]: Analyzing trace with hash -1741270951, now seen corresponding path program 1 times [2022-04-14 19:40:38,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:40:38,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981366265] [2022-04-14 19:40:38,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:38,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:40:38,496 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:38,499 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:40:38,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:38,521 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:40:38,524 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:40:38,654 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:40:38,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:38,664 INFO L290 TraceCheckUtils]: 0: Hoare triple {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-14 19:40:38,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:38,664 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:38,665 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:40:38,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-14 19:40:38,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:38,665 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:38,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:38,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:38,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:38,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:38,667 INFO L290 TraceCheckUtils]: 8: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:38,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:38,673 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:38,675 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:38,676 INFO L290 TraceCheckUtils]: 12: Hoare triple {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:40:38,683 INFO L272 TraceCheckUtils]: 13: Hoare triple {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1042#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:40:38,683 INFO L290 TraceCheckUtils]: 14: Hoare triple {1042#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1043#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:40:38,683 INFO L290 TraceCheckUtils]: 15: Hoare triple {1043#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:40:38,684 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:40:38,684 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:40:38,684 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:40:38,684 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981366265] [2022-04-14 19:40:38,684 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [981366265] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:40:38,684 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [348654156] [2022-04-14 19:40:38,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:40:38,684 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:40:38,684 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:40:38,685 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:40:38,686 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 19:40:38,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:38,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-14 19:40:38,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:40:38,732 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:40:39,644 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:39,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-14 19:40:39,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:39,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:39,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:40:39,645 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:39,645 INFO L290 TraceCheckUtils]: 6: Hoare triple {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:39,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:39,646 INFO L290 TraceCheckUtils]: 8: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:40:39,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:39,647 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:39,649 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:39,650 INFO L290 TraceCheckUtils]: 12: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1084#(and (<= (mod main_~n~0 4294967296) 0) (<= (+ (* (div main_~n~0 4294967296) 8589934592) main_~z~0) (* main_~n~0 2)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:40:39,651 INFO L272 TraceCheckUtils]: 13: Hoare triple {1084#(and (<= (mod main_~n~0 4294967296) 0) (<= (+ (* (div main_~n~0 4294967296) 8589934592) main_~z~0) (* main_~n~0 2)) (<= 0 main_~z~0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:40:39,652 INFO L290 TraceCheckUtils]: 14: Hoare triple {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1092#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:40:39,657 INFO L290 TraceCheckUtils]: 15: Hoare triple {1092#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:40:39,657 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:40:39,657 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:40:39,657 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:40:50,457 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) .cse0) (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (let ((.cse1 (* 4294967296 aux_div_v_main_~z~0_30_31))) (let ((.cse3 (+ v_main_~z~0_31 c_main_~x~0)) (.cse2 (+ .cse1 aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)))) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< v_main_~z~0_31 (+ .cse1 aux_mod_v_main_~z~0_30_31))) (< .cse2 .cse3) (< .cse3 .cse2))))) (not .cse0)))) (= aux_mod_v_main_~z~0_30_31 (mod (* 2 c_main_~n~0) 4294967296)) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (let ((.cse4 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse4 (not (= v_main_~z~0_31 c_main_~z~0))) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 c_main_~z~0 1) v_main_~z~0_31))) (not .cse4) (not (< c_main_~z~0 v_main_~z~0_31))))))) is different from false [2022-04-14 19:41:06,552 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:41:06,555 INFO L290 TraceCheckUtils]: 15: Hoare triple {1092#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-14 19:41:06,557 INFO L290 TraceCheckUtils]: 14: Hoare triple {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1092#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:06,558 INFO L272 TraceCheckUtils]: 13: Hoare triple {1108#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:06,558 INFO L290 TraceCheckUtils]: 12: Hoare triple {1112#(or (= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1108#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:41:08,564 WARN L290 TraceCheckUtils]: 11: Hoare triple {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1112#(or (= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is UNKNOWN [2022-04-14 19:41:08,566 INFO L290 TraceCheckUtils]: 10: Hoare triple {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is VALID [2022-04-14 19:41:10,599 WARN L290 TraceCheckUtils]: 9: Hoare triple {1123#(forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-14 19:41:12,606 WARN L290 TraceCheckUtils]: 8: Hoare triple {1127#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1123#(forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-14 19:41:14,618 WARN L290 TraceCheckUtils]: 7: Hoare triple {1131#(or (forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (not (< main_~y~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~y~0 main_~x~0))))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1127#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))))} is UNKNOWN [2022-04-14 19:41:14,623 INFO L290 TraceCheckUtils]: 6: Hoare triple {1135#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1131#(or (forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (not (< main_~y~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~y~0 main_~x~0))))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:41:14,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1135#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:41:14,624 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:41:14,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:41:14,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:41:14,625 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-14 19:41:14,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-14 19:41:14,625 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-14 19:41:14,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [348654156] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:41:14,625 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:41:14,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 11] total 20 [2022-04-14 19:41:14,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826528668] [2022-04-14 19:41:14,625 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:41:14,626 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:14,626 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:14,626 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:24,882 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 28 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:24,882 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-14 19:41:24,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:24,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-14 19:41:24,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=271, Unknown=4, NotChecked=34, Total=380 [2022-04-14 19:41:24,883 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:33,677 INFO L93 Difference]: Finished difference Result 35 states and 48 transitions. [2022-04-14 19:41:33,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:41:33,677 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:33,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:33,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 39 transitions. [2022-04-14 19:41:33,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 39 transitions. [2022-04-14 19:41:33,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 39 transitions. [2022-04-14 19:41:33,722 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:33,723 INFO L225 Difference]: With dead ends: 35 [2022-04-14 19:41:33,723 INFO L226 Difference]: Without dead ends: 30 [2022-04-14 19:41:33,723 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 20 SyntacticMatches, 7 SemanticMatches, 24 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 17.2s TimeCoverageRelationStatistics Valid=127, Invalid=472, Unknown=5, NotChecked=46, Total=650 [2022-04-14 19:41:33,723 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 31 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 48 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:33,724 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 68 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 86 Invalid, 0 Unknown, 48 Unchecked, 0.1s Time] [2022-04-14 19:41:33,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-14 19:41:33,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-14 19:41:33,725 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:33,725 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,725 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,725 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:33,726 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-14 19:41:33,726 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-14 19:41:33,727 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:33,727 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:33,727 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:41:33,727 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:41:33,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:33,728 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-14 19:41:33,728 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-14 19:41:33,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:33,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:33,728 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:33,728 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:33,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2022-04-14 19:41:33,729 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 36 transitions. Word has length 17 [2022-04-14 19:41:33,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:33,729 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 36 transitions. [2022-04-14 19:41:33,729 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:33,729 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-14 19:41:33,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:33,729 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:33,730 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:33,750 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:33,935 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:33,936 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:33,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:33,936 INFO L85 PathProgramCache]: Analyzing trace with hash -968283874, now seen corresponding path program 2 times [2022-04-14 19:41:33,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:33,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155878643] [2022-04-14 19:41:33,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:33,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:33,944 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:33,944 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:33,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:33,963 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:33,965 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:34,207 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:34,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:34,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {1303#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1291#true} is VALID [2022-04-14 19:41:34,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {1291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,214 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1291#true} {1291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,215 INFO L272 TraceCheckUtils]: 0: Hoare triple {1291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1303#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:34,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {1303#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1291#true} is VALID [2022-04-14 19:41:34,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {1291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1291#true} {1291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,215 INFO L272 TraceCheckUtils]: 4: Hoare triple {1291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,216 INFO L290 TraceCheckUtils]: 5: Hoare triple {1291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,216 INFO L290 TraceCheckUtils]: 6: Hoare triple {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1297#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,217 INFO L290 TraceCheckUtils]: 7: Hoare triple {1297#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,217 INFO L290 TraceCheckUtils]: 8: Hoare triple {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,218 INFO L290 TraceCheckUtils]: 9: Hoare triple {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,220 INFO L290 TraceCheckUtils]: 10: Hoare triple {1298#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1299#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:41:34,220 INFO L290 TraceCheckUtils]: 11: Hoare triple {1299#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1299#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:41:34,221 INFO L290 TraceCheckUtils]: 12: Hoare triple {1299#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1300#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:41:34,224 INFO L272 TraceCheckUtils]: 13: Hoare triple {1300#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1301#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:34,224 INFO L290 TraceCheckUtils]: 14: Hoare triple {1301#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1302#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:34,224 INFO L290 TraceCheckUtils]: 15: Hoare triple {1302#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:34,224 INFO L290 TraceCheckUtils]: 16: Hoare triple {1292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:34,225 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:41:34,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:34,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155878643] [2022-04-14 19:41:34,225 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155878643] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:34,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1373197510] [2022-04-14 19:41:34,225 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 19:41:34,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:34,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:34,226 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:34,227 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 19:41:34,262 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 19:41:34,262 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 19:41:34,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-14 19:41:34,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:34,273 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:34,639 INFO L272 TraceCheckUtils]: 0: Hoare triple {1291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {1291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1291#true} is VALID [2022-04-14 19:41:34,639 INFO L290 TraceCheckUtils]: 2: Hoare triple {1291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,639 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1291#true} {1291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,639 INFO L272 TraceCheckUtils]: 4: Hoare triple {1291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:41:34,640 INFO L290 TraceCheckUtils]: 5: Hoare triple {1291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,641 INFO L290 TraceCheckUtils]: 6: Hoare triple {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1325#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,641 INFO L290 TraceCheckUtils]: 7: Hoare triple {1325#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,641 INFO L290 TraceCheckUtils]: 8: Hoare triple {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,642 INFO L290 TraceCheckUtils]: 9: Hoare triple {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:34,643 INFO L290 TraceCheckUtils]: 10: Hoare triple {1329#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:41:34,643 INFO L290 TraceCheckUtils]: 11: Hoare triple {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:41:34,643 INFO L290 TraceCheckUtils]: 12: Hoare triple {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:41:34,644 INFO L272 TraceCheckUtils]: 13: Hoare triple {1339#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1349#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:34,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {1349#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1353#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:34,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {1353#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:34,645 INFO L290 TraceCheckUtils]: 16: Hoare triple {1292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:34,645 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:41:34,645 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:41:42,424 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (let ((.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (forall ((v_main_~z~0_37 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) v_main_~z~0_37) (<= 1 v_it_3))) (let ((.cse0 (< 0 (mod (+ c_main_~y~0 c_main_~z~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) .cse0) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0 c_main_~z~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)))) (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))))) (not .cse0)))) (not (< c_main_~z~0 v_main_~z~0_37)))) (not .cse1)) (or .cse1 (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) c_main_~z~0)))))) (= aux_mod_v_main_~z~0_36_31 (mod (* 2 c_main_~n~0) 4294967296)) (>= aux_mod_v_main_~z~0_36_31 4294967296) (> 0 aux_mod_v_main_~z~0_36_31))) is different from false [2022-04-14 19:41:56,324 INFO L290 TraceCheckUtils]: 16: Hoare triple {1292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:56,325 INFO L290 TraceCheckUtils]: 15: Hoare triple {1353#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1292#false} is VALID [2022-04-14 19:41:56,325 INFO L290 TraceCheckUtils]: 14: Hoare triple {1349#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1353#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:56,326 INFO L272 TraceCheckUtils]: 13: Hoare triple {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1349#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:56,326 INFO L290 TraceCheckUtils]: 12: Hoare triple {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:41:56,326 INFO L290 TraceCheckUtils]: 11: Hoare triple {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:41:58,333 WARN L290 TraceCheckUtils]: 10: Hoare triple {1379#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))))))) (> 0 aux_mod_v_main_~z~0_36_31)))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1369#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is UNKNOWN [2022-04-14 19:42:00,341 WARN L290 TraceCheckUtils]: 9: Hoare triple {1383#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31)))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1379#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))))))) (> 0 aux_mod_v_main_~z~0_36_31)))} is UNKNOWN [2022-04-14 19:42:02,371 WARN L290 TraceCheckUtils]: 8: Hoare triple {1387#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1383#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31)))} is UNKNOWN [2022-04-14 19:42:02,379 INFO L290 TraceCheckUtils]: 7: Hoare triple {1391#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1387#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31))))} is VALID [2022-04-14 19:42:02,380 INFO L290 TraceCheckUtils]: 6: Hoare triple {1395#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1391#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:42:02,381 INFO L290 TraceCheckUtils]: 5: Hoare triple {1291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1395#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:42:02,381 INFO L272 TraceCheckUtils]: 4: Hoare triple {1291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:42:02,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1291#true} {1291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:42:02,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {1291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:42:02,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {1291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1291#true} is VALID [2022-04-14 19:42:02,381 INFO L272 TraceCheckUtils]: 0: Hoare triple {1291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1291#true} is VALID [2022-04-14 19:42:02,382 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-14 19:42:02,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1373197510] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:02,382 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:02,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 21 [2022-04-14 19:42:02,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569939875] [2022-04-14 19:42:02,382 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:02,382 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:02,383 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:02,383 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:08,515 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 35 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:08,515 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-14 19:42:08,515 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:08,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-14 19:42:08,516 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=300, Unknown=5, NotChecked=36, Total=420 [2022-04-14 19:42:08,516 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. Second operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:13,077 INFO L93 Difference]: Finished difference Result 34 states and 46 transitions. [2022-04-14 19:42:13,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:42:13,078 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:13,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:13,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 36 transitions. [2022-04-14 19:42:13,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 36 transitions. [2022-04-14 19:42:13,080 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 36 transitions. [2022-04-14 19:42:13,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:13,115 INFO L225 Difference]: With dead ends: 34 [2022-04-14 19:42:13,115 INFO L226 Difference]: Without dead ends: 31 [2022-04-14 19:42:13,115 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 22 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 19.1s TimeCoverageRelationStatistics Valid=125, Invalid=472, Unknown=7, NotChecked=46, Total=650 [2022-04-14 19:42:13,116 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 29 mSDsluCounter, 69 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 177 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 55 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:13,116 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 80 Invalid, 177 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 113 Invalid, 0 Unknown, 55 Unchecked, 0.1s Time] [2022-04-14 19:42:13,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-14 19:42:13,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. [2022-04-14 19:42:13,117 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:13,117 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,117 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,118 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:13,118 INFO L93 Difference]: Finished difference Result 31 states and 43 transitions. [2022-04-14 19:42:13,118 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 43 transitions. [2022-04-14 19:42:13,119 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:13,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:13,119 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:42:13,119 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:42:13,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:13,120 INFO L93 Difference]: Finished difference Result 31 states and 43 transitions. [2022-04-14 19:42:13,120 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 43 transitions. [2022-04-14 19:42:13,120 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:13,120 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:13,120 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:13,120 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:13,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 38 transitions. [2022-04-14 19:42:13,121 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 38 transitions. Word has length 17 [2022-04-14 19:42:13,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:13,121 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 38 transitions. [2022-04-14 19:42:13,121 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:13,121 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 38 transitions. [2022-04-14 19:42:13,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:42:13,121 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:13,121 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:13,151 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:13,351 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:13,351 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:13,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:13,352 INFO L85 PathProgramCache]: Analyzing trace with hash -1930032162, now seen corresponding path program 1 times [2022-04-14 19:42:13,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:13,353 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649092482] [2022-04-14 19:42:13,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:13,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:13,364 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:13,368 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:42:13,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:13,402 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:13,408 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:42:13,572 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:13,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:13,576 INFO L290 TraceCheckUtils]: 0: Hoare triple {1563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1552#true} is VALID [2022-04-14 19:42:13,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {1552#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:13,576 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1552#true} {1552#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:13,576 INFO L272 TraceCheckUtils]: 0: Hoare triple {1552#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:13,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1552#true} is VALID [2022-04-14 19:42:13,577 INFO L290 TraceCheckUtils]: 2: Hoare triple {1552#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:13,577 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1552#true} {1552#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:13,577 INFO L272 TraceCheckUtils]: 4: Hoare triple {1552#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:13,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {1552#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1557#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:13,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {1557#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1558#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:13,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {1558#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:13,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:13,579 INFO L290 TraceCheckUtils]: 9: Hoare triple {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:13,580 INFO L290 TraceCheckUtils]: 10: Hoare triple {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:13,582 INFO L290 TraceCheckUtils]: 11: Hoare triple {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1560#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-14 19:42:13,582 INFO L290 TraceCheckUtils]: 12: Hoare triple {1560#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1560#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-14 19:42:13,583 INFO L272 TraceCheckUtils]: 13: Hoare triple {1560#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1561#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:13,584 INFO L290 TraceCheckUtils]: 14: Hoare triple {1561#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1562#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:13,584 INFO L290 TraceCheckUtils]: 15: Hoare triple {1562#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:13,584 INFO L290 TraceCheckUtils]: 16: Hoare triple {1553#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:13,584 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:13,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:13,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649092482] [2022-04-14 19:42:13,584 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1649092482] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:13,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [465974362] [2022-04-14 19:42:13,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:13,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:13,585 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:13,585 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:13,586 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-14 19:42:13,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:13,617 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-14 19:42:13,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:13,634 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:14,048 INFO L272 TraceCheckUtils]: 0: Hoare triple {1552#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:14,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {1552#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1552#true} is VALID [2022-04-14 19:42:14,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {1552#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:14,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1552#true} {1552#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:14,049 INFO L272 TraceCheckUtils]: 4: Hoare triple {1552#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:14,049 INFO L290 TraceCheckUtils]: 5: Hoare triple {1552#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1557#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:14,050 INFO L290 TraceCheckUtils]: 6: Hoare triple {1557#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1558#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:14,050 INFO L290 TraceCheckUtils]: 7: Hoare triple {1558#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:14,051 INFO L290 TraceCheckUtils]: 8: Hoare triple {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:14,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:14,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {1588#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:14,053 INFO L290 TraceCheckUtils]: 11: Hoare triple {1559#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1601#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:14,053 INFO L290 TraceCheckUtils]: 12: Hoare triple {1601#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1601#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:14,055 INFO L272 TraceCheckUtils]: 13: Hoare triple {1601#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1608#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:14,055 INFO L290 TraceCheckUtils]: 14: Hoare triple {1608#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1612#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:14,055 INFO L290 TraceCheckUtils]: 15: Hoare triple {1612#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:14,055 INFO L290 TraceCheckUtils]: 16: Hoare triple {1553#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:14,055 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:14,056 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:23,234 WARN L855 $PredicateComparison]: unable to prove that (or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or .cse0 (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse1) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< c_main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) c_main_~z~0))) .cse1)))) (or (forall ((v_main_~z~0_43 Int)) (or (exists ((v_it_2 Int)) (and (<= (+ v_main_~z~0_43 v_it_2 1) c_main_~z~0) (<= 1 v_it_2) (not (< 0 (mod (+ (* v_it_2 4294967295) c_main_~z~0) 4294967296))))) (let ((.cse2 (< 0 (mod (+ (* v_main_~z~0_43 4294967295) c_main_~x~0 c_main_~z~0) 4294967296)))) (and (or (not .cse2) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_43 v_it_4 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) (* v_main_~z~0_43 4294967295) c_main_~x~0 c_main_~z~0) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))))) .cse2))) (not (< v_main_~z~0_43 c_main_~z~0)))) (not .cse0)))) (= aux_mod_v_main_~z~0_42_31 (mod (* 2 c_main_~n~0) 4294967296)))) (< 0 (mod c_main_~y~0 4294967296))) is different from true [2022-04-14 19:42:24,232 INFO L290 TraceCheckUtils]: 16: Hoare triple {1553#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:24,233 INFO L290 TraceCheckUtils]: 15: Hoare triple {1612#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1553#false} is VALID [2022-04-14 19:42:24,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {1608#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1612#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:24,234 INFO L272 TraceCheckUtils]: 13: Hoare triple {1628#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1608#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:24,234 INFO L290 TraceCheckUtils]: 12: Hoare triple {1628#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1628#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:42:24,916 INFO L290 TraceCheckUtils]: 11: Hoare triple {1635#(forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296))))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1628#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-14 19:42:24,917 INFO L290 TraceCheckUtils]: 10: Hoare triple {1639#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1635#(forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296))))))} is VALID [2022-04-14 19:42:24,918 INFO L290 TraceCheckUtils]: 9: Hoare triple {1639#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1639#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:42:26,926 WARN L290 TraceCheckUtils]: 8: Hoare triple {1646#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~z~0_43 Int)) (or (not (< v_main_~z~0_43 main_~z~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_main_~z~0_43 v_it_2 1) main_~z~0))) (and (or (not (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (<= (+ v_main_~z~0_43 v_it_4 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))))) (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (> 0 aux_mod_v_main_~z~0_42_31))) (< 0 (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1639#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:42:28,936 WARN L290 TraceCheckUtils]: 7: Hoare triple {1650#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~y~0))))))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1646#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~z~0_43 Int)) (or (not (< v_main_~z~0_43 main_~z~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_main_~z~0_43 v_it_2 1) main_~z~0))) (and (or (not (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (<= (+ v_main_~z~0_43 v_it_4 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))))) (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (> 0 aux_mod_v_main_~z~0_42_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:42:28,942 INFO L290 TraceCheckUtils]: 6: Hoare triple {1654#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1650#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~y~0))))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:42:28,943 INFO L290 TraceCheckUtils]: 5: Hoare triple {1552#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1654#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:42:28,943 INFO L272 TraceCheckUtils]: 4: Hoare triple {1552#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:28,944 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1552#true} {1552#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:28,944 INFO L290 TraceCheckUtils]: 2: Hoare triple {1552#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:28,944 INFO L290 TraceCheckUtils]: 1: Hoare triple {1552#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1552#true} is VALID [2022-04-14 19:42:28,944 INFO L272 TraceCheckUtils]: 0: Hoare triple {1552#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1552#true} is VALID [2022-04-14 19:42:28,944 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-14 19:42:28,944 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [465974362] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:28,944 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:28,944 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 19 [2022-04-14 19:42:28,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1573362021] [2022-04-14 19:42:28,944 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:28,945 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:28,945 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:28,945 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,138 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 32 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:39,138 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:42:39,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:39,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:42:39,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=243, Unknown=2, NotChecked=32, Total=342 [2022-04-14 19:42:39,139 INFO L87 Difference]: Start difference. First operand 28 states and 38 transitions. Second operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:39,781 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-14 19:42:39,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:42:39,782 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:39,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:39,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 40 transitions. [2022-04-14 19:42:39,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 40 transitions. [2022-04-14 19:42:39,784 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 40 transitions. [2022-04-14 19:42:39,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:39,821 INFO L225 Difference]: With dead ends: 37 [2022-04-14 19:42:39,821 INFO L226 Difference]: Without dead ends: 34 [2022-04-14 19:42:39,821 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 24 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=115, Invalid=439, Unknown=2, NotChecked=44, Total=600 [2022-04-14 19:42:39,822 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 31 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 56 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:39,822 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 64 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 61 Invalid, 0 Unknown, 56 Unchecked, 0.1s Time] [2022-04-14 19:42:39,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-14 19:42:39,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 30. [2022-04-14 19:42:39,823 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:39,824 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,824 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,824 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:39,825 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-14 19:42:39,825 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 48 transitions. [2022-04-14 19:42:39,825 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:39,825 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:39,825 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-14 19:42:39,825 INFO L87 Difference]: Start difference. First operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-14 19:42:39,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:39,826 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-14 19:42:39,826 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 48 transitions. [2022-04-14 19:42:39,826 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:39,826 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:39,826 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:39,826 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:39,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 41 transitions. [2022-04-14 19:42:39,827 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 41 transitions. Word has length 17 [2022-04-14 19:42:39,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:39,827 INFO L478 AbstractCegarLoop]: Abstraction has 30 states and 41 transitions. [2022-04-14 19:42:39,827 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:39,827 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 41 transitions. [2022-04-14 19:42:39,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:42:39,828 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:39,828 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:39,844 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:40,043 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:40,044 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:40,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:40,044 INFO L85 PathProgramCache]: Analyzing trace with hash -1157045085, now seen corresponding path program 1 times [2022-04-14 19:42:40,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:40,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498514950] [2022-04-14 19:42:40,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:40,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:40,055 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:40,061 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:40,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:40,075 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:40,078 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:40,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:40,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:40,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {1835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1823#true} is VALID [2022-04-14 19:42:40,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {1823#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1823#true} is VALID [2022-04-14 19:42:40,258 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1823#true} {1823#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1823#true} is VALID [2022-04-14 19:42:40,258 INFO L272 TraceCheckUtils]: 0: Hoare triple {1823#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:40,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {1835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1823#true} is VALID [2022-04-14 19:42:40,259 INFO L290 TraceCheckUtils]: 2: Hoare triple {1823#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1823#true} is VALID [2022-04-14 19:42:40,259 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1823#true} {1823#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1823#true} is VALID [2022-04-14 19:42:40,259 INFO L272 TraceCheckUtils]: 4: Hoare triple {1823#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1823#true} is VALID [2022-04-14 19:42:40,259 INFO L290 TraceCheckUtils]: 5: Hoare triple {1823#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1828#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:40,260 INFO L290 TraceCheckUtils]: 6: Hoare triple {1828#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1829#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:40,260 INFO L290 TraceCheckUtils]: 7: Hoare triple {1829#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1830#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:40,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {1830#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1831#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:40,273 INFO L290 TraceCheckUtils]: 9: Hoare triple {1831#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1831#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:40,275 INFO L290 TraceCheckUtils]: 10: Hoare triple {1831#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:40,275 INFO L290 TraceCheckUtils]: 11: Hoare triple {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:40,276 INFO L290 TraceCheckUtils]: 12: Hoare triple {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:40,277 INFO L272 TraceCheckUtils]: 13: Hoare triple {1832#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1833#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:40,277 INFO L290 TraceCheckUtils]: 14: Hoare triple {1833#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1834#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:40,278 INFO L290 TraceCheckUtils]: 15: Hoare triple {1834#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1824#false} is VALID [2022-04-14 19:42:40,278 INFO L290 TraceCheckUtils]: 16: Hoare triple {1824#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1824#false} is VALID [2022-04-14 19:42:40,278 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:40,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:40,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498514950] [2022-04-14 19:42:40,278 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1498514950] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:40,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46881937] [2022-04-14 19:42:40,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:40,278 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:40,279 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:40,279 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:40,280 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process